[llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)

[Simon Pilgrim via llvm-commits]

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@@ -0,0 +1,12 @@
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -o - %s | FileCheck %s
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RKSimon wrote:

You need a test that more thorough checks both shuffle operands:
```ll
define <4 x i32> @pow2_shuffle_vec(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> %a2) {
  %cmp0 = icmp sgt <4 x i32> zeroinitializer, %a0
  %cmp1 = icmp sgt <4 x i32> zeroinitializer, %a1
  %sel0 = select <4 x i1> %cmp0, <4 x i32> <i32 4, i32 2, i32 -1, i32 0>, <4 x i32> <i32 8, i32 4, i32 2, i32 -1>
  %sel1 = select <4 x i1> %cmp1, <4 x i32> <i32 8, i32 4, i32 2, i32 -1>, <4 x i32> <i32 4, i32 2, i32 -1, i32 0>
  %shuf = shufflevector <4 x i32> %sel0, <4 x i32> %sel1, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
  %res = urem <4 x i32> %a2, %shuf
  ret <4 x i32> %res
}
```
I'd recommend you move this to the existing known-pow2.ll file - and make sure you regenerate the file with the update_llc_test_checks.py utils script

https://github.com/llvm/llvm-project/pull/185203