[llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)

[via llvm-commits]

================
@@ -1703,3 +1704,44 @@ GCNTTIImpl::getInstructionUniformity(const Value *V) const {
 
   return InstructionUniformity::Default;
 }
+
+InstructionCost GCNTTIImpl::getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
+                                                 StackOffset BaseOffset,
+                                                 bool HasBaseReg, int64_t Scale,
+                                                 unsigned AddrSpace) const {
+  // AMDGPU has limited addressing modes. base+scale*index requires an extra
+  // ADD instruction, unlike architectures with rich addressing modes.
+  if (HasBaseReg && Scale != 0)
+    return 1;
+  return BaseT::getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg, Scale,
+                                     AddrSpace);
+}
+
+bool GCNTTIImpl::isLSRCostLess(const TTI::LSRCost &A,
+                               const TTI::LSRCost &B) const {
+  // GFX9+: favor lower per-iteration work over preheader/setup costs.
----------------
michaelselehov wrote:

The check was for GFX9 and above. But since rampitec says the model is valid for older generations, I completely removed the check.

https://github.com/llvm/llvm-project/pull/184138