[llvm] 68c0afa - AMDGPU: Add FlatSignedOffset feature and use it for flat offset printing (#183483)

[via llvm-commits]

Author: Mariusz Sikora
Date: 2026-03-05T12:40:35+01:00
New Revision: 68c0afae262fad059bd524df9fc6d999fdb8eafd

URL: https://github.com/llvm/llvm-project/commit/68c0afae262fad059bd524df9fc6d999fdb8eafd
DIFF: https://github.com/llvm/llvm-project/commit/68c0afae262fad059bd524df9fc6d999fdb8eafd.diff

LOG: AMDGPU: Add FlatSignedOffset feature and use it for flat offset printing (#183483)

Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPU.td
    llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
index 21daf613cfa5d..1e46b83cbaed6 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -1101,6 +1101,10 @@ defm SWakeupBarrier : AMDGPUSubtargetFeature<"s-wakeup-barrier-inst",
   "Has s_wakeup_barrier instruction."
 >;
 
+defm FlatSignedOffset : AMDGPUSubtargetFeature<"flat-signed-offset",
+  "Immediate offset of FLAT instructions are always signed"
+>;
+
 //===------------------------------------------------------------===//
 // Subtarget Features (options and debugging)
 //===------------------------------------------------------------===//
@@ -1466,7 +1470,7 @@ def FeatureGFX12 : GCNSubtargetFeatureGeneration<"GFX12",
    FeatureAtomicFMinFMaxF32GlobalInsts, FeatureAtomicFMinFMaxF32FlatInsts,
    FeatureIEEEMinimumMaximumInsts, FeatureMinimum3Maximum3F32,
    FeatureMinimum3Maximum3F16, FeatureAgentScopeFineGrainedRemoteMemoryAtomics,
-   FeatureFlatOffsetBits24
+   FeatureFlatOffsetBits24, FeatureFlatSignedOffset
   ]
 >;
 

diff  --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
index 66792a67503d8..8c54d292dbd1c 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
@@ -130,7 +130,7 @@ void AMDGPUInstPrinter::printFlatOffset(const MCInst *MI, unsigned OpNo,
     const MCInstrDesc &Desc = MII.get(MI->getOpcode());
     bool AllowNegative = (Desc.TSFlags & (SIInstrFlags::FlatGlobal |
                                           SIInstrFlags::FlatScratch)) ||
-                         AMDGPU::isGFX12(STI);
+                         STI.hasFeature(AMDGPU::FeatureFlatSignedOffset);
 
     if (AllowNegative) // Signed offset
       O << formatDec(SignExtend32(Imm, AMDGPU::getNumFlatOffsetBits(STI)));