[llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)

[Jay Foad via llvm-commits]

================
@@ -1156,17 +1156,17 @@ define arm_aapcs_vfpcc void @_Z37_arm_radix4_butterfly_inverse_f32_mvePK21arm_cf
 ; CHECK-NEXT:    bne .LBB7_6
 ; CHECK-NEXT:    b .LBB7_2
 ; CHECK-NEXT:  .LBB7_9:
+; CHECK-NEXT:    adr r1, .LCPI7_0
----------------
jayfoad wrote:

After this patch machine-sink refuses to sink the t2LEApcrel...MVE_VLDRWU32 instruction past t2WhileLoopSetup and t2WhileLoopStart which both have side effects.
```
  %132:rgpr = t2LEApcrel %const.0, 14, $noreg
  %133:mqpr = MVE_VLDRWU32 killed %132:rgpr, 0, 0, $noreg, $noreg :: (load (s128) from constant-pool)
  %135:mqpr = IMPLICIT_DEF
  %134:mqpr = MVE_VADD_qr_i32 killed %133:mqpr, %54:rgpr, 0, $noreg, $noreg, %135:mqpr(tied-def 0)
  %10:mqpr, early-clobber %9:mqpr = MVE_VLDRWU32_qi_pre %134:mqpr(tied-def 0), 64, 0, $noreg, $noreg :: (load (s128), align 1)
  %136:gprlr = t2WhileLoopSetup killed %131:rgpr
  t2WhileLoopStart %136:gprlr, %bb.12, implicit-def dead $cpsr
```

https://github.com/llvm/llvm-project/pull/182000