[llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)

[via llvm-commits]

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@@ -8484,8 +8615,7 @@ SDValue TargetLowering::expandCLMUL(SDNode *Node, SelectionDAG &DAG) const {
       // instructions.
       SDValue Part;
       if (!hasBitTest(Y, ShiftAmt) &&
-          isOperationLegalOrCustom(
-              ISD::MUL, getTypeToTransformTo(*DAG.getContext(), VT))) {
+          isOperationLegalOrCustom(ISD::MUL, getTypeToTransformTo(Ctx, VT))) {
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AbdallahRashed wrote:

sorry, was not aware of your PR, reverted back .

https://github.com/llvm/llvm-project/pull/184468