[llvm] [VectorCombine] Fixing bitcast processing in VectorCombine (PR #185075)

via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 6 10:22:54 PST 2026


https://github.com/ViacheslavRb created https://github.com/llvm/llvm-project/pull/185075

Fixing bitcast instruction processing in VectorCombine pass
that operates: arbitrary precision integer types.

>From 85baeee0cc5ae7f8021fca1132e2ce2eefa5b79c Mon Sep 17 00:00:00 2001
From: "Rybalov, Viacheslav G" <viacheslav.g.rybalov at intel.com>
Date: Fri, 6 Mar 2026 19:18:03 +0100
Subject: [PATCH] [VectorCombine] Fixing bitcast processing in VectorCombine

Fixing bitcast instruction processing in VectorCombine pass
that operates: arbitrary precision integer types.
---
 .../Transforms/Vectorize/VectorCombine.cpp    |  6 ++++--
 .../VectorCombine/arbitrary-precision-int.ll  | 19 +++++++++++++++++++
 2 files changed, 23 insertions(+), 2 deletions(-)
 create mode 100644 llvm/test/Transforms/VectorCombine/arbitrary-precision-int.ll

diff --git a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
index 3d95fdaa9eb6d..56b40d05de9e0 100644
--- a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+++ b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
@@ -1105,13 +1105,15 @@ bool VectorCombine::foldBitcastShuffle(Instruction &I) {
   if (DestEltSize <= SrcEltSize) {
     // The bitcast is from wide to narrow/equal elements. The shuffle mask can
     // always be expanded to the equivalent form choosing narrower elements.
-    assert(SrcEltSize % DestEltSize == 0 && "Unexpected shuffle mask");
+    if (SrcEltSize % DestEltSize != 0)
+      return false;
     unsigned ScaleFactor = SrcEltSize / DestEltSize;
     narrowShuffleMaskElts(ScaleFactor, Mask, NewMask);
   } else {
     // The bitcast is from narrow elements to wide elements. The shuffle mask
     // must choose consecutive elements to allow casting first.
-    assert(DestEltSize % SrcEltSize == 0 && "Unexpected shuffle mask");
+    if (DestEltSize % SrcEltSize != 0)
+      return false;
     unsigned ScaleFactor = DestEltSize / SrcEltSize;
     if (!widenShuffleMaskElts(ScaleFactor, Mask, NewMask))
       return false;
diff --git a/llvm/test/Transforms/VectorCombine/arbitrary-precision-int.ll b/llvm/test/Transforms/VectorCombine/arbitrary-precision-int.ll
new file mode 100644
index 0000000000000..752607279cfac
--- /dev/null
+++ b/llvm/test/Transforms/VectorCombine/arbitrary-precision-int.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt < %s -passes=vector-combine -S | FileCheck %s --check-prefixes=CHECK
+; The test verifies that the optimization accepts and does not modify the instructions. 
+define void @test() #0 {
+; CHECK-LABEL: define void @test() #0 {
+; CHECK-NEXT:    [[V1:%.*]] = shufflevector <5 x i16> zeroinitializer, <5 x i16> poison, <10 x i32> zeroinitializer
+; CHECK-NEXT:    [[V2:%.*]] = bitcast <10 x i16> [[V1]] to <4 x i40>
+; CHECK-NEXT:    call void @use.vec(<4 x i40> [[V2]])
+; CHECK-NEXT:    ret void
+;
+  %S = shufflevector <5 x i16> zeroinitializer, <5 x i16> poison, <10 x i32> zeroinitializer
+  %bc = bitcast <10 x i16> %S to <4 x i40>
+  call void @use.vec(<4 x i40> %bc)
+  ret void
+}
+
+declare void @use.vec(<4 x i40>)
+
+attributes #0 = { strictfp }



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