[llvm] [SelectionDAG] Use Karatsuba decomposition to expand vector CLMUL via narrower legal types (PR #184468)

[Jay Foad via llvm-commits]

================
@@ -8516,17 +8647,20 @@ SDValue TargetLowering::expandCLMUL(SDNode *Node, SelectionDAG &DAG) const {
     }
     [[fallthrough]];
   case ISD::CLMULH: {
-    EVT ExtVT = VT.changeElementType(
-        *DAG.getContext(), EVT::getIntegerVT(*DAG.getContext(), 2 * BW));
-    // For example, ExtVT = i64 based operations aren't legal on a 32-bit
-    // target; use bitreverse-based lowering in this case.
-    // Also prefer bitreverse-based lowering when CLMUL is legal on VT but
-    // not on ExtVT, to avoid expanding CLMUL on the wider type (e.g. v8i8
-    // on AArch64 where CLMUL v8i8 is legal via PMUL but CLMUL v8i16 is not).
+    EVT ExtVT = VT.changeElementType(Ctx, EVT::getIntegerVT(Ctx, 2 * BW));
+    // Use bitreverse-based lowering (CLMULR/H = rev(CLMUL(rev,rev)) >> S)
+    // when any of these hold:
+    // (a) ZERO_EXTEND to ExtVT or SRL on ExtVT isn't legal.
+    // (b) CLMUL is legal on VT but not on ExtVT (e.g. v8i8 on AArch64).
+    // (c) CLMUL on VT can be efficiently expanded via Karatsuba/widening
+    //     to reach legal CLMUL. The bitreverse path creates CLMUL(VT) which
+    //     will be expanded efficiently. The widening path would create
+    //     CLMUL(ExtVT) → Karatsuba → CLMULH(VT), causing a cycle.
----------------
jayfoad wrote:

Suggest sticking to ASCII characters:
```suggestion
    //     CLMUL(ExtVT) -> Karatsuba -> CLMULH(VT), causing a cycle.
```

https://github.com/llvm/llvm-project/pull/184468