[llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)

Gaƫtan Bossu via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 4 07:58:39 PST 2026


================
@@ -437,6 +441,17 @@ void UnrollState::unrollBlock(VPBlockBase *VPB) {
       continue;
     }
 
+    VPValue *Op2;
+    if (match(&R, m_ExtractLastActive(m_VPValue(), m_VPValue(Op1),
+                                      m_VPValue(Op2)))) {
+      addUniformForAllParts(cast<VPInstruction>(&R));
+      for (unsigned Part = 1; Part != UF; ++Part) {
+        R.addOperand(getValueForPart(Op1, Part));
+        R.addOperand(getValueForPart(Op2, Part));
+      }
+      continue;
+    }
----------------
gbossu wrote:

Thinking out loud: I'm wondering if all those special cases (`m_ExtractLastActive`, `m_ExtractLane`, `m_FirstActiveLane`, etc.) could be moved to VPlan recipes themselves because it's really easy to forget supporting `IC > 1` when adding a new VPRecipe/VPInstruction. E.g. creating a new virtual `VPRecipe::unroll()` method or similar would make `VPlanUnroll.cpp` simpler by delegating more responsibilities to the individual recipes. After all, we already ask the recipes to know how to clone themselves, so why not unrolling as well.

Obviously, that would be for another PR, but I'm curious to hear opinions.

https://github.com/llvm/llvm-project/pull/184099


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