[llvm] f7560e1 - [LV] Add tests with loops with multiple argmin/argmax.
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 5 10:58:44 PST 2026
Author: Florian Hahn
Date: 2026-03-05T18:58:24Z
New Revision: f7560e1795799fe30d595a348cb34f103077a81b
URL: https://github.com/llvm/llvm-project/commit/f7560e1795799fe30d595a348cb34f103077a81b
DIFF: https://github.com/llvm/llvm-project/commit/f7560e1795799fe30d595a348cb34f103077a81b.diff
LOG: [LV] Add tests with loops with multiple argmin/argmax.
Add additional tests with multiple argmin/argmax reductions for
https://github.com/llvm/llvm-project/issues/184729.
Added:
llvm/test/Transforms/LoopVectorize/multiple-argmin-argmax.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopVectorize/multiple-argmin-argmax.ll b/llvm/test/Transforms/LoopVectorize/multiple-argmin-argmax.ll
new file mode 100644
index 0000000000000..ee79289633323
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/multiple-argmin-argmax.ll
@@ -0,0 +1,595 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
+; RUN: opt -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S %s | FileCheck %s
+
+; FIXME: Some loops in the file are currently mis-compiled.
+; Tests for https://github.com/llvm/llvm-project/issues/184729.
+define i64 @argmin_argmax(ptr %data, i32 %start_val) {
+; CHECK-LABEL: define i64 @argmin_argmax(
+; CHECK-SAME: ptr [[DATA:%.*]], i32 [[START_VAL:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[START_VAL]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND1:%.*]] = phi <2 x i64> [ <i64 0, i64 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT5:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND2:%.*]] = phi <2 x i64> [ <i64 1, i64 2>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT6:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <2 x i32> [ [[BROADCAST_SPLAT]], %[[VECTOR_PH]] ], [ [[TMP3:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <2 x i64> [ poison, %[[VECTOR_PH]] ], [ [[TMP2:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI3:%.*]] = phi <2 x i32> [ [[BROADCAST_SPLAT]], %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <2 x i64> [ splat (i64 -9223372036854775808), %[[VECTOR_PH]] ], [ [[TMP5:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]]
+; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[OFFSET_IDX]]
+; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP0]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[WIDE_LOAD]], [[VEC_PHI]]
+; CHECK-NEXT: [[TMP2]] = select <2 x i1> [[TMP1]], <2 x i64> [[VEC_IND1]], <2 x i64> [[VEC_PHI2]]
+; CHECK-NEXT: [[TMP3]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[WIDE_LOAD]], <2 x i32> [[VEC_PHI]])
+; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt <2 x i32> [[WIDE_LOAD]], [[VEC_PHI3]]
+; CHECK-NEXT: [[TMP5]] = select <2 x i1> [[TMP4]], <2 x i64> [[VEC_IND2]], <2 x i64> [[VEC_PHI4]]
+; CHECK-NEXT: [[TMP6]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[WIDE_LOAD]], <2 x i32> [[VEC_PHI3]])
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-NEXT: [[VEC_IND_NEXT5]] = add nuw <2 x i64> [[VEC_IND1]], splat (i64 2)
+; CHECK-NEXT: [[VEC_IND_NEXT6]] = add nuw nsw <2 x i64> [[VEC_IND2]], splat (i64 2)
+; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 98
+; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: [[TMP8:%.*]] = call i32 @llvm.vector.reduce.smin.v2i32(<2 x i32> [[TMP3]])
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <2 x i32> poison, i32 [[TMP8]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT7:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT6]], <2 x i32> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <2 x i32> [[TMP3]], [[BROADCAST_SPLAT7]]
+; CHECK-NEXT: [[TMP10:%.*]] = select <2 x i1> [[TMP9]], <2 x i64> [[TMP2]], <2 x i64> splat (i64 -1)
+; CHECK-NEXT: [[TMP11:%.*]] = call i64 @llvm.vector.reduce.umin.v2i64(<2 x i64> [[TMP10]])
+; CHECK-NEXT: [[DERIVED_IV_RESULT:%.*]] = add i64 1, [[TMP11]]
+; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i32 [[TMP8]], [[START_VAL]]
+; CHECK-NEXT: [[TMP13:%.*]] = select i1 [[TMP12]], i64 0, i64 [[DERIVED_IV_RESULT]]
+; CHECK-NEXT: [[TMP14:%.*]] = call i32 @llvm.vector.reduce.smax.v2i32(<2 x i32> [[TMP6]])
+; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vector.reduce.smax.v2i64(<2 x i64> [[TMP5]])
+; CHECK-NEXT: [[TMP16:%.*]] = icmp ne i64 [[TMP15]], -9223372036854775808
+; CHECK-NEXT: [[TMP19:%.*]] = select i1 [[TMP16]], i64 [[TMP15]], i64 0
+; CHECK-NEXT: br label %[[SCALAR_PH:.*]]
+; CHECK: [[SCALAR_PH]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 99, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MINVAL:%.*]] = phi i32 [ [[TMP8]], %[[SCALAR_PH]] ], [ [[NEW_MINVAL:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MINPOS:%.*]] = phi i64 [ [[TMP13]], %[[SCALAR_PH]] ], [ [[NEW_MINPOS:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MAXVAL:%.*]] = phi i32 [ [[TMP14]], %[[SCALAR_PH]] ], [ [[NEW_MAXVAL:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MAXPOS:%.*]] = phi i64 [ [[TMP19]], %[[SCALAR_PH]] ], [ [[NEW_MAXPOS:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[IV]]
+; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[GEP]], align 4
+; CHECK-NEXT: [[CMP_MIN:%.*]] = icmp slt i32 [[VAL]], [[MINVAL]]
+; CHECK-NEXT: [[NEW_MINPOS]] = select i1 [[CMP_MIN]], i64 [[IV]], i64 [[MINPOS]]
+; CHECK-NEXT: [[NEW_MINVAL]] = call i32 @llvm.smin.i32(i32 [[VAL]], i32 [[MINVAL]])
+; CHECK-NEXT: [[CMP_MAX:%.*]] = icmp sgt i32 [[VAL]], [[MAXVAL]]
+; CHECK-NEXT: [[NEW_MAXPOS]] = select i1 [[CMP_MAX]], i64 [[IV]], i64 [[MAXPOS]]
+; CHECK-NEXT: [[NEW_MAXVAL]] = call i32 @llvm.smax.i32(i32 [[VAL]], i32 [[MAXVAL]])
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EXIT_COND:%.*]] = icmp eq i64 [[IV_NEXT]], 100
+; CHECK-NEXT: br i1 [[EXIT_COND]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: [[NEW_MINPOS_LCSSA:%.*]] = phi i64 [ [[NEW_MINPOS]], %[[LOOP]] ]
+; CHECK-NEXT: [[NEW_MAXPOS_LCSSA:%.*]] = phi i64 [ [[NEW_MAXPOS]], %[[LOOP]] ]
+; CHECK-NEXT: [[RES:%.*]] = add i64 [[NEW_MINPOS_LCSSA]], [[NEW_MAXPOS_LCSSA]]
+; CHECK-NEXT: ret i64 [[RES]]
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 1, %entry ], [ %iv.next, %loop ]
+ %minval = phi i32 [ %start_val, %entry ], [ %new_minval, %loop ]
+ %minpos = phi i64 [ 0, %entry ], [ %new_minpos, %loop ]
+ %maxval = phi i32 [ %start_val, %entry ], [ %new_maxval, %loop ]
+ %maxpos = phi i64 [ 0, %entry ], [ %new_maxpos, %loop ]
+ %gep = getelementptr inbounds i32, ptr %data, i64 %iv
+ %val = load i32, ptr %gep, align 4
+ %cmp_min = icmp slt i32 %val, %minval
+ %new_minpos = select i1 %cmp_min, i64 %iv, i64 %minpos
+ %new_minval = call i32 @llvm.smin.i32(i32 %val, i32 %minval)
+ %cmp_max = icmp sgt i32 %val, %maxval
+ %new_maxpos = select i1 %cmp_max, i64 %iv, i64 %maxpos
+ %new_maxval = call i32 @llvm.smax.i32(i32 %val, i32 %maxval)
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exit_cond = icmp eq i64 %iv.next, 100
+ br i1 %exit_cond, label %exit, label %loop
+
+exit:
+ %res = add i64 %new_minpos, %new_maxpos
+ ret i64 %res
+}
+
+define i64 @argmin_argmin(ptr %data, i32 %start_val1, i32 %start_val2) {
+; CHECK-LABEL: define i64 @argmin_argmin(
+; CHECK-SAME: ptr [[DATA:%.*]], i32 [[START_VAL1:%.*]], i32 [[START_VAL2:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[START_VAL1]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <2 x i32> poison, i32 [[START_VAL2]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT1]], <2 x i32> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND3:%.*]] = phi <2 x i64> [ <i64 0, i64 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT7:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND4:%.*]] = phi <2 x i64> [ <i64 1, i64 2>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT8:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <2 x i32> [ [[BROADCAST_SPLAT]], %[[VECTOR_PH]] ], [ [[TMP3:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <2 x i64> [ poison, %[[VECTOR_PH]] ], [ [[TMP2:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI5:%.*]] = phi <2 x i32> [ [[BROADCAST_SPLAT2]], %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI6:%.*]] = phi <2 x i64> [ splat (i64 -9223372036854775808), %[[VECTOR_PH]] ], [ [[TMP5:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]]
+; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[OFFSET_IDX]]
+; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP0]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[WIDE_LOAD]], [[VEC_PHI]]
+; CHECK-NEXT: [[TMP2]] = select <2 x i1> [[TMP1]], <2 x i64> [[VEC_IND3]], <2 x i64> [[VEC_PHI4]]
+; CHECK-NEXT: [[TMP3]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[WIDE_LOAD]], <2 x i32> [[VEC_PHI]])
+; CHECK-NEXT: [[TMP4:%.*]] = icmp slt <2 x i32> [[WIDE_LOAD]], [[VEC_PHI5]]
+; CHECK-NEXT: [[TMP5]] = select <2 x i1> [[TMP4]], <2 x i64> [[VEC_IND4]], <2 x i64> [[VEC_PHI6]]
+; CHECK-NEXT: [[TMP6]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[WIDE_LOAD]], <2 x i32> [[VEC_PHI5]])
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-NEXT: [[VEC_IND_NEXT7]] = add nuw <2 x i64> [[VEC_IND3]], splat (i64 2)
+; CHECK-NEXT: [[VEC_IND_NEXT8]] = add nuw nsw <2 x i64> [[VEC_IND4]], splat (i64 2)
+; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 98
+; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: [[TMP8:%.*]] = call i32 @llvm.vector.reduce.smin.v2i32(<2 x i32> [[TMP3]])
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <2 x i32> poison, i32 [[TMP8]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT9:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT8]], <2 x i32> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <2 x i32> [[TMP3]], [[BROADCAST_SPLAT9]]
+; CHECK-NEXT: [[TMP10:%.*]] = select <2 x i1> [[TMP9]], <2 x i64> [[TMP2]], <2 x i64> splat (i64 -1)
+; CHECK-NEXT: [[TMP11:%.*]] = call i64 @llvm.vector.reduce.umin.v2i64(<2 x i64> [[TMP10]])
+; CHECK-NEXT: [[DERIVED_IV_RESULT:%.*]] = add i64 1, [[TMP11]]
+; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i32 [[TMP8]], [[START_VAL1]]
+; CHECK-NEXT: [[TMP13:%.*]] = select i1 [[TMP12]], i64 0, i64 [[DERIVED_IV_RESULT]]
+; CHECK-NEXT: [[TMP14:%.*]] = call i32 @llvm.vector.reduce.smin.v2i32(<2 x i32> [[TMP6]])
+; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vector.reduce.smax.v2i64(<2 x i64> [[TMP5]])
+; CHECK-NEXT: [[TMP16:%.*]] = icmp ne i64 [[TMP15]], -9223372036854775808
+; CHECK-NEXT: [[TMP19:%.*]] = select i1 [[TMP16]], i64 [[TMP15]], i64 0
+; CHECK-NEXT: br label %[[SCALAR_PH:.*]]
+; CHECK: [[SCALAR_PH]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 99, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MINVAL1:%.*]] = phi i32 [ [[TMP8]], %[[SCALAR_PH]] ], [ [[NEW_MINVAL1:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MINPOS1:%.*]] = phi i64 [ [[TMP13]], %[[SCALAR_PH]] ], [ [[NEW_MINPOS1:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MINVAL2:%.*]] = phi i32 [ [[TMP14]], %[[SCALAR_PH]] ], [ [[NEW_MINVAL2:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MINPOS2:%.*]] = phi i64 [ [[TMP19]], %[[SCALAR_PH]] ], [ [[NEW_MINPOS2:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[IV]]
+; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[GEP]], align 4
+; CHECK-NEXT: [[CMP_MIN1:%.*]] = icmp slt i32 [[VAL]], [[MINVAL1]]
+; CHECK-NEXT: [[NEW_MINPOS1]] = select i1 [[CMP_MIN1]], i64 [[IV]], i64 [[MINPOS1]]
+; CHECK-NEXT: [[NEW_MINVAL1]] = call i32 @llvm.smin.i32(i32 [[VAL]], i32 [[MINVAL1]])
+; CHECK-NEXT: [[CMP_MIN2:%.*]] = icmp slt i32 [[VAL]], [[MINVAL2]]
+; CHECK-NEXT: [[NEW_MINPOS2]] = select i1 [[CMP_MIN2]], i64 [[IV]], i64 [[MINPOS2]]
+; CHECK-NEXT: [[NEW_MINVAL2]] = call i32 @llvm.smin.i32(i32 [[VAL]], i32 [[MINVAL2]])
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EXIT_COND:%.*]] = icmp eq i64 [[IV_NEXT]], 100
+; CHECK-NEXT: br i1 [[EXIT_COND]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: [[NEW_MINPOS1_LCSSA:%.*]] = phi i64 [ [[NEW_MINPOS1]], %[[LOOP]] ]
+; CHECK-NEXT: [[NEW_MINPOS2_LCSSA:%.*]] = phi i64 [ [[NEW_MINPOS2]], %[[LOOP]] ]
+; CHECK-NEXT: [[RES:%.*]] = add i64 [[NEW_MINPOS1_LCSSA]], [[NEW_MINPOS2_LCSSA]]
+; CHECK-NEXT: ret i64 [[RES]]
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 1, %entry ], [ %iv.next, %loop ]
+ %minval1 = phi i32 [ %start_val1, %entry ], [ %new_minval1, %loop ]
+ %minpos1 = phi i64 [ 0, %entry ], [ %new_minpos1, %loop ]
+ %minval2 = phi i32 [ %start_val2, %entry ], [ %new_minval2, %loop ]
+ %minpos2 = phi i64 [ 0, %entry ], [ %new_minpos2, %loop ]
+ %gep = getelementptr inbounds i32, ptr %data, i64 %iv
+ %val = load i32, ptr %gep, align 4
+ %cmp_min1 = icmp slt i32 %val, %minval1
+ %new_minpos1 = select i1 %cmp_min1, i64 %iv, i64 %minpos1
+ %new_minval1 = call i32 @llvm.smin.i32(i32 %val, i32 %minval1)
+ %cmp_min2 = icmp slt i32 %val, %minval2
+ %new_minpos2 = select i1 %cmp_min2, i64 %iv, i64 %minpos2
+ %new_minval2 = call i32 @llvm.smin.i32(i32 %val, i32 %minval2)
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exit_cond = icmp eq i64 %iv.next, 100
+ br i1 %exit_cond, label %exit, label %loop
+
+exit:
+ %res = add i64 %new_minpos1, %new_minpos2
+ ret i64 %res
+}
+
+define i64 @argmax_argmax(ptr %data, i32 %start_val1, i32 %start_val2) {
+; CHECK-LABEL: define i64 @argmax_argmax(
+; CHECK-SAME: ptr [[DATA:%.*]], i32 [[START_VAL1:%.*]], i32 [[START_VAL2:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[START_VAL1]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <2 x i32> poison, i32 [[START_VAL2]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT1]], <2 x i32> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND3:%.*]] = phi <2 x i64> [ <i64 0, i64 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT7:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND4:%.*]] = phi <2 x i64> [ <i64 1, i64 2>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT8:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <2 x i32> [ [[BROADCAST_SPLAT]], %[[VECTOR_PH]] ], [ [[TMP3:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <2 x i64> [ poison, %[[VECTOR_PH]] ], [ [[TMP2:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI5:%.*]] = phi <2 x i32> [ [[BROADCAST_SPLAT2]], %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI6:%.*]] = phi <2 x i64> [ splat (i64 -9223372036854775808), %[[VECTOR_PH]] ], [ [[TMP5:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]]
+; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[OFFSET_IDX]]
+; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP0]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <2 x i32> [[WIDE_LOAD]], [[VEC_PHI]]
+; CHECK-NEXT: [[TMP2]] = select <2 x i1> [[TMP1]], <2 x i64> [[VEC_IND3]], <2 x i64> [[VEC_PHI4]]
+; CHECK-NEXT: [[TMP3]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[WIDE_LOAD]], <2 x i32> [[VEC_PHI]])
+; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt <2 x i32> [[WIDE_LOAD]], [[VEC_PHI5]]
+; CHECK-NEXT: [[TMP5]] = select <2 x i1> [[TMP4]], <2 x i64> [[VEC_IND4]], <2 x i64> [[VEC_PHI6]]
+; CHECK-NEXT: [[TMP6]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[WIDE_LOAD]], <2 x i32> [[VEC_PHI5]])
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-NEXT: [[VEC_IND_NEXT7]] = add nuw <2 x i64> [[VEC_IND3]], splat (i64 2)
+; CHECK-NEXT: [[VEC_IND_NEXT8]] = add nuw nsw <2 x i64> [[VEC_IND4]], splat (i64 2)
+; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 98
+; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: [[TMP8:%.*]] = call i32 @llvm.vector.reduce.smax.v2i32(<2 x i32> [[TMP3]])
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <2 x i32> poison, i32 [[TMP8]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT9:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT8]], <2 x i32> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <2 x i32> [[TMP3]], [[BROADCAST_SPLAT9]]
+; CHECK-NEXT: [[TMP10:%.*]] = select <2 x i1> [[TMP9]], <2 x i64> [[TMP2]], <2 x i64> splat (i64 -1)
+; CHECK-NEXT: [[TMP11:%.*]] = call i64 @llvm.vector.reduce.umin.v2i64(<2 x i64> [[TMP10]])
+; CHECK-NEXT: [[DERIVED_IV_RESULT:%.*]] = add i64 1, [[TMP11]]
+; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i32 [[TMP8]], [[START_VAL1]]
+; CHECK-NEXT: [[TMP13:%.*]] = select i1 [[TMP12]], i64 0, i64 [[DERIVED_IV_RESULT]]
+; CHECK-NEXT: [[TMP14:%.*]] = call i32 @llvm.vector.reduce.smax.v2i32(<2 x i32> [[TMP6]])
+; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vector.reduce.smax.v2i64(<2 x i64> [[TMP5]])
+; CHECK-NEXT: [[TMP16:%.*]] = icmp ne i64 [[TMP15]], -9223372036854775808
+; CHECK-NEXT: [[TMP19:%.*]] = select i1 [[TMP16]], i64 [[TMP15]], i64 0
+; CHECK-NEXT: br label %[[SCALAR_PH:.*]]
+; CHECK: [[SCALAR_PH]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 99, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MAXVAL1:%.*]] = phi i32 [ [[TMP8]], %[[SCALAR_PH]] ], [ [[NEW_MAXVAL1:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MAXPOS1:%.*]] = phi i64 [ [[TMP13]], %[[SCALAR_PH]] ], [ [[NEW_MAXPOS1:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MAXVAL2:%.*]] = phi i32 [ [[TMP14]], %[[SCALAR_PH]] ], [ [[NEW_MAXVAL2:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MAXPOS2:%.*]] = phi i64 [ [[TMP19]], %[[SCALAR_PH]] ], [ [[NEW_MAXPOS2:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[IV]]
+; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[GEP]], align 4
+; CHECK-NEXT: [[CMP_MAX1:%.*]] = icmp sgt i32 [[VAL]], [[MAXVAL1]]
+; CHECK-NEXT: [[NEW_MAXPOS1]] = select i1 [[CMP_MAX1]], i64 [[IV]], i64 [[MAXPOS1]]
+; CHECK-NEXT: [[NEW_MAXVAL1]] = call i32 @llvm.smax.i32(i32 [[VAL]], i32 [[MAXVAL1]])
+; CHECK-NEXT: [[CMP_MAX2:%.*]] = icmp sgt i32 [[VAL]], [[MAXVAL2]]
+; CHECK-NEXT: [[NEW_MAXPOS2]] = select i1 [[CMP_MAX2]], i64 [[IV]], i64 [[MAXPOS2]]
+; CHECK-NEXT: [[NEW_MAXVAL2]] = call i32 @llvm.smax.i32(i32 [[VAL]], i32 [[MAXVAL2]])
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EXIT_COND:%.*]] = icmp eq i64 [[IV_NEXT]], 100
+; CHECK-NEXT: br i1 [[EXIT_COND]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP7:![0-9]+]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: [[NEW_MAXPOS1_LCSSA:%.*]] = phi i64 [ [[NEW_MAXPOS1]], %[[LOOP]] ]
+; CHECK-NEXT: [[NEW_MAXPOS2_LCSSA:%.*]] = phi i64 [ [[NEW_MAXPOS2]], %[[LOOP]] ]
+; CHECK-NEXT: [[RES:%.*]] = add i64 [[NEW_MAXPOS1_LCSSA]], [[NEW_MAXPOS2_LCSSA]]
+; CHECK-NEXT: ret i64 [[RES]]
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 1, %entry ], [ %iv.next, %loop ]
+ %maxval1 = phi i32 [ %start_val1, %entry ], [ %new_maxval1, %loop ]
+ %maxpos1 = phi i64 [ 0, %entry ], [ %new_maxpos1, %loop ]
+ %maxval2 = phi i32 [ %start_val2, %entry ], [ %new_maxval2, %loop ]
+ %maxpos2 = phi i64 [ 0, %entry ], [ %new_maxpos2, %loop ]
+ %gep = getelementptr inbounds i32, ptr %data, i64 %iv
+ %val = load i32, ptr %gep, align 4
+ %cmp_max1 = icmp sgt i32 %val, %maxval1
+ %new_maxpos1 = select i1 %cmp_max1, i64 %iv, i64 %maxpos1
+ %new_maxval1 = call i32 @llvm.smax.i32(i32 %val, i32 %maxval1)
+ %cmp_max2 = icmp sgt i32 %val, %maxval2
+ %new_maxpos2 = select i1 %cmp_max2, i64 %iv, i64 %maxpos2
+ %new_maxval2 = call i32 @llvm.smax.i32(i32 %val, i32 %maxval2)
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exit_cond = icmp eq i64 %iv.next, 100
+ br i1 %exit_cond, label %exit, label %loop
+
+exit:
+ %res = add i64 %new_maxpos1, %new_maxpos2
+ ret i64 %res
+}
+
+; Mix signed argmin with unsigned argmax in the same loop.
+define i64 @argmin_signed_argmax_unsigned(ptr %data, i32 %start_val1, i32 %start_val2) {
+; CHECK-LABEL: define i64 @argmin_signed_argmax_unsigned(
+; CHECK-SAME: ptr [[DATA:%.*]], i32 [[START_VAL1:%.*]], i32 [[START_VAL2:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[START_VAL1]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <2 x i32> poison, i32 [[START_VAL2]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT1]], <2 x i32> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND3:%.*]] = phi <2 x i64> [ <i64 0, i64 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT7:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND4:%.*]] = phi <2 x i64> [ <i64 1, i64 2>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT8:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <2 x i32> [ [[BROADCAST_SPLAT]], %[[VECTOR_PH]] ], [ [[TMP3:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <2 x i64> [ poison, %[[VECTOR_PH]] ], [ [[TMP2:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI5:%.*]] = phi <2 x i32> [ [[BROADCAST_SPLAT2]], %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI6:%.*]] = phi <2 x i64> [ splat (i64 -9223372036854775808), %[[VECTOR_PH]] ], [ [[TMP5:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]]
+; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[OFFSET_IDX]]
+; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP0]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[WIDE_LOAD]], [[VEC_PHI]]
+; CHECK-NEXT: [[TMP2]] = select <2 x i1> [[TMP1]], <2 x i64> [[VEC_IND3]], <2 x i64> [[VEC_PHI4]]
+; CHECK-NEXT: [[TMP3]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[WIDE_LOAD]], <2 x i32> [[VEC_PHI]])
+; CHECK-NEXT: [[TMP4:%.*]] = icmp ugt <2 x i32> [[WIDE_LOAD]], [[VEC_PHI5]]
+; CHECK-NEXT: [[TMP5]] = select <2 x i1> [[TMP4]], <2 x i64> [[VEC_IND4]], <2 x i64> [[VEC_PHI6]]
+; CHECK-NEXT: [[TMP6]] = call <2 x i32> @llvm.umax.v2i32(<2 x i32> [[WIDE_LOAD]], <2 x i32> [[VEC_PHI5]])
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-NEXT: [[VEC_IND_NEXT7]] = add nuw <2 x i64> [[VEC_IND3]], splat (i64 2)
+; CHECK-NEXT: [[VEC_IND_NEXT8]] = add nuw nsw <2 x i64> [[VEC_IND4]], splat (i64 2)
+; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 98
+; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: [[TMP8:%.*]] = call i32 @llvm.vector.reduce.smin.v2i32(<2 x i32> [[TMP3]])
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT8:%.*]] = insertelement <2 x i32> poison, i32 [[TMP8]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT9:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT8]], <2 x i32> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <2 x i32> [[TMP3]], [[BROADCAST_SPLAT9]]
+; CHECK-NEXT: [[TMP10:%.*]] = select <2 x i1> [[TMP9]], <2 x i64> [[TMP2]], <2 x i64> splat (i64 -1)
+; CHECK-NEXT: [[TMP11:%.*]] = call i64 @llvm.vector.reduce.umin.v2i64(<2 x i64> [[TMP10]])
+; CHECK-NEXT: [[DERIVED_IV_RESULT:%.*]] = add i64 1, [[TMP11]]
+; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i32 [[TMP8]], [[START_VAL1]]
+; CHECK-NEXT: [[TMP13:%.*]] = select i1 [[TMP12]], i64 0, i64 [[DERIVED_IV_RESULT]]
+; CHECK-NEXT: [[TMP14:%.*]] = call i32 @llvm.vector.reduce.umax.v2i32(<2 x i32> [[TMP6]])
+; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vector.reduce.smax.v2i64(<2 x i64> [[TMP5]])
+; CHECK-NEXT: [[TMP16:%.*]] = icmp ne i64 [[TMP15]], -9223372036854775808
+; CHECK-NEXT: [[TMP19:%.*]] = select i1 [[TMP16]], i64 [[TMP15]], i64 0
+; CHECK-NEXT: br label %[[SCALAR_PH:.*]]
+; CHECK: [[SCALAR_PH]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 99, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MINVAL:%.*]] = phi i32 [ [[TMP8]], %[[SCALAR_PH]] ], [ [[NEW_MINVAL:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MINPOS:%.*]] = phi i64 [ [[TMP13]], %[[SCALAR_PH]] ], [ [[NEW_MINPOS:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MAXVAL:%.*]] = phi i32 [ [[TMP14]], %[[SCALAR_PH]] ], [ [[NEW_MAXVAL:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MAXPOS:%.*]] = phi i64 [ [[TMP19]], %[[SCALAR_PH]] ], [ [[NEW_MAXPOS:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[IV]]
+; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[GEP]], align 4
+; CHECK-NEXT: [[CMP_MIN:%.*]] = icmp slt i32 [[VAL]], [[MINVAL]]
+; CHECK-NEXT: [[NEW_MINPOS]] = select i1 [[CMP_MIN]], i64 [[IV]], i64 [[MINPOS]]
+; CHECK-NEXT: [[NEW_MINVAL]] = call i32 @llvm.smin.i32(i32 [[VAL]], i32 [[MINVAL]])
+; CHECK-NEXT: [[CMP_MAX:%.*]] = icmp ugt i32 [[VAL]], [[MAXVAL]]
+; CHECK-NEXT: [[NEW_MAXPOS]] = select i1 [[CMP_MAX]], i64 [[IV]], i64 [[MAXPOS]]
+; CHECK-NEXT: [[NEW_MAXVAL]] = call i32 @llvm.umax.i32(i32 [[VAL]], i32 [[MAXVAL]])
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EXIT_COND:%.*]] = icmp eq i64 [[IV_NEXT]], 100
+; CHECK-NEXT: br i1 [[EXIT_COND]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP9:![0-9]+]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: [[NEW_MINPOS_LCSSA:%.*]] = phi i64 [ [[NEW_MINPOS]], %[[LOOP]] ]
+; CHECK-NEXT: [[NEW_MAXPOS_LCSSA:%.*]] = phi i64 [ [[NEW_MAXPOS]], %[[LOOP]] ]
+; CHECK-NEXT: [[RES:%.*]] = add i64 [[NEW_MINPOS_LCSSA]], [[NEW_MAXPOS_LCSSA]]
+; CHECK-NEXT: ret i64 [[RES]]
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 1, %entry ], [ %iv.next, %loop ]
+ %minval = phi i32 [ %start_val1, %entry ], [ %new_minval, %loop ]
+ %minpos = phi i64 [ 0, %entry ], [ %new_minpos, %loop ]
+ %maxval = phi i32 [ %start_val2, %entry ], [ %new_maxval, %loop ]
+ %maxpos = phi i64 [ 0, %entry ], [ %new_maxpos, %loop ]
+ %gep = getelementptr inbounds i32, ptr %data, i64 %iv
+ %val = load i32, ptr %gep, align 4
+ %cmp_min = icmp slt i32 %val, %minval
+ %new_minpos = select i1 %cmp_min, i64 %iv, i64 %minpos
+ %new_minval = call i32 @llvm.smin.i32(i32 %val, i32 %minval)
+ %cmp_max = icmp ugt i32 %val, %maxval
+ %new_maxpos = select i1 %cmp_max, i64 %iv, i64 %maxpos
+ %new_maxval = call i32 @llvm.umax.i32(i32 %val, i32 %maxval)
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exit_cond = icmp eq i64 %iv.next, 100
+ br i1 %exit_cond, label %exit, label %loop
+
+exit:
+ %res = add i64 %new_minpos, %new_maxpos
+ ret i64 %res
+}
+
+define i64 @argmin_argmax_unsigned(ptr %data, i32 %start_val) {
+; CHECK-LABEL: define i64 @argmin_argmax_unsigned(
+; CHECK-SAME: ptr [[DATA:%.*]], i32 [[START_VAL:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[START_VAL]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND1:%.*]] = phi <2 x i64> [ <i64 0, i64 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT5:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND2:%.*]] = phi <2 x i64> [ <i64 1, i64 2>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT6:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <2 x i32> [ [[BROADCAST_SPLAT]], %[[VECTOR_PH]] ], [ [[TMP3:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <2 x i64> [ poison, %[[VECTOR_PH]] ], [ [[TMP2:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI3:%.*]] = phi <2 x i32> [ [[BROADCAST_SPLAT]], %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <2 x i64> [ splat (i64 -9223372036854775808), %[[VECTOR_PH]] ], [ [[TMP5:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]]
+; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[OFFSET_IDX]]
+; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP0]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <2 x i32> [[WIDE_LOAD]], [[VEC_PHI]]
+; CHECK-NEXT: [[TMP2]] = select <2 x i1> [[TMP1]], <2 x i64> [[VEC_IND1]], <2 x i64> [[VEC_PHI2]]
+; CHECK-NEXT: [[TMP3]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[WIDE_LOAD]], <2 x i32> [[VEC_PHI]])
+; CHECK-NEXT: [[TMP4:%.*]] = icmp ugt <2 x i32> [[WIDE_LOAD]], [[VEC_PHI3]]
+; CHECK-NEXT: [[TMP5]] = select <2 x i1> [[TMP4]], <2 x i64> [[VEC_IND2]], <2 x i64> [[VEC_PHI4]]
+; CHECK-NEXT: [[TMP6]] = call <2 x i32> @llvm.umax.v2i32(<2 x i32> [[WIDE_LOAD]], <2 x i32> [[VEC_PHI3]])
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-NEXT: [[VEC_IND_NEXT5]] = add nuw <2 x i64> [[VEC_IND1]], splat (i64 2)
+; CHECK-NEXT: [[VEC_IND_NEXT6]] = add nuw nsw <2 x i64> [[VEC_IND2]], splat (i64 2)
+; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 98
+; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: [[TMP8:%.*]] = call i32 @llvm.vector.reduce.umin.v2i32(<2 x i32> [[TMP3]])
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <2 x i32> poison, i32 [[TMP8]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT7:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT6]], <2 x i32> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <2 x i32> [[TMP3]], [[BROADCAST_SPLAT7]]
+; CHECK-NEXT: [[TMP10:%.*]] = select <2 x i1> [[TMP9]], <2 x i64> [[TMP2]], <2 x i64> splat (i64 -1)
+; CHECK-NEXT: [[TMP11:%.*]] = call i64 @llvm.vector.reduce.umin.v2i64(<2 x i64> [[TMP10]])
+; CHECK-NEXT: [[DERIVED_IV_RESULT:%.*]] = add i64 1, [[TMP11]]
+; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i32 [[TMP8]], [[START_VAL]]
+; CHECK-NEXT: [[TMP13:%.*]] = select i1 [[TMP12]], i64 0, i64 [[DERIVED_IV_RESULT]]
+; CHECK-NEXT: [[TMP14:%.*]] = call i32 @llvm.vector.reduce.umax.v2i32(<2 x i32> [[TMP6]])
+; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vector.reduce.smax.v2i64(<2 x i64> [[TMP5]])
+; CHECK-NEXT: [[TMP16:%.*]] = icmp ne i64 [[TMP15]], -9223372036854775808
+; CHECK-NEXT: [[TMP19:%.*]] = select i1 [[TMP16]], i64 [[TMP15]], i64 0
+; CHECK-NEXT: br label %[[SCALAR_PH:.*]]
+; CHECK: [[SCALAR_PH]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 99, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MINVAL:%.*]] = phi i32 [ [[TMP8]], %[[SCALAR_PH]] ], [ [[NEW_MINVAL:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MINPOS:%.*]] = phi i64 [ [[TMP13]], %[[SCALAR_PH]] ], [ [[NEW_MINPOS:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MAXVAL:%.*]] = phi i32 [ [[TMP14]], %[[SCALAR_PH]] ], [ [[NEW_MAXVAL:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MAXPOS:%.*]] = phi i64 [ [[TMP19]], %[[SCALAR_PH]] ], [ [[NEW_MAXPOS:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[IV]]
+; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[GEP]], align 4
+; CHECK-NEXT: [[CMP_MIN:%.*]] = icmp ult i32 [[VAL]], [[MINVAL]]
+; CHECK-NEXT: [[NEW_MINPOS]] = select i1 [[CMP_MIN]], i64 [[IV]], i64 [[MINPOS]]
+; CHECK-NEXT: [[NEW_MINVAL]] = call i32 @llvm.umin.i32(i32 [[VAL]], i32 [[MINVAL]])
+; CHECK-NEXT: [[CMP_MAX:%.*]] = icmp ugt i32 [[VAL]], [[MAXVAL]]
+; CHECK-NEXT: [[NEW_MAXPOS]] = select i1 [[CMP_MAX]], i64 [[IV]], i64 [[MAXPOS]]
+; CHECK-NEXT: [[NEW_MAXVAL]] = call i32 @llvm.umax.i32(i32 [[VAL]], i32 [[MAXVAL]])
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EXIT_COND:%.*]] = icmp eq i64 [[IV_NEXT]], 100
+; CHECK-NEXT: br i1 [[EXIT_COND]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP11:![0-9]+]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: [[NEW_MINPOS_LCSSA:%.*]] = phi i64 [ [[NEW_MINPOS]], %[[LOOP]] ]
+; CHECK-NEXT: [[NEW_MAXPOS_LCSSA:%.*]] = phi i64 [ [[NEW_MAXPOS]], %[[LOOP]] ]
+; CHECK-NEXT: [[RES:%.*]] = add i64 [[NEW_MINPOS_LCSSA]], [[NEW_MAXPOS_LCSSA]]
+; CHECK-NEXT: ret i64 [[RES]]
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 1, %entry ], [ %iv.next, %loop ]
+ %minval = phi i32 [ %start_val, %entry ], [ %new_minval, %loop ]
+ %minpos = phi i64 [ 0, %entry ], [ %new_minpos, %loop ]
+ %maxval = phi i32 [ %start_val, %entry ], [ %new_maxval, %loop ]
+ %maxpos = phi i64 [ 0, %entry ], [ %new_maxpos, %loop ]
+ %gep = getelementptr inbounds i32, ptr %data, i64 %iv
+ %val = load i32, ptr %gep, align 4
+ %cmp_min = icmp ult i32 %val, %minval
+ %new_minpos = select i1 %cmp_min, i64 %iv, i64 %minpos
+ %new_minval = call i32 @llvm.umin.i32(i32 %val, i32 %minval)
+ %cmp_max = icmp ugt i32 %val, %maxval
+ %new_maxpos = select i1 %cmp_max, i64 %iv, i64 %maxpos
+ %new_maxval = call i32 @llvm.umax.i32(i32 %val, i32 %maxval)
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exit_cond = icmp eq i64 %iv.next, 100
+ br i1 %exit_cond, label %exit, label %loop
+
+exit:
+ %res = add i64 %new_minpos, %new_maxpos
+ ret i64 %res
+}
+
+define i64 @argmin_second_not_argmax(ptr %data, i32 %start_val) {
+; CHECK-LABEL: define i64 @argmin_second_not_argmax(
+; CHECK-SAME: ptr [[DATA:%.*]], i32 [[START_VAL:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[START_VAL]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <2 x i64> [ <i64 0, i64 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND1:%.*]] = phi <2 x i64> [ <i64 1, i64 2>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT5:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <2 x i32> [ [[BROADCAST_SPLAT]], %[[VECTOR_PH]] ], [ [[TMP3:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <2 x i64> [ poison, %[[VECTOR_PH]] ], [ [[TMP2:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI3:%.*]] = phi <2 x i32> [ [[BROADCAST_SPLAT]], %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI4:%.*]] = phi <2 x i64> [ splat (i64 -9223372036854775808), %[[VECTOR_PH]] ], [ [[TMP5:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]]
+; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[OFFSET_IDX]]
+; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, ptr [[TMP0]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[WIDE_LOAD]], [[VEC_PHI]]
+; CHECK-NEXT: [[TMP2]] = select <2 x i1> [[TMP1]], <2 x i64> [[VEC_IND]], <2 x i64> [[VEC_PHI2]]
+; CHECK-NEXT: [[TMP3]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[WIDE_LOAD]], <2 x i32> [[VEC_PHI]])
+; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt <2 x i32> splat (i32 10), [[VEC_PHI3]]
+; CHECK-NEXT: [[TMP5]] = select <2 x i1> [[TMP4]], <2 x i64> [[VEC_IND1]], <2 x i64> [[VEC_PHI4]]
+; CHECK-NEXT: [[TMP6]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[WIDE_LOAD]], <2 x i32> [[VEC_PHI3]])
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add nuw <2 x i64> [[VEC_IND]], splat (i64 2)
+; CHECK-NEXT: [[VEC_IND_NEXT5]] = add nuw nsw <2 x i64> [[VEC_IND1]], splat (i64 2)
+; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 98
+; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: [[TMP8:%.*]] = call i32 @llvm.vector.reduce.smin.v2i32(<2 x i32> [[TMP3]])
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <2 x i32> poison, i32 [[TMP8]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT7:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT6]], <2 x i32> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP9:%.*]] = icmp eq <2 x i32> [[TMP3]], [[BROADCAST_SPLAT7]]
+; CHECK-NEXT: [[TMP10:%.*]] = select <2 x i1> [[TMP9]], <2 x i64> [[TMP2]], <2 x i64> splat (i64 -1)
+; CHECK-NEXT: [[TMP11:%.*]] = call i64 @llvm.vector.reduce.umin.v2i64(<2 x i64> [[TMP10]])
+; CHECK-NEXT: [[DERIVED_IV_RESULT:%.*]] = add i64 1, [[TMP11]]
+; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i32 [[TMP8]], [[START_VAL]]
+; CHECK-NEXT: [[TMP13:%.*]] = select i1 [[TMP12]], i64 0, i64 [[DERIVED_IV_RESULT]]
+; CHECK-NEXT: [[TMP14:%.*]] = call i32 @llvm.vector.reduce.smax.v2i32(<2 x i32> [[TMP6]])
+; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vector.reduce.smax.v2i64(<2 x i64> [[TMP5]])
+; CHECK-NEXT: [[TMP16:%.*]] = icmp ne i64 [[TMP15]], -9223372036854775808
+; CHECK-NEXT: [[TMP17:%.*]] = select i1 [[TMP16]], i64 [[TMP15]], i64 0
+; CHECK-NEXT: br label %[[SCALAR_PH:.*]]
+; CHECK: [[SCALAR_PH]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 99, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MINVAL:%.*]] = phi i32 [ [[TMP8]], %[[SCALAR_PH]] ], [ [[NEW_MINVAL:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MINPOS:%.*]] = phi i64 [ [[TMP13]], %[[SCALAR_PH]] ], [ [[NEW_MINPOS:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MAXVAL:%.*]] = phi i32 [ [[TMP14]], %[[SCALAR_PH]] ], [ [[NEW_MAXVAL:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[MAXPOS:%.*]] = phi i64 [ [[TMP17]], %[[SCALAR_PH]] ], [ [[NEW_MAXPOS:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[IV]]
+; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[GEP]], align 4
+; CHECK-NEXT: [[CMP_MIN:%.*]] = icmp slt i32 [[VAL]], [[MINVAL]]
+; CHECK-NEXT: [[NEW_MINPOS]] = select i1 [[CMP_MIN]], i64 [[IV]], i64 [[MINPOS]]
+; CHECK-NEXT: [[NEW_MINVAL]] = call i32 @llvm.smin.i32(i32 [[VAL]], i32 [[MINVAL]])
+; CHECK-NEXT: [[CMP_MAX:%.*]] = icmp sgt i32 10, [[MAXVAL]]
+; CHECK-NEXT: [[NEW_MAXPOS]] = select i1 [[CMP_MAX]], i64 [[IV]], i64 [[MAXPOS]]
+; CHECK-NEXT: [[NEW_MAXVAL]] = call i32 @llvm.smax.i32(i32 [[VAL]], i32 [[MAXVAL]])
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EXIT_COND:%.*]] = icmp eq i64 [[IV_NEXT]], 100
+; CHECK-NEXT: br i1 [[EXIT_COND]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP13:![0-9]+]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: [[NEW_MINPOS_LCSSA:%.*]] = phi i64 [ [[NEW_MINPOS]], %[[LOOP]] ]
+; CHECK-NEXT: [[NEW_MAXPOS_LCSSA:%.*]] = phi i64 [ [[NEW_MAXPOS]], %[[LOOP]] ]
+; CHECK-NEXT: [[RES:%.*]] = add i64 [[NEW_MINPOS_LCSSA]], [[NEW_MAXPOS_LCSSA]]
+; CHECK-NEXT: ret i64 [[RES]]
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 1, %entry ], [ %iv.next, %loop ]
+ %minval = phi i32 [ %start_val, %entry ], [ %new_minval, %loop ]
+ %minpos = phi i64 [ 0, %entry ], [ %new_minpos, %loop ]
+ %maxval = phi i32 [ %start_val, %entry ], [ %new_maxval, %loop ]
+ %maxpos = phi i64 [ 0, %entry ], [ %new_maxpos, %loop ]
+ %gep = getelementptr inbounds i32, ptr %data, i64 %iv
+ %val = load i32, ptr %gep, align 4
+ %cmp_min = icmp slt i32 %val, %minval
+ %new_minpos = select i1 %cmp_min, i64 %iv, i64 %minpos
+ %new_minval = call i32 @llvm.smin.i32(i32 %val, i32 %minval)
+ %cmp_max = icmp sgt i32 10, %maxval
+ %new_maxpos = select i1 %cmp_max, i64 %iv, i64 %maxpos
+ %new_maxval = call i32 @llvm.smax.i32(i32 %val, i32 %maxval)
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exit_cond = icmp eq i64 %iv.next, 100
+ br i1 %exit_cond, label %exit, label %loop
+
+exit:
+ %res = add i64 %new_minpos, %new_maxpos
+ ret i64 %res
+}
+
+
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