[llvm] [AMDGPU] Add readfirstlane for inline asm SGPR with VGPR input (PR #176330)

[Matt Arsenault via llvm-commits]

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@@ -8324,6 +8309,83 @@ SDValue SITargetLowering::lowerDEBUGTRAP(SDValue Op, SelectionDAG &DAG) const {
   return DAG.getNode(AMDGPUISD::TRAP, SL, MVT::Other, Ops);
 }
 
+/// When a divergent value (in VGPR) is passed to an inline asm with an SGPR
+/// constraint ('s'), we need to insert v_readfirstlane to move the value from
+/// VGPR to SGPR. This is done by modifying the CopyToReg nodes in the glue
+/// chain that feed into the INLINEASM node.
+SDValue SITargetLowering::LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const {
+  unsigned NumOps = Op.getNumOperands();
+
+  if (Op.getOperand(NumOps - 1).getValueType() != MVT::Glue)
+    return Op;
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arsenm wrote:

```suggestion
```

Don't understand why this is here 

https://github.com/llvm/llvm-project/pull/176330