[llvm] 245887e - [X86] Added sincos vector lib codegen test coverage (#183702)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 3 02:44:17 PST 2026
Author: Aadarsh Keshri
Date: 2026-03-03T10:44:12Z
New Revision: 245887e343d37309f2ce7f728ebd4c71dc9ee4e6
URL: https://github.com/llvm/llvm-project/commit/245887e343d37309f2ce7f728ebd4c71dc9ee4e6
DIFF: https://github.com/llvm/llvm-project/commit/245887e343d37309f2ce7f728ebd4c71dc9ee4e6.diff
LOG: [X86] Added sincos vector lib codegen test coverage (#183702)
Added veclib-llvm.sincos.ll tests for amdlibm and libmvec
Fixes #182847
Added:
llvm/test/CodeGen/X86/veclib-llvm.sincos.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/veclib-llvm.sincos.ll b/llvm/test/CodeGen/X86/veclib-llvm.sincos.ll
new file mode 100644
index 0000000000000..11bc122cb80c8
--- /dev/null
+++ b/llvm/test/CodeGen/X86/veclib-llvm.sincos.ll
@@ -0,0 +1,122 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter "(callq|ptrue)" --version 5
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 -vector-library=AMDLIBM < %s | FileCheck %s --check-prefixes=CHECK,AMD,AMD-SSE
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v2 -vector-library=AMDLIBM < %s | FileCheck %s --check-prefixes=CHECK,AMD,AMD-AVX
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v3 -vector-library=AMDLIBM < %s | FileCheck %s --check-prefixes=CHECK,AMD,AMD-AVX2
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v4 -vector-library=AMDLIBM < %s | FileCheck %s --check-prefixes=CHECK,AMD,AMD-AVX512
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 -vector-library=LIBMVEC < %s | FileCheck %s --check-prefixes=CHECK,GLIBC,GLIBC-SSE
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v2 -vector-library=LIBMVEC < %s | FileCheck %s --check-prefixes=CHECK,GLIBC,GLIBC-AVX
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v3 -vector-library=LIBMVEC < %s | FileCheck %s --check-prefixes=CHECK,GLIBC,GLIBC-AVX2
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v4 -vector-library=LIBMVEC < %s | FileCheck %s --check-prefixes=CHECK,GLIBC,GLIBC-AVX512
+
+define void @test_sincos_v4f32(<4 x float> %x, ptr noalias %out_sin, ptr noalias %out_cos) {
+; CHECK-LABEL: test_sincos_v4f32:
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+ %result = call { <4 x float>, <4 x float> } @llvm.sincos.v4f32(<4 x float> %x)
+ %result.0 = extractvalue { <4 x float>, <4 x float> } %result, 0
+ %result.1 = extractvalue { <4 x float>, <4 x float> } %result, 1
+ store <4 x float> %result.0, ptr %out_sin, align 16
+ store <4 x float> %result.1, ptr %out_cos, align 16
+ ret void
+}
+
+define void @test_sincos_v8f32(<8 x float> %x, ptr noalias %out_sin, ptr noalias %out_cos) {
+; CHECK-LABEL: test_sincos_v8f32:
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+ %result = call { <8 x float>, <8 x float> } @llvm.sincos.v8f32(<8 x float> %x)
+ %result.0 = extractvalue { <8 x float>, <8 x float> } %result, 0
+ %result.1 = extractvalue { <8 x float>, <8 x float> } %result, 1
+ store <8 x float> %result.0, ptr %out_sin, align 32
+ store <8 x float> %result.1, ptr %out_cos, align 32
+ ret void
+}
+
+define void @test_sincos_v16f32(<16 x float> %x, ptr noalias %out_sin, ptr noalias %out_cos) {
+; CHECK-LABEL: test_sincos_v16f32:
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+; CHECK: callq sincosf at PLT
+ %result = call { <16 x float>, <16 x float> } @llvm.sincos.v16f32(<16 x float> %x)
+ %result.0 = extractvalue { <16 x float>, <16 x float> } %result, 0
+ %result.1 = extractvalue { <16 x float>, <16 x float> } %result, 1
+ store <16 x float> %result.0, ptr %out_sin, align 64
+ store <16 x float> %result.1, ptr %out_cos, align 64
+ ret void
+}
+
+define void @test_sincos_v2f64(<2 x double> %x, ptr noalias %out_sin, ptr noalias %out_cos) {
+; CHECK-LABEL: test_sincos_v2f64:
+; CHECK: callq sincos at PLT
+; CHECK: callq sincos at PLT
+ %result = call { <2 x double>, <2 x double> } @llvm.sincos.v2f64(<2 x double> %x)
+ %result.0 = extractvalue { <2 x double>, <2 x double> } %result, 0
+ %result.1 = extractvalue { <2 x double>, <2 x double> } %result, 1
+ store <2 x double> %result.0, ptr %out_sin, align 16
+ store <2 x double> %result.1, ptr %out_cos, align 16
+ ret void
+}
+
+define void @test_sincos_v4f64(<4 x double> %x, ptr noalias %out_sin, ptr noalias %out_cos) {
+; CHECK-LABEL: test_sincos_v4f64:
+; CHECK: callq sincos at PLT
+; CHECK: callq sincos at PLT
+; CHECK: callq sincos at PLT
+; CHECK: callq sincos at PLT
+ %result = call { <4 x double>, <4 x double> } @llvm.sincos.v4f64(<4 x double> %x)
+ %result.0 = extractvalue { <4 x double>, <4 x double> } %result, 0
+ %result.1 = extractvalue { <4 x double>, <4 x double> } %result, 1
+ store <4 x double> %result.0, ptr %out_sin, align 32
+ store <4 x double> %result.1, ptr %out_cos, align 32
+ ret void
+}
+
+define void @test_sincos_v8f64(<8 x double> %x, ptr noalias %out_sin, ptr noalias %out_cos) {
+; CHECK-LABEL: test_sincos_v8f64:
+; CHECK: callq sincos at PLT
+; CHECK: callq sincos at PLT
+; CHECK: callq sincos at PLT
+; CHECK: callq sincos at PLT
+; CHECK: callq sincos at PLT
+; CHECK: callq sincos at PLT
+; CHECK: callq sincos at PLT
+; CHECK: callq sincos at PLT
+ %result = call { <8 x double>, <8 x double> } @llvm.sincos.v8f64(<8 x double> %x)
+ %result.0 = extractvalue { <8 x double>, <8 x double> } %result, 0
+ %result.1 = extractvalue { <8 x double>, <8 x double> } %result, 1
+ store <8 x double> %result.0, ptr %out_sin, align 64
+ store <8 x double> %result.1, ptr %out_cos, align 64
+ ret void
+}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; AMD: {{.*}}
+; AMD-AVX: {{.*}}
+; AMD-AVX2: {{.*}}
+; AMD-AVX512: {{.*}}
+; AMD-SSE: {{.*}}
+; GLIBC: {{.*}}
+; GLIBC-AVX: {{.*}}
+; GLIBC-AVX2: {{.*}}
+; GLIBC-AVX512: {{.*}}
+; GLIBC-SSE: {{.*}}
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