[llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)
Anshul Nigham via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 6 00:07:18 PST 2026
https://github.com/nigham updated https://github.com/llvm/llvm-project/pull/184965
>From b42afdd5f77ea6f9cbf32c0204e5baeeace3b626 Mon Sep 17 00:00:00 2001
From: Anshul Nigham <nigham at google.com>
Date: Thu, 5 Mar 2026 23:39:08 -0800
Subject: [PATCH 1/3] Extract AArch64A53Fix835769 logic to separate class for
porting to NewPM
---
.../Target/AArch64/AArch64A53Fix835769.cpp | 21 ++++++++++++-------
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp b/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
index 407714adfb8b8..b4feaf649abd1 100644
--- a/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
+++ b/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
@@ -76,9 +76,16 @@ static bool isSecondInstructionInSequence(MachineInstr *MI) {
//===----------------------------------------------------------------------===//
namespace {
-class AArch64A53Fix835769 : public MachineFunctionPass {
+class AArch64A53Fix835769Impl {
+public:
+ bool run(MachineFunction &F);
+
+private:
const TargetInstrInfo *TII;
+ bool runOnBasicBlock(MachineBasicBlock &MBB);
+};
+class AArch64A53Fix835769 : public MachineFunctionPass {
public:
static char ID;
explicit AArch64A53Fix835769() : MachineFunctionPass(ID) {}
@@ -97,9 +104,6 @@ class AArch64A53Fix835769 : public MachineFunctionPass {
AU.setPreservesCFG();
MachineFunctionPass::getAnalysisUsage(AU);
}
-
-private:
- bool runOnBasicBlock(MachineBasicBlock &MBB);
};
char AArch64A53Fix835769::ID = 0;
@@ -110,8 +114,11 @@ INITIALIZE_PASS(AArch64A53Fix835769, "aarch64-fix-cortex-a53-835769-pass",
//===----------------------------------------------------------------------===//
-bool
-AArch64A53Fix835769::runOnMachineFunction(MachineFunction &F) {
+bool AArch64A53Fix835769::runOnMachineFunction(MachineFunction &F) {
+ return AArch64A53Fix835769Impl().run(F);
+}
+
+bool AArch64A53Fix835769Impl::run(MachineFunction &F) {
LLVM_DEBUG(dbgs() << "***** AArch64A53Fix835769 *****\n");
auto &STI = F.getSubtarget<AArch64Subtarget>();
// Fix not requested, skip pass.
@@ -188,7 +195,7 @@ static void insertNopBeforeInstruction(MachineBasicBlock &MBB, MachineInstr* MI,
}
bool
-AArch64A53Fix835769::runOnBasicBlock(MachineBasicBlock &MBB) {
+AArch64A53Fix835769Impl::runOnBasicBlock(MachineBasicBlock &MBB) {
bool Changed = false;
LLVM_DEBUG(dbgs() << "Running on MBB: " << MBB
<< " - scanning instructions...\n");
>From c0988ad81d704389fd1d503b2981a87a830faf4c Mon Sep 17 00:00:00 2001
From: Anshul Nigham <nigham at google.com>
Date: Thu, 5 Mar 2026 23:57:44 -0800
Subject: [PATCH 2/3] Add NewPM port for AArch64A53Fix835769
---
llvm/lib/Target/AArch64/AArch64.h | 10 ++++++--
.../Target/AArch64/AArch64A53Fix835769.cpp | 25 +++++++++++++------
.../Target/AArch64/AArch64PassRegistry.def | 1 +
.../Target/AArch64/AArch64TargetMachine.cpp | 4 +--
4 files changed, 29 insertions(+), 11 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64.h b/llvm/lib/Target/AArch64/AArch64.h
index 597827f524c94..d8d2445d085c0 100644
--- a/llvm/lib/Target/AArch64/AArch64.h
+++ b/llvm/lib/Target/AArch64/AArch64.h
@@ -51,7 +51,7 @@ FunctionPass *createAArch64SIMDInstrOptPass();
ModulePass *createAArch64PromoteConstantPass();
FunctionPass *createAArch64ConditionOptimizerPass();
FunctionPass *createAArch64A57FPLoadBalancing();
-FunctionPass *createAArch64A53Fix835769();
+FunctionPass *createAArch64A53Fix835769LegacyPass();
FunctionPass *createFalkorHWPFFixPass();
FunctionPass *createFalkorMarkStridedAccessesPass();
FunctionPass *createAArch64PointerAuthPass();
@@ -80,7 +80,7 @@ FunctionPass *createAArch64StackTaggingPass(bool IsOptNone);
FunctionPass *createAArch64StackTaggingPreRAPass();
ModulePass *createAArch64Arm64ECCallLoweringPass();
-void initializeAArch64A53Fix835769Pass(PassRegistry&);
+void initializeAArch64A53Fix835769LegacyPass(PassRegistry &);
void initializeAArch64A57FPLoadBalancingPass(PassRegistry&);
void initializeAArch64AdvSIMDScalarPass(PassRegistry&);
void initializeAArch64AsmPrinterPass(PassRegistry &);
@@ -129,6 +129,12 @@ class AArch64LoadStoreOptPass : public PassInfoMixin<AArch64LoadStoreOptPass> {
MachineFunctionAnalysisManager &MFAM);
};
+class AArch64A53Fix835769Pass : public PassInfoMixin<AArch64A53Fix835769Pass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+
} // end namespace llvm
#endif
diff --git a/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp b/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
index b4feaf649abd1..0987475287ecd 100644
--- a/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
+++ b/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
@@ -85,10 +85,10 @@ class AArch64A53Fix835769Impl {
bool runOnBasicBlock(MachineBasicBlock &MBB);
};
-class AArch64A53Fix835769 : public MachineFunctionPass {
+class AArch64A53Fix835769Legacy : public MachineFunctionPass {
public:
static char ID;
- explicit AArch64A53Fix835769() : MachineFunctionPass(ID) {}
+ explicit AArch64A53Fix835769Legacy() : MachineFunctionPass(ID) {}
bool runOnMachineFunction(MachineFunction &F) override;
@@ -105,16 +105,27 @@ class AArch64A53Fix835769 : public MachineFunctionPass {
MachineFunctionPass::getAnalysisUsage(AU);
}
};
-char AArch64A53Fix835769::ID = 0;
+char AArch64A53Fix835769Legacy::ID = 0;
} // end anonymous namespace
-INITIALIZE_PASS(AArch64A53Fix835769, "aarch64-fix-cortex-a53-835769-pass",
+INITIALIZE_PASS(AArch64A53Fix835769Legacy, "aarch64-fix-cortex-a53-835769-pass",
"AArch64 fix for A53 erratum 835769", false, false)
//===----------------------------------------------------------------------===//
-bool AArch64A53Fix835769::runOnMachineFunction(MachineFunction &F) {
+PreservedAnalyses
+AArch64A53Fix835769Pass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ bool Changed = AArch64A53Fix835769Impl().run(MF);
+ if (!Changed)
+ return PreservedAnalyses::all();
+ PreservedAnalyses PA = getMachineFunctionPassPreservedAnalyses();
+ PA.preserveSet<CFGAnalyses>();
+ return PA;
+}
+
+bool AArch64A53Fix835769Legacy::runOnMachineFunction(MachineFunction &F) {
return AArch64A53Fix835769Impl().run(F);
}
@@ -248,6 +259,6 @@ AArch64A53Fix835769Impl::runOnBasicBlock(MachineBasicBlock &MBB) {
// Factory function used by AArch64TargetMachine to add the pass to
// the passmanager.
-FunctionPass *llvm::createAArch64A53Fix835769() {
- return new AArch64A53Fix835769();
+FunctionPass *llvm::createAArch64A53Fix835769LegacyPass() {
+ return new AArch64A53Fix835769Legacy();
}
diff --git a/llvm/lib/Target/AArch64/AArch64PassRegistry.def b/llvm/lib/Target/AArch64/AArch64PassRegistry.def
index 2ed3808e6b315..6e90560f64f17 100644
--- a/llvm/lib/Target/AArch64/AArch64PassRegistry.def
+++ b/llvm/lib/Target/AArch64/AArch64PassRegistry.def
@@ -27,4 +27,5 @@
#define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
#endif
MACHINE_FUNCTION_PASS("aarch64-ldst-opt", AArch64LoadStoreOptPass())
+MACHINE_FUNCTION_PASS("aarch64-fix-cortex-a53-835769", AArch64A53Fix835769Pass())
#undef MACHINE_FUNCTION_PASS
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index 6fa937be87eea..7880f4a8c6233 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -243,7 +243,7 @@ LLVMInitializeAArch64Target() {
RegisterTargetMachine<AArch64leTargetMachine> V(getTheAArch64_32Target());
auto &PR = *PassRegistry::getPassRegistry();
initializeGlobalISel(PR);
- initializeAArch64A53Fix835769Pass(PR);
+ initializeAArch64A53Fix835769LegacyPass(PR);
initializeAArch64A57FPLoadBalancingPass(PR);
initializeAArch64AdvSIMDScalarPass(PR);
initializeAArch64AsmPrinterPass(PR);
@@ -910,7 +910,7 @@ void AArch64PassConfig::addPreEmitPass() {
if (TM->getOptLevel() != CodeGenOptLevel::None)
addPass(createAArch64RedundantCondBranchPass());
- addPass(createAArch64A53Fix835769());
+ addPass(createAArch64A53Fix835769LegacyPass());
if (TM->getTargetTriple().isOSWindows()) {
// Identify valid longjmp targets for Windows Control Flow Guard.
>From 3d45e8c964738289c93762939f25fa00b35916cd Mon Sep 17 00:00:00 2001
From: Anshul Nigham <nigham at google.com>
Date: Fri, 6 Mar 2026 00:06:57 -0800
Subject: [PATCH 3/3] Formatting
---
llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp b/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
index 0987475287ecd..f14d1726ceeab 100644
--- a/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
+++ b/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
@@ -205,8 +205,7 @@ static void insertNopBeforeInstruction(MachineBasicBlock &MBB, MachineInstr* MI,
++NumNopsAdded;
}
-bool
-AArch64A53Fix835769Impl::runOnBasicBlock(MachineBasicBlock &MBB) {
+bool AArch64A53Fix835769Impl::runOnBasicBlock(MachineBasicBlock &MBB) {
bool Changed = false;
LLVM_DEBUG(dbgs() << "Running on MBB: " << MBB
<< " - scanning instructions...\n");
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