[llvm] [Hexagon] Fix 64-bit funnel shift miscompilation with register shift amounts (PR #183669)

Ankit Aggarwal via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 4 22:07:37 PST 2026

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https://github.com/aankit-ca approved this pull request.

@androm3da This looks good now. Thank you for the changes

https://github.com/llvm/llvm-project/pull/183669

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