[llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-aarch64

Author: Anshul Nigham (nigham)

<details>
<summary>Changes</summary>



---
Full diff: https://github.com/llvm/llvm-project/pull/184965.diff


4 Files Affected:

- (modified) llvm/lib/Target/AArch64/AArch64.h (+8-2) 
- (modified) llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp (+30-12) 
- (modified) llvm/lib/Target/AArch64/AArch64PassRegistry.def (+1) 
- (modified) llvm/lib/Target/AArch64/AArch64TargetMachine.cpp (+2-2) 


``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64.h b/llvm/lib/Target/AArch64/AArch64.h
index 597827f524c94..d8d2445d085c0 100644
--- a/llvm/lib/Target/AArch64/AArch64.h
+++ b/llvm/lib/Target/AArch64/AArch64.h
@@ -51,7 +51,7 @@ FunctionPass *createAArch64SIMDInstrOptPass();
 ModulePass *createAArch64PromoteConstantPass();
 FunctionPass *createAArch64ConditionOptimizerPass();
 FunctionPass *createAArch64A57FPLoadBalancing();
-FunctionPass *createAArch64A53Fix835769();
+FunctionPass *createAArch64A53Fix835769LegacyPass();
 FunctionPass *createFalkorHWPFFixPass();
 FunctionPass *createFalkorMarkStridedAccessesPass();
 FunctionPass *createAArch64PointerAuthPass();
@@ -80,7 +80,7 @@ FunctionPass *createAArch64StackTaggingPass(bool IsOptNone);
 FunctionPass *createAArch64StackTaggingPreRAPass();
 ModulePass *createAArch64Arm64ECCallLoweringPass();
 
-void initializeAArch64A53Fix835769Pass(PassRegistry&);
+void initializeAArch64A53Fix835769LegacyPass(PassRegistry &);
 void initializeAArch64A57FPLoadBalancingPass(PassRegistry&);
 void initializeAArch64AdvSIMDScalarPass(PassRegistry&);
 void initializeAArch64AsmPrinterPass(PassRegistry &);
@@ -129,6 +129,12 @@ class AArch64LoadStoreOptPass : public PassInfoMixin<AArch64LoadStoreOptPass> {
                         MachineFunctionAnalysisManager &MFAM);
 };
 
+class AArch64A53Fix835769Pass : public PassInfoMixin<AArch64A53Fix835769Pass> {
+public:
+  PreservedAnalyses run(MachineFunction &MF,
+                        MachineFunctionAnalysisManager &MFAM);
+};
+
 } // end namespace llvm
 
 #endif
diff --git a/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp b/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
index 407714adfb8b8..0987475287ecd 100644
--- a/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
+++ b/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
@@ -76,12 +76,19 @@ static bool isSecondInstructionInSequence(MachineInstr *MI) {
 //===----------------------------------------------------------------------===//
 
 namespace {
-class AArch64A53Fix835769 : public MachineFunctionPass {
+class AArch64A53Fix835769Impl {
+public:
+  bool run(MachineFunction &F);
+
+private:
   const TargetInstrInfo *TII;
+  bool runOnBasicBlock(MachineBasicBlock &MBB);
+};
 
+class AArch64A53Fix835769Legacy : public MachineFunctionPass {
 public:
   static char ID;
-  explicit AArch64A53Fix835769() : MachineFunctionPass(ID) {}
+  explicit AArch64A53Fix835769Legacy() : MachineFunctionPass(ID) {}
 
   bool runOnMachineFunction(MachineFunction &F) override;
 
@@ -97,21 +104,32 @@ class AArch64A53Fix835769 : public MachineFunctionPass {
     AU.setPreservesCFG();
     MachineFunctionPass::getAnalysisUsage(AU);
   }
-
-private:
-  bool runOnBasicBlock(MachineBasicBlock &MBB);
 };
-char AArch64A53Fix835769::ID = 0;
+char AArch64A53Fix835769Legacy::ID = 0;
 
 } // end anonymous namespace
 
-INITIALIZE_PASS(AArch64A53Fix835769, "aarch64-fix-cortex-a53-835769-pass",
+INITIALIZE_PASS(AArch64A53Fix835769Legacy, "aarch64-fix-cortex-a53-835769-pass",
                 "AArch64 fix for A53 erratum 835769", false, false)
 
 //===----------------------------------------------------------------------===//
 
-bool
-AArch64A53Fix835769::runOnMachineFunction(MachineFunction &F) {
+PreservedAnalyses
+AArch64A53Fix835769Pass::run(MachineFunction &MF,
+                             MachineFunctionAnalysisManager &MFAM) {
+  bool Changed = AArch64A53Fix835769Impl().run(MF);
+  if (!Changed)
+    return PreservedAnalyses::all();
+  PreservedAnalyses PA = getMachineFunctionPassPreservedAnalyses();
+  PA.preserveSet<CFGAnalyses>();
+  return PA;
+}
+
+bool AArch64A53Fix835769Legacy::runOnMachineFunction(MachineFunction &F) {
+  return AArch64A53Fix835769Impl().run(F);
+}
+
+bool AArch64A53Fix835769Impl::run(MachineFunction &F) {
   LLVM_DEBUG(dbgs() << "***** AArch64A53Fix835769 *****\n");
   auto &STI = F.getSubtarget<AArch64Subtarget>();
   // Fix not requested, skip pass.
@@ -188,7 +206,7 @@ static void insertNopBeforeInstruction(MachineBasicBlock &MBB, MachineInstr* MI,
 }
 
 bool
-AArch64A53Fix835769::runOnBasicBlock(MachineBasicBlock &MBB) {
+AArch64A53Fix835769Impl::runOnBasicBlock(MachineBasicBlock &MBB) {
   bool Changed = false;
   LLVM_DEBUG(dbgs() << "Running on MBB: " << MBB
                     << " - scanning instructions...\n");
@@ -241,6 +259,6 @@ AArch64A53Fix835769::runOnBasicBlock(MachineBasicBlock &MBB) {
 
 // Factory function used by AArch64TargetMachine to add the pass to
 // the passmanager.
-FunctionPass *llvm::createAArch64A53Fix835769() {
-  return new AArch64A53Fix835769();
+FunctionPass *llvm::createAArch64A53Fix835769LegacyPass() {
+  return new AArch64A53Fix835769Legacy();
 }
diff --git a/llvm/lib/Target/AArch64/AArch64PassRegistry.def b/llvm/lib/Target/AArch64/AArch64PassRegistry.def
index 2ed3808e6b315..6e90560f64f17 100644
--- a/llvm/lib/Target/AArch64/AArch64PassRegistry.def
+++ b/llvm/lib/Target/AArch64/AArch64PassRegistry.def
@@ -27,4 +27,5 @@
 #define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
 #endif
 MACHINE_FUNCTION_PASS("aarch64-ldst-opt", AArch64LoadStoreOptPass())
+MACHINE_FUNCTION_PASS("aarch64-fix-cortex-a53-835769", AArch64A53Fix835769Pass())
 #undef MACHINE_FUNCTION_PASS
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index 6fa937be87eea..7880f4a8c6233 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -243,7 +243,7 @@ LLVMInitializeAArch64Target() {
   RegisterTargetMachine<AArch64leTargetMachine> V(getTheAArch64_32Target());
   auto &PR = *PassRegistry::getPassRegistry();
   initializeGlobalISel(PR);
-  initializeAArch64A53Fix835769Pass(PR);
+  initializeAArch64A53Fix835769LegacyPass(PR);
   initializeAArch64A57FPLoadBalancingPass(PR);
   initializeAArch64AdvSIMDScalarPass(PR);
   initializeAArch64AsmPrinterPass(PR);
@@ -910,7 +910,7 @@ void AArch64PassConfig::addPreEmitPass() {
   if (TM->getOptLevel() != CodeGenOptLevel::None)
     addPass(createAArch64RedundantCondBranchPass());
 
-  addPass(createAArch64A53Fix835769());
+  addPass(createAArch64A53Fix835769LegacyPass());
 
   if (TM->getTargetTriple().isOSWindows()) {
     // Identify valid longjmp targets for Windows Control Flow Guard.

``````````

</details>


https://github.com/llvm/llvm-project/pull/184965