[llvm] [RISCV] Implement `isLoadFromStackSlotPostFE` and `isStoreToStackSlotPostFE` (PR #184673)

[Mikhail Gudim via llvm-commits]

mgudim wrote:

> > > What is the effect of this?
> > 
> > 
> > I want to use it in RDA post FE. That, in turn, I want to use to generate CFI's really late in the pipiline. I'll be posting all of those PRs soon
> 
> The declaration of these functions says they can't be used for correctness.
> 
> ```
>   /// Check for post-frame ptr elimination stack locations as well.
>   /// This uses a heuristic so it isn't reliable for correctness.
>   virtual Register isLoadFromStackSlotPostFE(const MachineInstr &MI,
>                                              int &FrameIndex) const {
>     return 0;
>   }
> ```

Yes, I saw that too.  I think this phrase propogated from the original commit from 2009 (2f4c37425b5ce7809601f0dbe5e45c9c0b17a17e). I don't know why it is called a "heuristic" and is considered unsafe. It looks to me that if the memoperands are correct, than this should also be correct.

https://github.com/llvm/llvm-project/pull/184673