[llvm] 073de3b - [SPIRV] Rename `selectSelectDefaultArgs` to `selectBoolToInt` (#184120)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 4 05:53:09 PST 2026
Author: Juan Manuel Martinez CaamaƱo
Date: 2026-03-04T14:53:04+01:00
New Revision: 073de3b80375bc510863f4cdeb0b2757676111bb
URL: https://github.com/llvm/llvm-project/commit/073de3b80375bc510863f4cdeb0b2757676111bb
DIFF: https://github.com/llvm/llvm-project/commit/073de3b80375bc510863f4cdeb0b2757676111bb.diff
LOG: [SPIRV] Rename `selectSelectDefaultArgs` to `selectBoolToInt` (#184120)
The function is used to extend a `bool` (vector or scalar) into `1/-1`
for `true` and `0` for `false` (vector or scalar).
There is no obvious "default" argument for a select operation, so the
original name is confusing.
This patch:
* Renames this function to better signal its intention,
* makes the boolean argument explicit in the function (instead of
implicit through the first register operand of the instruction),
* rename `I` to `InsertAt`.
Added:
Modified:
llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
index 344628f258229..dd0830bb879f5 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
@@ -266,8 +266,9 @@ class SPIRVInstructionSelector : public InstructionSelector {
bool selectSelect(Register ResVReg, SPIRVTypeInst ResType,
MachineInstr &I) const;
- bool selectSelectDefaultArgs(Register ResVReg, SPIRVTypeInst ResType,
- MachineInstr &I, bool IsSigned) const;
+ bool selectBoolToInt(Register ResVReg, SPIRVTypeInst ResType,
+ Register BooleanVReg, MachineInstr &InsertAt,
+ bool IsSigned) const;
bool selectIToF(Register ResVReg, SPIRVTypeInst ResType, MachineInstr &I,
bool IsSigned, unsigned Opcode) const;
bool selectExt(Register ResVReg, SPIRVTypeInst ResType, MachineInstr &I,
@@ -3382,21 +3383,24 @@ bool SPIRVInstructionSelector::selectSelect(Register ResVReg,
return true;
}
-bool SPIRVInstructionSelector::selectSelectDefaultArgs(Register ResVReg,
- SPIRVTypeInst ResType,
- MachineInstr &I,
- bool IsSigned) const {
+// This function is used to extend a bool or a vector of bools into an integer
+// or vector of integers.
+bool SPIRVInstructionSelector::selectBoolToInt(Register ResVReg,
+ SPIRVTypeInst ResType,
+ Register BooleanVReg,
+ MachineInstr &InsertAt,
+ bool IsSigned) const {
// To extend a bool, we need to use OpSelect between constants.
- Register ZeroReg = buildZerosVal(ResType, I);
- Register OneReg = buildOnesVal(IsSigned, ResType, I);
- bool IsScalarBool =
- GR.isScalarOfType(I.getOperand(1).getReg(), SPIRV::OpTypeBool);
+ Register ZeroReg = buildZerosVal(ResType, InsertAt);
+ Register OneReg = buildOnesVal(IsSigned, ResType, InsertAt);
+ bool IsScalarBool = GR.isScalarOfType(BooleanVReg, SPIRV::OpTypeBool);
unsigned Opcode =
IsScalarBool ? SPIRV::OpSelectSISCond : SPIRV::OpSelectVIVCond;
- BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(Opcode))
+ BuildMI(*InsertAt.getParent(), InsertAt, InsertAt.getDebugLoc(),
+ TII.get(Opcode))
.addDef(ResVReg)
.addUse(GR.getSPIRVTypeID(ResType))
- .addUse(I.getOperand(1).getReg())
+ .addUse(BooleanVReg)
.addUse(OneReg)
.addUse(ZeroReg)
.constrainAllUses(TII, TRI, RBI);
@@ -3418,7 +3422,7 @@ bool SPIRVInstructionSelector::selectIToF(Register ResVReg,
TmpType = GR.getOrCreateSPIRVVectorType(TmpType, NumElts, I, TII);
}
SrcReg = createVirtualRegister(TmpType, &GR, MRI, MRI->getMF());
- selectSelectDefaultArgs(SrcReg, TmpType, I, false);
+ selectBoolToInt(SrcReg, TmpType, I.getOperand(1).getReg(), I, false);
}
return selectOpWithSrcs(ResVReg, ResType, I, {SrcReg}, Opcode);
}
@@ -3428,7 +3432,8 @@ bool SPIRVInstructionSelector::selectExt(Register ResVReg,
bool IsSigned) const {
Register SrcReg = I.getOperand(1).getReg();
if (GR.isScalarOrVectorOfType(SrcReg, SPIRV::OpTypeBool))
- return selectSelectDefaultArgs(ResVReg, ResType, I, IsSigned);
+ return selectBoolToInt(ResVReg, ResType, I.getOperand(1).getReg(), I,
+ IsSigned);
SPIRVTypeInst SrcType = GR.getSPIRVTypeForVReg(SrcReg);
if (ResType == SrcType)
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