[llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)
Asher Dobrescu via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 5 09:09:17 PST 2026
================
@@ -0,0 +1,3167 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=c1-ultra -mattr=+aes -instruction-tables < %p/../Inputs/neon-instructions.s | FileCheck %s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 2 0.17 abs d29, d24
+# CHECK-NEXT: 1 2 0.17 abs v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.17 abs v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.17 abs v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.17 abs v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.17 abs v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.17 abs v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.17 abs v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.17 add d17, d31, d29
+# CHECK-NEXT: 1 2 0.17 add v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.17 addhn v0.2s, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.17 addhn v0.4h, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.17 addhn v0.8b, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.17 addhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.17 addhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.17 addhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.17 addp v7.2s, v1.2s, v2.2s
+# CHECK-NEXT: 1 2 0.17 addp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.17 addp v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.17 addp d1, v14.2d
+# CHECK-NEXT: 1 2 1.00 addv s0, v0.4s
+# CHECK-NEXT: 1 2 1.00 addv h0, v0.4h
+# CHECK-NEXT: 1 4 1.00 addv h0, v0.8h
+# CHECK-NEXT: 1 4 1.00 addv b0, v0.8b
+# CHECK-NEXT: 1 4 1.00 addv b0, v0.16b
+# CHECK-NEXT: 1 2 1.00 aesd v0.16b, v0.16b
+# CHECK-NEXT: 1 2 1.00 aese v0.16b, v0.16b
+# CHECK-NEXT: 1 2 1.00 aesimc v0.16b, v0.16b
+# CHECK-NEXT: 1 2 1.00 aesmc v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.17 and v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.17 bic v0.4h, #15, lsl #8
+# CHECK-NEXT: 1 2 0.17 bic v23.8h, #101
+# CHECK-NEXT: 1 2 0.17 bic v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.17 bic v25.16b, v10.16b, v9.16b
+# CHECK-NEXT: 1 2 0.17 bic v24.2s, #70
+# CHECK-NEXT: 1 2 0.17 bit v5.8b, v12.8b, v22.8b
+# CHECK-NEXT: 1 2 0.17 bif v0.8b, v25.8b, v4.8b
+# CHECK-NEXT: 1 2 0.17 bif v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.17 bit v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.17 bsl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.17 bsl v27.16b, v13.16b, v21.16b
+# CHECK-NEXT: 1 2 0.17 cls v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.17 cls v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.17 cls v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.17 cls v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.17 cls v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.17 cls v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.17 clz v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.17 clz v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.17 clz v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.17 clz v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.17 clz v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.17 clz v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.17 cmeq v9.8h, v16.8h, v24.8h
+# CHECK-NEXT: 1 2 0.17 cmeq v14.4h, v18.4h, #0
+# CHECK-NEXT: 1 2 0.17 cmeq d20, d21, #0
+# CHECK-NEXT: 1 2 0.17 cmeq d20, d21, d22
+# CHECK-NEXT: 1 2 0.17 cmeq v0.16b, v0.16b, #0
+# CHECK-NEXT: 1 2 0.17 cmeq v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.17 cmge v22.8h, v16.8h, v3.8h
+# CHECK-NEXT: 1 2 0.17 cmge v22.16b, v30.16b, #0
+# CHECK-NEXT: 1 2 0.17 cmge d20, d21, #0
+# CHECK-NEXT: 1 2 0.17 cmge d20, d21, d22
+# CHECK-NEXT: 1 2 0.17 cmge v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.17 cmge v0.8b, v0.8b, #0
+# CHECK-NEXT: 1 2 0.17 cmgt v3.2d, v29.2d, v11.2d
+# CHECK-NEXT: 1 2 0.17 cmgt d20, d21, #0
+# CHECK-NEXT: 1 2 0.17 cmgt d20, d21, d22
+# CHECK-NEXT: 1 2 0.17 cmgt v0.2s, v0.2s, #0
+# CHECK-NEXT: 1 2 0.17 cmgt v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.17 cmhi v28.4h, v25.4h, v21.4h
+# CHECK-NEXT: 1 2 0.17 cmhi d20, d21, d22
+# CHECK-NEXT: 1 2 0.17 cmhi v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.17 cmhs d20, d21, d22
+# CHECK-NEXT: 1 2 0.17 cmhs v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 2 0.17 cmle v21.2s, v19.2s, #0
+# CHECK-NEXT: 1 2 0.17 cmle d20, d21, #0
+# CHECK-NEXT: 1 2 0.17 cmle v0.2d, v0.2d, #0
+# CHECK-NEXT: 1 2 0.17 cmlt v26.4h, v12.4h, #0
+# CHECK-NEXT: 1 2 0.17 cmlt d20, d21, #0
+# CHECK-NEXT: 1 2 0.17 cmlt v0.8h, v0.8h, #0
+# CHECK-NEXT: 1 2 0.17 cmtst d20, d21, d22
+# CHECK-NEXT: 1 2 0.17 cmtst v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.17 cmtst v13.2d, v13.2d, v13.2d
+# CHECK-NEXT: 1 2 0.17 cnt v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.17 cnt v0.8b, v0.8b
+# CHECK-NEXT: 1 3 1.00 dup v0.16b, w28
+# CHECK-NEXT: 1 3 1.00 dup v0.2d, x28
+# CHECK-NEXT: 1 3 1.00 dup v0.2s, w28
+# CHECK-NEXT: 1 3 1.00 dup v0.4h, w28
+# CHECK-NEXT: 1 3 1.00 dup v0.4s, w28
+# CHECK-NEXT: 1 3 1.00 dup v0.8b, w28
+# CHECK-NEXT: 1 3 1.00 dup v0.8h, w28
+# CHECK-NEXT: 1 2 0.17 mov b0, v0.b[1]
+# CHECK-NEXT: 1 2 0.17 mov d0, v0.d[1]
+# CHECK-NEXT: 1 2 0.17 mov h0, v0.h[1]
+# CHECK-NEXT: 1 2 0.17 mov s0, v0.s[1]
+# CHECK-NEXT: 1 2 0.17 dup v0.16b, v0.b[1]
+# CHECK-NEXT: 1 2 0.17 dup v0.2d, v0.d[1]
+# CHECK-NEXT: 1 2 0.17 dup v0.2s, v0.s[1]
+# CHECK-NEXT: 1 2 0.17 dup v0.4h, v0.h[1]
+# CHECK-NEXT: 1 2 0.17 dup v0.4s, v0.s[1]
+# CHECK-NEXT: 1 2 0.17 dup v0.8b, v0.b[1]
+# CHECK-NEXT: 1 2 0.17 dup v0.8h, v0.h[1]
+# CHECK-NEXT: 1 2 0.17 eor v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 2 0.17 ext v0.16b, v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 2 0.17 ext v0.8b, v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 2 0.17 fabd d29, d24, d20
+# CHECK-NEXT: 1 2 0.17 fabd s29, s24, s20
+# CHECK-NEXT: 1 2 0.17 fabd h27, h20, h17
+# CHECK-NEXT: 1 2 0.17 fabd v13.8h, v28.8h, v12.8h
+# CHECK-NEXT: 1 2 0.17 fabd v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.17 fabs h25, h7
+# CHECK-NEXT: 1 2 0.17 fabs v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.17 fabs v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.17 fabs v0.4h, v0.4h
+# CHECK-NEXT: 1 2 0.17 fabs v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.17 fabs v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.17 facge d20, d21, d22
+# CHECK-NEXT: 1 2 0.17 facge s10, s11, s12
+# CHECK-NEXT: 1 2 0.17 facge h24, h26, h29
+# CHECK-NEXT: 1 2 0.17 facge v25.4h, v16.4h, v11.4h
+# CHECK-NEXT: 1 2 0.17 facge v19.2s, v24.2s, v5.2s
+# CHECK-NEXT: 1 2 0.17 facge v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.17 facgt d20, d21, d22
+# CHECK-NEXT: 1 2 0.17 facgt s10, s11, s12
+# CHECK-NEXT: 1 2 0.17 facgt h0, h4, h10
+# CHECK-NEXT: 1 2 0.17 facgt v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 2 0.17 facgt v22.8h, v14.8h, v31.8h
+# CHECK-NEXT: 1 2 0.17 facgt v22.4s, v8.4s, v2.4s
+# CHECK-NEXT: 1 2 0.17 fadd v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.17 faddp h10, v19.2h
+# CHECK-NEXT: 1 2 0.17 faddp d11, v28.2d
+# CHECK-NEXT: 1 2 0.17 faddp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.17 faddp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.17 faddp v16.2d, v11.2d, v5.2d
+# CHECK-NEXT: 1 2 0.17 fcmeq h30, h6, h1
+# CHECK-NEXT: 1 2 0.17 fcmeq h19, h23, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmeq d20, d21, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmeq d20, d21, d22
+# CHECK-NEXT: 1 2 0.17 fcmeq s10, s11, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmeq s10, s11, s12
+# CHECK-NEXT: 1 2 0.17 fcmeq v0.2s, v0.2s, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmeq v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 2 0.17 fcmeq v12.4s, v11.4s, v26.4s
+# CHECK-NEXT: 1 2 0.17 fcmeq v18.2d, v17.2d, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmge h10, h23, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmge h1, h16, h12
+# CHECK-NEXT: 1 2 0.17 fcmge d20, d21, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmge d20, d21, d22
+# CHECK-NEXT: 1 2 0.17 fcmge s10, s11, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmge s10, s11, s12
+# CHECK-NEXT: 1 2 0.17 fcmge v0.2d, v0.2d, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmge v17.2d, v11.2d, v13.2d
+# CHECK-NEXT: 1 2 0.17 fcmge v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.17 fcmge v18.4h, v27.4h, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmge v20.8h, v19.8h, v22.8h
+# CHECK-NEXT: 1 2 0.17 fcmge v17.2s, v11.2s, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmgt h4, h5, h0
+# CHECK-NEXT: 1 2 0.17 fcmgt h0, h18, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmgt d20, d21, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmgt d20, d21, d22
+# CHECK-NEXT: 1 2 0.17 fcmgt s10, s11, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmgt s10, s11, s12
+# CHECK-NEXT: 1 2 0.17 fcmgt v0.4s, v0.4s, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmgt v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 2 0.17 fcmgt v24.8h, v24.8h, v28.8h
+# CHECK-NEXT: 1 2 0.17 fcmgt v0.8h, v11.8h, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmgt v19.2d, v31.2d, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmle v16.8h, v11.8h, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmle v22.4s, v30.4s, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmle d20, d21, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmle s10, s11, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmle v0.2d, v0.2d, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmle h18, h28, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmlt h23, h7, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmlt d20, d21, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmlt s10, s11, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmlt v0.4s, v0.4s, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmlt v8.4h, v2.4h, #0.0
+# CHECK-NEXT: 1 2 0.17 fcmlt v7.2d, v16.2d, #0.0
+# CHECK-NEXT: 1 3 1.00 fcvtas d21, d14
+# CHECK-NEXT: 1 3 1.00 fcvtas s12, s13
+# CHECK-NEXT: 1 3 1.00 fcvtas h12, h13
+# CHECK-NEXT: 1 3 1.00 fcvtas v0.2d, v0.2d
+# CHECK-NEXT: 1 3 1.00 fcvtas v0.2s, v0.2s
+# CHECK-NEXT: 1 3 1.00 fcvtas v0.4h, v0.4h
+# CHECK-NEXT: 1 3 1.00 fcvtas v0.4s, v0.4s
+# CHECK-NEXT: 1 3 1.00 fcvtas v0.8h, v0.8h
+# CHECK-NEXT: 1 3 1.00 fcvtau d21, d14
+# CHECK-NEXT: 1 3 1.00 fcvtau s12, s13
+# CHECK-NEXT: 1 3 1.00 fcvtau h12, h13
+# CHECK-NEXT: 1 3 1.00 fcvtau v0.2d, v0.2d
+# CHECK-NEXT: 1 3 1.00 fcvtau v0.2s, v0.2s
+# CHECK-NEXT: 1 3 1.00 fcvtau v0.4h, v0.4h
+# CHECK-NEXT: 1 3 1.00 fcvtau v0.4s, v0.4s
+# CHECK-NEXT: 1 3 1.00 fcvtau v0.8h, v0.8h
+# CHECK-NEXT: 1 2 0.17 fcvtl v0.2d, v0.2s
+# CHECK-NEXT: 1 3 1.00 fcvtl v0.4s, v0.4h
+# CHECK-NEXT: 1 3 1.00 fcvtl2 v0.2d, v0.4s
+# CHECK-NEXT: 1 3 1.00 fcvtl2 v0.4s, v0.8h
+# CHECK-NEXT: 1 3 1.00 fcvtms d21, d14
+# CHECK-NEXT: 1 3 1.00 fcvtms s22, s13
+# CHECK-NEXT: 1 3 1.00 fcvtms h22, h13
+# CHECK-NEXT: 1 3 1.00 fcvtms v0.2d, v0.2d
+# CHECK-NEXT: 1 3 1.00 fcvtms v0.2s, v0.2s
+# CHECK-NEXT: 1 3 1.00 fcvtms v0.4h, v0.4h
+# CHECK-NEXT: 1 3 1.00 fcvtms v0.4s, v0.4s
+# CHECK-NEXT: 1 3 1.00 fcvtms v0.8h, v0.8h
+# CHECK-NEXT: 1 3 1.00 fcvtmu d21, d14
+# CHECK-NEXT: 1 3 1.00 fcvtmu s12, s13
+# CHECK-NEXT: 1 3 1.00 fcvtmu h12, h13
+# CHECK-NEXT: 1 3 1.00 fcvtmu v0.2d, v0.2d
+# CHECK-NEXT: 1 3 1.00 fcvtmu v0.2s, v0.2s
+# CHECK-NEXT: 1 3 1.00 fcvtmu v0.4h, v0.4h
+# CHECK-NEXT: 1 3 1.00 fcvtmu v0.4s, v0.4s
+# CHECK-NEXT: 1 3 1.00 fcvtmu v0.8h, v0.8h
+# CHECK-NEXT: 1 3 1.00 fcvtn v0.2s, v0.2d
+# CHECK-NEXT: 1 3 1.00 fcvtn v0.4h, v0.4s
+# CHECK-NEXT: 1 3 1.00 fcvtn2 v0.4s, v0.2d
+# CHECK-NEXT: 1 3 1.00 fcvtn2 v0.8h, v0.4s
+# CHECK-NEXT: 1 3 1.00 fcvtns d21, d14
+# CHECK-NEXT: 1 3 1.00 fcvtns s22, s13
+# CHECK-NEXT: 1 3 1.00 fcvtns h22, h13
+# CHECK-NEXT: 1 3 1.00 fcvtns v0.2d, v0.2d
+# CHECK-NEXT: 1 3 1.00 fcvtns v0.2s, v0.2s
+# CHECK-NEXT: 1 3 1.00 fcvtns v0.4h, v0.4h
+# CHECK-NEXT: 1 3 1.00 fcvtns v0.4s, v0.4s
+# CHECK-NEXT: 1 3 1.00 fcvtns v0.8h, v0.8h
+# CHECK-NEXT: 1 3 1.00 fcvtnu d21, d14
+# CHECK-NEXT: 1 3 1.00 fcvtnu s12, s13
+# CHECK-NEXT: 1 3 1.00 fcvtnu h12, h13
+# CHECK-NEXT: 1 3 1.00 fcvtnu v0.2d, v0.2d
+# CHECK-NEXT: 1 3 1.00 fcvtnu v0.2s, v0.2s
+# CHECK-NEXT: 1 3 1.00 fcvtnu v0.4h, v0.4h
+# CHECK-NEXT: 1 3 1.00 fcvtnu v0.4s, v0.4s
+# CHECK-NEXT: 1 3 1.00 fcvtnu v0.8h, v0.8h
+# CHECK-NEXT: 1 3 1.00 fcvtps d21, d14
+# CHECK-NEXT: 1 3 1.00 fcvtps s22, s13
+# CHECK-NEXT: 1 3 1.00 fcvtps h22, h13
+# CHECK-NEXT: 1 3 1.00 fcvtps v0.2d, v0.2d
+# CHECK-NEXT: 1 3 1.00 fcvtps v0.2s, v0.2s
+# CHECK-NEXT: 1 3 1.00 fcvtps v0.4h, v0.4h
+# CHECK-NEXT: 1 3 1.00 fcvtps v0.4s, v0.4s
+# CHECK-NEXT: 1 3 1.00 fcvtps v0.8h, v0.8h
+# CHECK-NEXT: 1 3 1.00 fcvtpu d21, d14
+# CHECK-NEXT: 1 3 1.00 fcvtpu s12, s13
+# CHECK-NEXT: 1 3 1.00 fcvtpu h12, h13
+# CHECK-NEXT: 1 3 1.00 fcvtpu v0.2d, v0.2d
+# CHECK-NEXT: 1 3 1.00 fcvtpu v0.2s, v0.2s
+# CHECK-NEXT: 1 3 1.00 fcvtpu v0.4h, v0.4h
+# CHECK-NEXT: 1 3 1.00 fcvtpu v0.4s, v0.4s
+# CHECK-NEXT: 1 3 1.00 fcvtpu v0.8h, v0.8h
+# CHECK-NEXT: 1 3 1.00 fcvtxn s22, d13
+# CHECK-NEXT: 1 3 1.00 fcvtxn v0.2s, v0.2d
+# CHECK-NEXT: 1 3 1.00 fcvtxn2 v0.4s, v0.2d
+# CHECK-NEXT: 1 3 1.00 fcvtzs d21, d12, #1
+# CHECK-NEXT: 1 3 1.00 fcvtzs d21, d14
+# CHECK-NEXT: 1 3 1.00 fcvtzs s12, s13
+# CHECK-NEXT: 1 3 1.00 fcvtzs s21, s12, #1
+# CHECK-NEXT: 1 3 1.00 fcvtzs h21, h14
+# CHECK-NEXT: 1 3 1.00 fcvtzs h21, h12, #1
+# CHECK-NEXT: 1 3 1.00 fcvtzs v0.2d, v0.2d
+# CHECK-NEXT: 1 3 1.00 fcvtzs v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 3 1.00 fcvtzs v0.2s, v0.2s
+# CHECK-NEXT: 1 3 1.00 fcvtzs v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 3 1.00 fcvtzs v0.4h, v0.4h
+# CHECK-NEXT: 1 3 1.00 fcvtzs v20.4h, v24.4h, #11
+# CHECK-NEXT: 1 3 1.00 fcvtzs v0.4s, v0.4s
+# CHECK-NEXT: 1 3 1.00 fcvtzs v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 3 1.00 fcvtzs v0.8h, v0.8h
+# CHECK-NEXT: 1 3 1.00 fcvtzs v18.8h, v10.8h, #7
+# CHECK-NEXT: 1 3 1.00 fcvtzu d21, d12, #1
+# CHECK-NEXT: 1 3 1.00 fcvtzu d21, d14
+# CHECK-NEXT: 1 3 1.00 fcvtzu s12, s13
+# CHECK-NEXT: 1 3 1.00 fcvtzu s21, s12, #1
+# CHECK-NEXT: 1 3 1.00 fcvtzu h12, h13
+# CHECK-NEXT: 1 3 1.00 fcvtzu h21, h12, #1
+# CHECK-NEXT: 1 3 1.00 fcvtzu v0.2d, v0.2d
+# CHECK-NEXT: 1 3 1.00 fcvtzu v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 3 1.00 fcvtzu v0.2s, v0.2s
+# CHECK-NEXT: 1 3 1.00 fcvtzu v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 3 1.00 fcvtzu v0.4h, v0.4h
+# CHECK-NEXT: 1 3 1.00 fcvtzu v19.4h, v26.4h, #9
+# CHECK-NEXT: 1 3 1.00 fcvtzu v0.4s, v0.4s
+# CHECK-NEXT: 1 3 1.00 fcvtzu v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 3 1.00 fcvtzu v0.8h, v0.8h
+# CHECK-NEXT: 1 3 1.00 fcvtzu v27.8h, v6.8h, #11
----------------
Asher8118 wrote:
Throughput 1 issue.
https://github.com/llvm/llvm-project/pull/182251
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