[llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)

[Stanislav Mekhanoshin via llvm-commits]

rampitec wrote:

> > Remember offset only uses 16 bits on the LDS side.
> 
> Oh so actually if the imm offset is bigger than that, the LDS offset reversal should cap out at 16 bit max?

Yes, 16 bit unsigned.

https://github.com/llvm/llvm-project/pull/185078