[llvm] [RISCV] Add findCommutedOpIndices support for Zvabd (PR #184602)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-risc-v

Author: Pengcheng Wang (wangpc-pp)

<details>
<summary>Changes</summary>



---
Full diff: https://github.com/llvm/llvm-project/pull/184602.diff


1 Files Affected:

- (modified) llvm/lib/Target/RISCV/RISCVInstrInfo.cpp (+4) 


``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index 6ddd058d8e2a8..e6fbd5c182ee8 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -4170,6 +4170,10 @@ bool RISCVInstrInfo::findCommutedOpIndices(const MachineInstr &MI,
   case CASE_RVV_OPCODE_WIDEN(VWMULU_VV):
   case CASE_RVV_OPCODE_WIDEN(VWMACC_VV):
   case CASE_RVV_OPCODE_WIDEN(VWMACCU_VV):
+  case CASE_RVV_OPCODE(VABD_VV):
+  case CASE_RVV_OPCODE(VABDU_VV):
+  case CASE_RVV_OPCODE_WIDEN(VWABDA_VV):
+  case CASE_RVV_OPCODE_WIDEN(VWABDAU_VV):
   case CASE_RVV_OPCODE_UNMASK(VADC_VVM):
   case CASE_RVV_OPCODE(VSADD_VV):
   case CASE_RVV_OPCODE(VSADDU_VV):

``````````

</details>


https://github.com/llvm/llvm-project/pull/184602