[llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)

[Derek Schuff via llvm-commits]

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@@ -243,16 +272,16 @@ multiclass WebAssemblyBinRMW<WebAssemblyRegClass rc, string name,
                              int atomic_op> {
   defm "_A32" :
     ATOMIC_I<(outs rc:$dst),
-             (ins P2Align:$p2align, offset32_op:$off, I32:$addr, rc:$val),
-             (outs), (ins P2Align:$p2align, offset32_op:$off), [],
-             !strconcat(name, "\t$dst, ${off}(${addr})${p2align}, $val"),
-             !strconcat(name, "\t${off}${p2align}"), atomic_op, false>;
+             (ins MemOrder:$order, P2Align:$p2align, offset32_op:$off, I32:$addr, rc:$val),
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dschuff wrote:

There is encoding space for 2 orders but they have to match, so there is semantically only one ordering. I think it makes sense for the TableGen to match the semantics rather than the encoding (especially given that there aren't currently plans to lift that restriction).

https://github.com/llvm/llvm-project/pull/183656