[llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)

[Matt Arsenault via llvm-commits]

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@@ -17497,6 +17536,95 @@ SDValue SITargetLowering::performSelectCombine(SDNode *N,
                          SelectLHS, SelectRHS);
 }
 
+SDValue
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arsenm wrote:

This combine seems like a separate change 

https://github.com/llvm/llvm-project/pull/145052