[llvm] 89d6936 - [AArch64][GlobalISel] Add more gisel test coverage. NFC
David Green via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 6 13:57:52 PST 2026
Author: David Green
Date: 2026-03-06T21:57:46Z
New Revision: 89d69363a5f6819078e181265d56781c3cf80cad
URL: https://github.com/llvm/llvm-project/commit/89d69363a5f6819078e181265d56781c3cf80cad
DIFF: https://github.com/llvm/llvm-project/commit/89d69363a5f6819078e181265d56781c3cf80cad.diff
LOG: [AArch64][GlobalISel] Add more gisel test coverage. NFC
Added:
Modified:
llvm/test/CodeGen/AArch64/arm64-build-vector.ll
llvm/test/CodeGen/AArch64/bf16-imm.ll
llvm/test/CodeGen/AArch64/f16-imm.ll
llvm/test/CodeGen/AArch64/fabs-combine.ll
llvm/test/CodeGen/AArch64/fdiv-const.ll
llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll
llvm/test/CodeGen/AArch64/half-precision-signof-no-assert.ll
llvm/test/CodeGen/AArch64/isinf.ll
llvm/test/CodeGen/AArch64/known-never-nan.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/arm64-build-vector.ll b/llvm/test/CodeGen/AArch64/arm64-build-vector.ll
index 82802c79c7085..914f431866cce 100644
--- a/llvm/test/CodeGen/AArch64/arm64-build-vector.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-build-vector.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16,+bf16 | FileCheck %s
+; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16,+bf16 | FileCheck %s --check-prefixes=CHECK,CHECK-SD
+; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16,+bf16 -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI
; Check that building a vector from floats doesn't insert an unnecessary
; copy for lane zero.
@@ -22,12 +23,22 @@ define <4 x float> @foo(float %a, float %b, float %c, float %d) nounwind {
}
define <8 x i16> @build_all_zero(<8 x i16> %a) #1 {
-; CHECK-LABEL: build_all_zero:
-; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #44672 // =0xae80
-; CHECK-NEXT: fmov s1, w8
-; CHECK-NEXT: mul v0.8h, v0.8h, v1.8h
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: build_all_zero:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #44672 // =0xae80
+; CHECK-SD-NEXT: fmov s1, w8
+; CHECK-SD-NEXT: mul v0.8h, v0.8h, v1.8h
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: build_all_zero:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #32768 // =0x8000
+; CHECK-GI-NEXT: fmov s1, w8
+; CHECK-GI-NEXT: mov w8, #44672 // =0xae80
+; CHECK-GI-NEXT: add v0.8h, v0.8h, v1.8h
+; CHECK-GI-NEXT: fmov s1, w8
+; CHECK-GI-NEXT: mul v0.8h, v0.8h, v1.8h
+; CHECK-GI-NEXT: ret
%b = add <8 x i16> %a, <i16 -32768, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef>
%c = mul <8 x i16> %b, <i16 -20864, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef>
ret <8 x i16> %c
@@ -39,10 +50,16 @@ define <8 x i16> @build_all_zero(<8 x i16> %a) #1 {
; This case checks when A,B and C,D are
diff erent types, there should be no
; assertion failure.
define <8 x i16> @concat_2_build_vector(<4 x i16> %in0) {
-; CHECK-LABEL: concat_2_build_vector:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v0.2d, #0000000000000000
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: concat_2_build_vector:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v0.2d, #0000000000000000
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: concat_2_build_vector:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v0.2d, #0000000000000000
+; CHECK-GI-NEXT: fmov d0, d0
+; CHECK-GI-NEXT: ret
%vshl_n = shl <4 x i16> %in0, <i16 8, i16 8, i16 8, i16 8>
%vshl_n2 = shl <4 x i16> %vshl_n, <i16 9, i16 9, i16 9, i16 9>
%shuffle.i = shufflevector <4 x i16> %vshl_n2, <4 x i16> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
@@ -54,24 +71,38 @@ define <8 x i16> @concat_2_build_vector(<4 x i16> %in0) {
; normalizing the vector generates a valid result. The choice of the
; constant prevents earlier passes from replacing the BUILD_VECTOR.
define void @widen_f16_build_vector(ptr %addr) {
-; CHECK-LABEL: widen_f16_build_vector:
-; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #13294 // =0x33ee
-; CHECK-NEXT: movk w8, #13294, lsl #16
-; CHECK-NEXT: str w8, [x0]
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: widen_f16_build_vector:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #13294 // =0x33ee
+; CHECK-SD-NEXT: movk w8, #13294, lsl #16
+; CHECK-SD-NEXT: str w8, [x0]
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: widen_f16_build_vector:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #13294 // =0x33ee
+; CHECK-GI-NEXT: strh w8, [x0]
+; CHECK-GI-NEXT: strh w8, [x0, #2]
+; CHECK-GI-NEXT: ret
store <2 x half> <half 0xH33EE, half 0xH33EE>, ptr %addr, align 2
ret void
}
; Check that a single element vector is constructed with a mov
define <1 x i64> @single_element_vector_i64(<1 x i64> %arg) {
-; CHECK-LABEL: single_element_vector_i64:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: mov w8, #1 // =0x1
-; CHECK-NEXT: fmov d1, x8
-; CHECK-NEXT: add d0, d0, d1
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: single_element_vector_i64:
+; CHECK-SD: // %bb.0: // %entry
+; CHECK-SD-NEXT: mov w8, #1 // =0x1
+; CHECK-SD-NEXT: fmov d1, x8
+; CHECK-SD-NEXT: add d0, d0, d1
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: single_element_vector_i64:
+; CHECK-GI: // %bb.0: // %entry
+; CHECK-GI-NEXT: fmov x8, d0
+; CHECK-GI-NEXT: add x8, x8, #1
+; CHECK-GI-NEXT: fmov d0, x8
+; CHECK-GI-NEXT: ret
entry:
%add = add <1 x i64> %arg, <i64 1>
ret <1 x i64> %add
@@ -91,15 +122,24 @@ entry:
; Make sure BUILD_VECTOR does not get stuck in a loop trying to convert a
; single element FP vector constant from a scalar to vector.
define <1 x double> @convert_single_fp_vector_constant(i1 %cmp) {
-; CHECK-LABEL: convert_single_fp_vector_constant:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: tst w0, #0x1
-; CHECK-NEXT: mov x8, #4607182418800017408 // =0x3ff0000000000000
-; CHECK-NEXT: csetm x9, ne
-; CHECK-NEXT: fmov d0, x8
-; CHECK-NEXT: fmov d1, x9
-; CHECK-NEXT: and v0.8b, v0.8b, v1.8b
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: convert_single_fp_vector_constant:
+; CHECK-SD: // %bb.0: // %entry
+; CHECK-SD-NEXT: tst w0, #0x1
+; CHECK-SD-NEXT: mov x8, #4607182418800017408 // =0x3ff0000000000000
+; CHECK-SD-NEXT: csetm x9, ne
+; CHECK-SD-NEXT: fmov d0, x8
+; CHECK-SD-NEXT: fmov d1, x9
+; CHECK-SD-NEXT: and v0.8b, v0.8b, v1.8b
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: convert_single_fp_vector_constant:
+; CHECK-GI: // %bb.0: // %entry
+; CHECK-GI-NEXT: movi d0, #0000000000000000
+; CHECK-GI-NEXT: fmov d1, #1.00000000
+; CHECK-GI-NEXT: and w8, w0, #0x1
+; CHECK-GI-NEXT: tst w8, #0x1
+; CHECK-GI-NEXT: fcsel d0, d1, d0, ne
+; CHECK-GI-NEXT: ret
entry:
%sel = select i1 %cmp, <1 x double> <double 1.000000e+00>, <1 x double> zeroinitializer
ret <1 x double> %sel
@@ -160,31 +200,49 @@ define <4 x float> @poszero_v4f32(<4 x float> %a) {
}
define <4 x float> @negzero_v4f32(<4 x float> %a) {
-; CHECK-LABEL: negzero_v4f32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.4s, #128, lsl #24
-; CHECK-NEXT: fmul v0.4s, v0.4s, v1.4s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: negzero_v4f32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.4s, #128, lsl #24
+; CHECK-SD-NEXT: fmul v0.4s, v0.4s, v1.4s
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: negzero_v4f32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2s, #128, lsl #24
+; CHECK-GI-NEXT: fmul v0.4s, v0.4s, v1.s[0]
+; CHECK-GI-NEXT: ret
%b = fmul <4 x float> %a, <float -0.0, float -0.0, float -0.0, float -0.0>
ret <4 x float> %b
}
define <2 x float> @poszero_v2f32(<2 x float> %a) {
-; CHECK-LABEL: poszero_v2f32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi d1, #0000000000000000
-; CHECK-NEXT: fadd v0.2s, v0.2s, v1.2s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: poszero_v2f32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi d1, #0000000000000000
+; CHECK-SD-NEXT: fadd v0.2s, v0.2s, v1.2s
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: poszero_v2f32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: fadd v0.2s, v0.2s, v1.2s
+; CHECK-GI-NEXT: ret
%b = fadd <2 x float> %a, <float 0.0, float 0.0>
ret <2 x float> %b
}
define <2 x float> @negzero_v2f32(<2 x float> %a) {
-; CHECK-LABEL: negzero_v2f32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.2s, #128, lsl #24
-; CHECK-NEXT: fmul v0.2s, v0.2s, v1.2s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: negzero_v2f32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.2s, #128, lsl #24
+; CHECK-SD-NEXT: fmul v0.2s, v0.2s, v1.2s
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: negzero_v2f32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2s, #128, lsl #24
+; CHECK-GI-NEXT: fmul v0.2s, v0.2s, v1.s[0]
+; CHECK-GI-NEXT: ret
%b = fmul <2 x float> %a, <float -0.0, float -0.0>
ret <2 x float> %b
}
@@ -210,11 +268,17 @@ define <8 x half> @negzero_v8f16(<8 x half> %a) {
}
define <4 x half> @poszero_v4f16(<4 x half> %a) {
-; CHECK-LABEL: poszero_v4f16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi d1, #0000000000000000
-; CHECK-NEXT: fadd v0.4h, v0.4h, v1.4h
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: poszero_v4f16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi d1, #0000000000000000
+; CHECK-SD-NEXT: fadd v0.4h, v0.4h, v1.4h
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: poszero_v4f16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
+; CHECK-GI-NEXT: fadd v0.4h, v0.4h, v1.4h
+; CHECK-GI-NEXT: ret
%b = fadd <4 x half> %a, <half 0.0, half 0.0, half 0.0, half 0.0>
ret <4 x half> %b
}
@@ -246,10 +310,15 @@ define <8 x bfloat> @negzero_v8bf16(<8 x bfloat> %a) {
}
define <4 x bfloat> @poszero_v4bf16(<4 x bfloat> %a) {
-; CHECK-LABEL: poszero_v4bf16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi d0, #0000000000000000
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: poszero_v4bf16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi d0, #0000000000000000
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: poszero_v4bf16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v0.2d, #0000000000000000
+; CHECK-GI-NEXT: ret
ret <4 x bfloat> <bfloat 0.0, bfloat 0.0, bfloat 0.0, bfloat 0.0>
}
diff --git a/llvm/test/CodeGen/AArch64/bf16-imm.ll b/llvm/test/CodeGen/AArch64/bf16-imm.ll
index 450bf286d8d78..7383a741c5fc3 100644
--- a/llvm/test/CodeGen/AArch64/bf16-imm.ll
+++ b/llvm/test/CodeGen/AArch64/bf16-imm.ll
@@ -1,6 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-FP16
-; RUN: llc < %s -mtriple=aarch64 -mattr=-fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16
+; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-FP16-SD
+; RUN: llc < %s -mtriple=aarch64 -mattr=-fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16,CHECK-NOFP16-SD
+; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-FP16-GI
+; RUN: llc < %s -mtriple=aarch64 -mattr=-fullfp16 -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16,CHECK-NOFP16-GI
define bfloat @Const0() {
; CHECK-LABEL: Const0:
@@ -72,50 +74,71 @@ entry:
}
define bfloat @Const5() {
-; CHECK-FP16-LABEL: Const5:
-; CHECK-FP16: // %bb.0: // %entry
-; CHECK-FP16-NEXT: mov w8, #12272 // =0x2ff0
-; CHECK-FP16-NEXT: fmov h0, w8
-; CHECK-FP16-NEXT: ret
+; CHECK-FP16-SD-LABEL: Const5:
+; CHECK-FP16-SD: // %bb.0: // %entry
+; CHECK-FP16-SD-NEXT: mov w8, #12272 // =0x2ff0
+; CHECK-FP16-SD-NEXT: fmov h0, w8
+; CHECK-FP16-SD-NEXT: ret
;
; CHECK-NOFP16-LABEL: Const5:
; CHECK-NOFP16: // %bb.0: // %entry
; CHECK-NOFP16-NEXT: adrp x8, .LCPI5_0
; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI5_0]
; CHECK-NOFP16-NEXT: ret
+;
+; CHECK-FP16-GI-LABEL: Const5:
+; CHECK-FP16-GI: // %bb.0: // %entry
+; CHECK-FP16-GI-NEXT: adrp x8, .LCPI5_0
+; CHECK-FP16-GI-NEXT: ldr h0, [x8, :lo12:.LCPI5_0]
+; CHECK-FP16-GI-NEXT: ret
entry:
ret bfloat 0xR2FF0
}
define bfloat @Const6() {
-; CHECK-FP16-LABEL: Const6:
-; CHECK-FP16: // %bb.0: // %entry
-; CHECK-FP16-NEXT: mov w8, #20417 // =0x4fc1
-; CHECK-FP16-NEXT: fmov h0, w8
-; CHECK-FP16-NEXT: ret
+; CHECK-FP16-SD-LABEL: Const6:
+; CHECK-FP16-SD: // %bb.0: // %entry
+; CHECK-FP16-SD-NEXT: mov w8, #20417 // =0x4fc1
+; CHECK-FP16-SD-NEXT: fmov h0, w8
+; CHECK-FP16-SD-NEXT: ret
;
; CHECK-NOFP16-LABEL: Const6:
; CHECK-NOFP16: // %bb.0: // %entry
; CHECK-NOFP16-NEXT: adrp x8, .LCPI6_0
; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI6_0]
; CHECK-NOFP16-NEXT: ret
+;
+; CHECK-FP16-GI-LABEL: Const6:
+; CHECK-FP16-GI: // %bb.0: // %entry
+; CHECK-FP16-GI-NEXT: adrp x8, .LCPI6_0
+; CHECK-FP16-GI-NEXT: ldr h0, [x8, :lo12:.LCPI6_0]
+; CHECK-FP16-GI-NEXT: ret
entry:
ret bfloat 0xR4FC1
}
define bfloat @Const7() {
-; CHECK-FP16-LABEL: Const7:
-; CHECK-FP16: // %bb.0: // %entry
-; CHECK-FP16-NEXT: mov w8, #20480 // =0x5000
-; CHECK-FP16-NEXT: fmov h0, w8
-; CHECK-FP16-NEXT: ret
+; CHECK-FP16-SD-LABEL: Const7:
+; CHECK-FP16-SD: // %bb.0: // %entry
+; CHECK-FP16-SD-NEXT: mov w8, #20480 // =0x5000
+; CHECK-FP16-SD-NEXT: fmov h0, w8
+; CHECK-FP16-SD-NEXT: ret
;
; CHECK-NOFP16-LABEL: Const7:
; CHECK-NOFP16: // %bb.0: // %entry
; CHECK-NOFP16-NEXT: adrp x8, .LCPI7_0
; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI7_0]
; CHECK-NOFP16-NEXT: ret
+;
+; CHECK-FP16-GI-LABEL: Const7:
+; CHECK-FP16-GI: // %bb.0: // %entry
+; CHECK-FP16-GI-NEXT: adrp x8, .LCPI7_0
+; CHECK-FP16-GI-NEXT: ldr h0, [x8, :lo12:.LCPI7_0]
+; CHECK-FP16-GI-NEXT: ret
entry:
ret bfloat 0xR5000
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-NOFP16-GI: {{.*}}
+; CHECK-NOFP16-SD: {{.*}}
diff --git a/llvm/test/CodeGen/AArch64/f16-imm.ll b/llvm/test/CodeGen/AArch64/f16-imm.ll
index 68873f9b7c3de..911bf44a3ce93 100644
--- a/llvm/test/CodeGen/AArch64/f16-imm.ll
+++ b/llvm/test/CodeGen/AArch64/f16-imm.ll
@@ -1,7 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16,+no-zcz-fpr64 | FileCheck %s --check-prefixes=CHECK-FP16,CHECK-NOZCZ
-; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16,+zcz-gpr32,+zcz-gpr64 | FileCheck %s --check-prefixes=CHECK-FP16,CHECK-ZCZ
-; RUN: llc < %s -mtriple=aarch64 -mattr=-fullfp16 | FileCheck %s --check-prefixes=CHECK-NOFP16
+; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16,+no-zcz-fpr64 | FileCheck %s --check-prefixes=CHECK-FP16,CHECK-NOZCZ,CHECK-NOZCZ-SD
+; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16,+zcz-gpr32,+zcz-gpr64 | FileCheck %s --check-prefixes=CHECK-FP16,CHECK-ZCZ,CHECK-ZCZ-SD
+; RUN: llc < %s -mtriple=aarch64 -mattr=-fullfp16 | FileCheck %s --check-prefixes=CHECK-NOFP16,CHECK-NOFP16-SD
+; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16,+no-zcz-fpr64 -global-isel | FileCheck %s --check-prefixes=CHECK-FP16,CHECK-NOZCZ,CHECK-NOZCZ-GI
+; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16,+zcz-gpr32,+zcz-gpr64 -global-isel | FileCheck %s --check-prefixes=CHECK-FP16,CHECK-ZCZ,CHECK-ZCZ-GI
+; RUN: llc < %s -mtriple=aarch64 -mattr=-fullfp16 -global-isel | FileCheck %s --check-prefixes=CHECK-NOFP16,CHECK-NOFP16-GI
define half @Const0() {
; CHECK-NOZCZ-LABEL: Const0:
@@ -83,50 +86,107 @@ entry:
}
define half @Const5() {
-; CHECK-FP16-LABEL: Const5:
-; CHECK-FP16: // %bb.0: // %entry
-; CHECK-FP16-NEXT: mov w8, #12272
-; CHECK-FP16-NEXT: fmov h0, w8
-; CHECK-FP16-NEXT: ret
+; CHECK-NOZCZ-SD-LABEL: Const5:
+; CHECK-NOZCZ-SD: // %bb.0: // %entry
+; CHECK-NOZCZ-SD-NEXT: mov w8, #12272 // =0x2ff0
+; CHECK-NOZCZ-SD-NEXT: fmov h0, w8
+; CHECK-NOZCZ-SD-NEXT: ret
+;
+; CHECK-ZCZ-SD-LABEL: Const5:
+; CHECK-ZCZ-SD: // %bb.0: // %entry
+; CHECK-ZCZ-SD-NEXT: mov w8, #12272 // =0x2ff0
+; CHECK-ZCZ-SD-NEXT: fmov h0, w8
+; CHECK-ZCZ-SD-NEXT: ret
;
; CHECK-NOFP16-LABEL: Const5:
; CHECK-NOFP16: // %bb.0: // %entry
; CHECK-NOFP16-NEXT: adrp x8, .LCPI5_0
; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI5_0]
; CHECK-NOFP16-NEXT: ret
+;
+; CHECK-NOZCZ-GI-LABEL: Const5:
+; CHECK-NOZCZ-GI: // %bb.0: // %entry
+; CHECK-NOZCZ-GI-NEXT: adrp x8, .LCPI5_0
+; CHECK-NOZCZ-GI-NEXT: ldr h0, [x8, :lo12:.LCPI5_0]
+; CHECK-NOZCZ-GI-NEXT: ret
+;
+; CHECK-ZCZ-GI-LABEL: Const5:
+; CHECK-ZCZ-GI: // %bb.0: // %entry
+; CHECK-ZCZ-GI-NEXT: adrp x8, .LCPI5_0
+; CHECK-ZCZ-GI-NEXT: ldr h0, [x8, :lo12:.LCPI5_0]
+; CHECK-ZCZ-GI-NEXT: ret
entry:
ret half 0xH2FF0
}
define half @Const6() {
-; CHECK-FP16-LABEL: Const6:
-; CHECK-FP16: // %bb.0: // %entry
-; CHECK-FP16-NEXT: mov w8, #20417
-; CHECK-FP16-NEXT: fmov h0, w8
-; CHECK-FP16-NEXT: ret
+; CHECK-NOZCZ-SD-LABEL: Const6:
+; CHECK-NOZCZ-SD: // %bb.0: // %entry
+; CHECK-NOZCZ-SD-NEXT: mov w8, #20417 // =0x4fc1
+; CHECK-NOZCZ-SD-NEXT: fmov h0, w8
+; CHECK-NOZCZ-SD-NEXT: ret
+;
+; CHECK-ZCZ-SD-LABEL: Const6:
+; CHECK-ZCZ-SD: // %bb.0: // %entry
+; CHECK-ZCZ-SD-NEXT: mov w8, #20417 // =0x4fc1
+; CHECK-ZCZ-SD-NEXT: fmov h0, w8
+; CHECK-ZCZ-SD-NEXT: ret
;
; CHECK-NOFP16-LABEL: Const6:
; CHECK-NOFP16: // %bb.0: // %entry
; CHECK-NOFP16-NEXT: adrp x8, .LCPI6_0
; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI6_0]
; CHECK-NOFP16-NEXT: ret
+;
+; CHECK-NOZCZ-GI-LABEL: Const6:
+; CHECK-NOZCZ-GI: // %bb.0: // %entry
+; CHECK-NOZCZ-GI-NEXT: adrp x8, .LCPI6_0
+; CHECK-NOZCZ-GI-NEXT: ldr h0, [x8, :lo12:.LCPI6_0]
+; CHECK-NOZCZ-GI-NEXT: ret
+;
+; CHECK-ZCZ-GI-LABEL: Const6:
+; CHECK-ZCZ-GI: // %bb.0: // %entry
+; CHECK-ZCZ-GI-NEXT: adrp x8, .LCPI6_0
+; CHECK-ZCZ-GI-NEXT: ldr h0, [x8, :lo12:.LCPI6_0]
+; CHECK-ZCZ-GI-NEXT: ret
entry:
ret half 0xH4FC1
}
define half @Const7() {
-; CHECK-FP16-LABEL: Const7:
-; CHECK-FP16: // %bb.0: // %entry
-; CHECK-FP16-NEXT: mov w8, #20480
-; CHECK-FP16-NEXT: fmov h0, w8
-; CHECK-FP16-NEXT: ret
+; CHECK-NOZCZ-SD-LABEL: Const7:
+; CHECK-NOZCZ-SD: // %bb.0: // %entry
+; CHECK-NOZCZ-SD-NEXT: mov w8, #20480 // =0x5000
+; CHECK-NOZCZ-SD-NEXT: fmov h0, w8
+; CHECK-NOZCZ-SD-NEXT: ret
+;
+; CHECK-ZCZ-SD-LABEL: Const7:
+; CHECK-ZCZ-SD: // %bb.0: // %entry
+; CHECK-ZCZ-SD-NEXT: mov w8, #20480 // =0x5000
+; CHECK-ZCZ-SD-NEXT: fmov h0, w8
+; CHECK-ZCZ-SD-NEXT: ret
;
; CHECK-NOFP16-LABEL: Const7:
; CHECK-NOFP16: // %bb.0: // %entry
; CHECK-NOFP16-NEXT: adrp x8, .LCPI7_0
; CHECK-NOFP16-NEXT: ldr h0, [x8, :lo12:.LCPI7_0]
; CHECK-NOFP16-NEXT: ret
+;
+; CHECK-NOZCZ-GI-LABEL: Const7:
+; CHECK-NOZCZ-GI: // %bb.0: // %entry
+; CHECK-NOZCZ-GI-NEXT: adrp x8, .LCPI7_0
+; CHECK-NOZCZ-GI-NEXT: ldr h0, [x8, :lo12:.LCPI7_0]
+; CHECK-NOZCZ-GI-NEXT: ret
+;
+; CHECK-ZCZ-GI-LABEL: Const7:
+; CHECK-ZCZ-GI: // %bb.0: // %entry
+; CHECK-ZCZ-GI-NEXT: adrp x8, .LCPI7_0
+; CHECK-ZCZ-GI-NEXT: ldr h0, [x8, :lo12:.LCPI7_0]
+; CHECK-ZCZ-GI-NEXT: ret
entry:
ret half 0xH5000
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-NOFP16-GI: {{.*}}
+; CHECK-NOFP16-SD: {{.*}}
diff --git a/llvm/test/CodeGen/AArch64/fabs-combine.ll b/llvm/test/CodeGen/AArch64/fabs-combine.ll
index d083f2006575b..a7f6a251cdc1b 100644
--- a/llvm/test/CodeGen/AArch64/fabs-combine.ll
+++ b/llvm/test/CodeGen/AArch64/fabs-combine.ll
@@ -1,5 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=aarch64-unknown-unknown | FileCheck %s
+; RUN: llc < %s -mtriple=aarch64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,CHECK-SD
+; RUN: llc < %s -mtriple=aarch64-unknown-unknown -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
+
+; CHECK-GI: warning: Instruction selection used fallback path for not_fabs
+; CHECK-GI-NEXT: warning: Instruction selection used fallback path for still_not_fabs
; Test against PR36600: https://bugs.llvm.org/show_bug.cgi?id=36600
; This is not fabs. If X = -0.0, it should return -0.0 not 0.0.
@@ -34,11 +38,18 @@ define float @still_not_fabs(float %x) #0 {
}
define float @nabsf(float %a) {
-; CHECK-LABEL: nabsf:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fabs s0, s0
-; CHECK-NEXT: fneg s0, s0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: nabsf:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fabs s0, s0
+; CHECK-SD-NEXT: fneg s0, s0
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: nabsf:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fmov w8, s0
+; CHECK-GI-NEXT: orr w8, w8, #0x80000000
+; CHECK-GI-NEXT: fmov s0, w8
+; CHECK-GI-NEXT: ret
%conv = bitcast float %a to i32
%and = or i32 %conv, -2147483648
%conv1 = bitcast i32 %and to float
@@ -46,11 +57,18 @@ define float @nabsf(float %a) {
}
define double @nabsd(double %a) {
-; CHECK-LABEL: nabsd:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fabs d0, d0
-; CHECK-NEXT: fneg d0, d0
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: nabsd:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fabs d0, d0
+; CHECK-SD-NEXT: fneg d0, d0
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: nabsd:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fmov x8, d0
+; CHECK-GI-NEXT: orr x8, x8, #0x8000000000000000
+; CHECK-GI-NEXT: fmov d0, x8
+; CHECK-GI-NEXT: ret
%conv = bitcast double %a to i64
%and = or i64 %conv, -9223372036854775808
%conv1 = bitcast i64 %and to double
@@ -58,10 +76,16 @@ define double @nabsd(double %a) {
}
define <4 x float> @nabsv4f32(<4 x float> %a) {
-; CHECK-LABEL: nabsv4f32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: orr v0.4s, #128, lsl #24
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: nabsv4f32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: orr v0.4s, #128, lsl #24
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: nabsv4f32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.4s, #128, lsl #24
+; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
+; CHECK-GI-NEXT: ret
%conv = bitcast <4 x float> %a to <4 x i32>
%and = or <4 x i32> %conv, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>
%conv1 = bitcast <4 x i32> %and to <4 x float>
diff --git a/llvm/test/CodeGen/AArch64/fdiv-const.ll b/llvm/test/CodeGen/AArch64/fdiv-const.ll
index 7aa89db71adfe..2866b5f6d8f20 100644
--- a/llvm/test/CodeGen/AArch64/fdiv-const.ll
+++ b/llvm/test/CodeGen/AArch64/fdiv-const.ll
@@ -1,22 +1,37 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=arm64-eabi -mattr=fullfp16,sve | FileCheck %s
+; RUN: llc < %s -mtriple=arm64-eabi -mattr=fullfp16,sve | FileCheck %s --check-prefixes=CHECK,CHECK-SD
+; RUN: llc < %s -mtriple=arm64-eabi -mattr=fullfp16,sve -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
+
+; CHECK-GI: warning: Instruction selection used fallback path for divnxv4f32_2
define float @divf32_2(float %a) nounwind {
-; CHECK-LABEL: divf32_2:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fmov s1, #0.50000000
-; CHECK-NEXT: fmul s0, s0, s1
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: divf32_2:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fmov s1, #0.50000000
+; CHECK-SD-NEXT: fmul s0, s0, s1
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: divf32_2:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fmov s1, #2.00000000
+; CHECK-GI-NEXT: fdiv s0, s0, s1
+; CHECK-GI-NEXT: ret
%r = fdiv float %a, 2.0
ret float %r
}
define float @divf32_2_arcp(float %a) nounwind {
-; CHECK-LABEL: divf32_2_arcp:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fmov s1, #0.50000000
-; CHECK-NEXT: fmul s0, s0, s1
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: divf32_2_arcp:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fmov s1, #0.50000000
+; CHECK-SD-NEXT: fmul s0, s0, s1
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: divf32_2_arcp:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fmov s1, #2.00000000
+; CHECK-GI-NEXT: fdiv s0, s0, s1
+; CHECK-GI-NEXT: ret
%r = fdiv arcp float %a, 2.0
ret float %r
}
@@ -32,75 +47,119 @@ define float @divf32_p75(float %a) nounwind {
}
define float @divf32_p75_arcp(float %a) nounwind {
-; CHECK-LABEL: divf32_p75_arcp:
-; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #43691 // =0xaaab
-; CHECK-NEXT: movk w8, #16298, lsl #16
-; CHECK-NEXT: fmov s1, w8
-; CHECK-NEXT: fmul s0, s0, s1
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: divf32_p75_arcp:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #43691 // =0xaaab
+; CHECK-SD-NEXT: movk w8, #16298, lsl #16
+; CHECK-SD-NEXT: fmov s1, w8
+; CHECK-SD-NEXT: fmul s0, s0, s1
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: divf32_p75_arcp:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fmov s1, #0.75000000
+; CHECK-GI-NEXT: fdiv s0, s0, s1
+; CHECK-GI-NEXT: ret
%r = fdiv arcp float %a, 0.75
ret float %r
}
define half @divf16_2(half %a) nounwind {
-; CHECK-LABEL: divf16_2:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fmov h1, #0.50000000
-; CHECK-NEXT: fmul h0, h0, h1
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: divf16_2:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fmov h1, #0.50000000
+; CHECK-SD-NEXT: fmul h0, h0, h1
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: divf16_2:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fmov h1, #2.00000000
+; CHECK-GI-NEXT: fdiv h0, h0, h1
+; CHECK-GI-NEXT: ret
%r = fdiv half %a, 2.0
ret half %r
}
define half @divf16_32768(half %a) nounwind {
-; CHECK-LABEL: divf16_32768:
-; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #30720 // =0x7800
-; CHECK-NEXT: fmov h1, w8
-; CHECK-NEXT: fdiv h0, h0, h1
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: divf16_32768:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #30720 // =0x7800
+; CHECK-SD-NEXT: fmov h1, w8
+; CHECK-SD-NEXT: fdiv h0, h0, h1
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: divf16_32768:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI5_0
+; CHECK-GI-NEXT: ldr h1, [x8, :lo12:.LCPI5_0]
+; CHECK-GI-NEXT: fdiv h0, h0, h1
+; CHECK-GI-NEXT: ret
%r = fdiv half %a, 32768.0
ret half %r
}
define half @divf16_32768_arcp(half %a) nounwind {
-; CHECK-LABEL: divf16_32768_arcp:
-; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #30720 // =0x7800
-; CHECK-NEXT: fmov h1, w8
-; CHECK-NEXT: fdiv h0, h0, h1
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: divf16_32768_arcp:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #30720 // =0x7800
+; CHECK-SD-NEXT: fmov h1, w8
+; CHECK-SD-NEXT: fdiv h0, h0, h1
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: divf16_32768_arcp:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: adrp x8, .LCPI6_0
+; CHECK-GI-NEXT: ldr h1, [x8, :lo12:.LCPI6_0]
+; CHECK-GI-NEXT: fdiv h0, h0, h1
+; CHECK-GI-NEXT: ret
%r = fdiv arcp half %a, 32768.0
ret half %r
}
define double @divf64_2(double %a) nounwind {
-; CHECK-LABEL: divf64_2:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fmov d1, #0.50000000
-; CHECK-NEXT: fmul d0, d0, d1
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: divf64_2:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fmov d1, #0.50000000
+; CHECK-SD-NEXT: fmul d0, d0, d1
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: divf64_2:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fmov d1, #2.00000000
+; CHECK-GI-NEXT: fdiv d0, d0, d1
+; CHECK-GI-NEXT: ret
%r = fdiv double %a, 2.0
ret double %r
}
define <4 x float> @divv4f32_2(<4 x float> %a) nounwind {
-; CHECK-LABEL: divv4f32_2:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.4s, #63, lsl #24
-; CHECK-NEXT: fmul v0.4s, v0.4s, v1.4s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: divv4f32_2:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.4s, #63, lsl #24
+; CHECK-SD-NEXT: fmul v0.4s, v0.4s, v1.4s
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: divv4f32_2:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.4s, #64, lsl #24
+; CHECK-GI-NEXT: fdiv v0.4s, v0.4s, v1.4s
+; CHECK-GI-NEXT: ret
%r = fdiv <4 x float> %a, <float 2.0, float 2.0, float 2.0, float 2.0>
ret <4 x float> %r
}
define <4 x float> @divv4f32_2_arcp(<4 x float> %a) nounwind {
-; CHECK-LABEL: divv4f32_2_arcp:
-; CHECK: // %bb.0:
-; CHECK-NEXT: movi v1.4s, #63, lsl #24
-; CHECK-NEXT: fmul v0.4s, v0.4s, v1.4s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: divv4f32_2_arcp:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: movi v1.4s, #63, lsl #24
+; CHECK-SD-NEXT: fmul v0.4s, v0.4s, v1.4s
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: divv4f32_2_arcp:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: movi v1.4s, #64, lsl #24
+; CHECK-GI-NEXT: fdiv v0.4s, v0.4s, v1.4s
+; CHECK-GI-NEXT: ret
%r = fdiv arcp <4 x float> %a, <float 2.0, float 2.0, float 2.0, float 2.0>
ret <4 x float> %r
}
@@ -116,13 +175,19 @@ define <4 x float> @divv4f32_3(<4 x float> %a) nounwind {
}
define <4 x float> @divv4f32_3_arcp(<4 x float> %a) nounwind {
-; CHECK-LABEL: divv4f32_3_arcp:
-; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #43691 // =0xaaab
-; CHECK-NEXT: movk w8, #16042, lsl #16
-; CHECK-NEXT: dup v1.4s, w8
-; CHECK-NEXT: fmul v0.4s, v0.4s, v1.4s
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: divv4f32_3_arcp:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #43691 // =0xaaab
+; CHECK-SD-NEXT: movk w8, #16042, lsl #16
+; CHECK-SD-NEXT: dup v1.4s, w8
+; CHECK-SD-NEXT: fmul v0.4s, v0.4s, v1.4s
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: divv4f32_3_arcp:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fmov v1.4s, #3.00000000
+; CHECK-GI-NEXT: fdiv v0.4s, v0.4s, v1.4s
+; CHECK-GI-NEXT: ret
%r = fdiv arcp <4 x float> %a, <float 3.0, float 3.0, float 3.0, float 3.0>
ret <4 x float> %r
}
diff --git a/llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll b/llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll
index 9bdbf82b3a781..5353920ed5667 100644
--- a/llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll
+++ b/llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll
@@ -1,57 +1,193 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc --mtriple=aarch64 --mattr=+fullfp16 < %s | FileCheck %s --check-prefixes=AARCH64,FULLFP16
-; RUN: llc --mtriple=aarch64 < %s | FileCheck %s --check-prefixes=AARCH64,NOFULLFP16
+; RUN: llc --mtriple=aarch64 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16,CHECK-NOFP16-SD
+; RUN: llc --mtriple=aarch64 --mattr=+fullfp16 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-FP16-SD
+; RUN: llc --mtriple=aarch64 < %s -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16,CHECK-NOFP16-GI
+; RUN: llc --mtriple=aarch64 --mattr=+fullfp16 < %s -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-FP16-GI
+
+; CHECK-NOFP16-GI: warning: Instruction selection used fallback path for max_nnan_f64
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v2f64
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v3f64
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v4f64
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v2f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v3f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v4f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v5f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v8f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v2f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v4f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v8f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v9f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v16f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_f64
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v2f64
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v3f64
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v4f64
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v2f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v3f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v4f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v5f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v8f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v2f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v4f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v8f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v9f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v16f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_fp128
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_f64
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_v2f64
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_v3f64
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_v4f64
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_v2f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_v3f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_v4f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_v5f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_v8f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_v2f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_v4f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_v8f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_v9f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for max_v16f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_fp128
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_f64
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_v2f64
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_v3f64
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_v4f64
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_v2f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_v3f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_v4f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_v5f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_v8f32
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_v2f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_v4f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_v8f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_v9f16
+; CHECK-NOFP16-GI-NEXT: warning: Instruction selection used fallback path for min_v16f16
+;
+; CHECK-FP16-GI: warning: Instruction selection used fallback path for max_nnan_f64
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v2f64
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v3f64
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v4f64
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v2f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v3f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v4f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v5f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v8f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v2f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v4f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v8f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v9f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_nnan_v16f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_f64
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v2f64
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v3f64
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v4f64
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v2f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v3f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v4f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v5f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v8f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v2f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v4f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v8f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v9f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_nnan_v16f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_fp128
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_f64
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_v2f64
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_v3f64
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_v4f64
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_v2f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_v3f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_v4f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_v5f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_v8f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_v2f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_v4f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_v8f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_v9f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for max_v16f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_fp128
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_f64
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_v2f64
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_v3f64
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_v4f64
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_v2f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_v3f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_v4f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_v5f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_v8f32
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_v2f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_v4f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_v8f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_v9f16
+; CHECK-FP16-GI-NEXT: warning: Instruction selection used fallback path for min_v16f16
;;;;;;;;;;;;;;;; max_f64
define double @max_nnan_f64(double %a, double %b) {
-; AARCH64-LABEL: max_nnan_f64:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fmaxnm d0, d0, d1
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_nnan_f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fmaxnm d0, d0, d1
+; CHECK-NEXT: ret
entry:
%c = call nnan double @llvm.maximumnum.f64(double %a, double %b)
ret double %c
}
define <2 x double> @max_nnan_v2f64(<2 x double> %a, <2 x double> %b) {
-; AARCH64-LABEL: max_nnan_v2f64:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fmaxnm v0.2d, v0.2d, v1.2d
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_nnan_v2f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fmaxnm v0.2d, v0.2d, v1.2d
+; CHECK-NEXT: ret
entry:
%c = call nnan <2 x double> @llvm.maximumnum.v2f64(<2 x double> %a, <2 x double> %b)
ret <2 x double> %c
}
define <3 x double> @max_nnan_v3f64(<3 x double> %a, <3 x double> %b) {
-; AARCH64-LABEL: max_nnan_v3f64:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: // kill: def $d3 killed $d3 def $q3
-; AARCH64-NEXT: // kill: def $d0 killed $d0 def $q0
-; AARCH64-NEXT: // kill: def $d4 killed $d4 def $q4
-; AARCH64-NEXT: // kill: def $d1 killed $d1 def $q1
-; AARCH64-NEXT: // kill: def $d2 killed $d2 def $q2
-; AARCH64-NEXT: // kill: def $d5 killed $d5 def $q5
-; AARCH64-NEXT: mov v3.d[1], v4.d[0]
-; AARCH64-NEXT: mov v0.d[1], v1.d[0]
-; AARCH64-NEXT: fmaxnm v2.2d, v2.2d, v5.2d
-; AARCH64-NEXT: // kill: def $d2 killed $d2 killed $q2
-; AARCH64-NEXT: fmaxnm v0.2d, v0.2d, v3.2d
-; AARCH64-NEXT: ext v1.16b, v0.16b, v0.16b, #8
-; AARCH64-NEXT: // kill: def $d0 killed $d0 killed $q0
-; AARCH64-NEXT: // kill: def $d1 killed $d1 killed $q1
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_nnan_v3f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: // kill: def $d3 killed $d3 def $q3
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT: // kill: def $d4 killed $d4 def $q4
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
+; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
+; CHECK-NEXT: // kill: def $d5 killed $d5 def $q5
+; CHECK-NEXT: mov v3.d[1], v4.d[0]
+; CHECK-NEXT: mov v0.d[1], v1.d[0]
+; CHECK-NEXT: fmaxnm v2.2d, v2.2d, v5.2d
+; CHECK-NEXT: // kill: def $d2 killed $d2 killed $q2
+; CHECK-NEXT: fmaxnm v0.2d, v0.2d, v3.2d
+; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q1
+; CHECK-NEXT: ret
entry:
%c = call nnan <3 x double> @llvm.maximumnum.v3f64(<3 x double> %a, <3 x double> %b)
ret <3 x double> %c
}
define <4 x double> @max_nnan_v4f64(<4 x double> %a, <4 x double> %b) {
-; AARCH64-LABEL: max_nnan_v4f64:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fmaxnm v1.2d, v1.2d, v3.2d
-; AARCH64-NEXT: fmaxnm v0.2d, v0.2d, v2.2d
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_nnan_v4f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fmaxnm v1.2d, v1.2d, v3.2d
+; CHECK-NEXT: fmaxnm v0.2d, v0.2d, v2.2d
+; CHECK-NEXT: ret
entry:
%c = call nnan <4 x double> @llvm.maximumnum.v4f64(<4 x double> %a, <4 x double> %b)
ret <4 x double> %c
@@ -59,83 +195,83 @@ entry:
;;;;;;;;;;;;;;;;;; max_f32
define float @max_nnan_f32(float %a, float %b) {
-; AARCH64-LABEL: max_nnan_f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fmaxnm s0, s0, s1
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_nnan_f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fmaxnm s0, s0, s1
+; CHECK-NEXT: ret
entry:
%c = call nnan float @llvm.maximumnum.f32(float %a, float %b)
ret float %c
}
define <2 x float> @max_nnan_v2f32(<2 x float> %a, <2 x float> %b) {
-; AARCH64-LABEL: max_nnan_v2f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fmaxnm v0.2s, v0.2s, v1.2s
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_nnan_v2f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fmaxnm v0.2s, v0.2s, v1.2s
+; CHECK-NEXT: ret
entry:
%c = call nnan <2 x float> @llvm.maximumnum.v2f32(<2 x float> %a, <2 x float> %b)
ret <2 x float> %c
}
define <3 x float> @max_nnan_v3f32(<3 x float> %a, <3 x float> %b) {
-; AARCH64-LABEL: max_nnan_v3f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fmaxnm v0.4s, v0.4s, v1.4s
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_nnan_v3f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fmaxnm v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: ret
entry:
%c = call nnan <3 x float> @llvm.maximumnum.v3f32(<3 x float> %a, <3 x float> %b)
ret <3 x float> %c
}
define <4 x float> @max_nnan_v4f32(<4 x float> %a, <4 x float> %b) {
-; AARCH64-LABEL: max_nnan_v4f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fmaxnm v0.4s, v0.4s, v1.4s
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_nnan_v4f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fmaxnm v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: ret
entry:
%c = call nnan <4 x float> @llvm.maximumnum.v4f32(<4 x float> %a, <4 x float> %b)
ret <4 x float> %c
}
define <5 x float> @max_nnan_v5f32(<5 x float> %a, <5 x float> %b) {
-; AARCH64-LABEL: max_nnan_v5f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: // kill: def $s0 killed $s0 def $q0
-; AARCH64-NEXT: // kill: def $s5 killed $s5 def $q5
-; AARCH64-NEXT: // kill: def $s1 killed $s1 def $q1
-; AARCH64-NEXT: // kill: def $s6 killed $s6 def $q6
-; AARCH64-NEXT: // kill: def $s2 killed $s2 def $q2
-; AARCH64-NEXT: // kill: def $s7 killed $s7 def $q7
-; AARCH64-NEXT: // kill: def $s3 killed $s3 def $q3
-; AARCH64-NEXT: mov x8, sp
-; AARCH64-NEXT: // kill: def $s4 killed $s4 def $q4
-; AARCH64-NEXT: mov v0.s[1], v1.s[0]
-; AARCH64-NEXT: mov v5.s[1], v6.s[0]
-; AARCH64-NEXT: mov v0.s[2], v2.s[0]
-; AARCH64-NEXT: mov v5.s[2], v7.s[0]
-; AARCH64-NEXT: ldr s2, [sp, #8]
-; AARCH64-NEXT: fmaxnm v4.4s, v4.4s, v2.4s
-; AARCH64-NEXT: // kill: def $s4 killed $s4 killed $q4
-; AARCH64-NEXT: mov v0.s[3], v3.s[0]
-; AARCH64-NEXT: ld1 { v5.s }[3], [x8]
-; AARCH64-NEXT: fmaxnm v0.4s, v0.4s, v5.4s
-; AARCH64-NEXT: mov s1, v0.s[1]
-; AARCH64-NEXT: mov s2, v0.s[2]
-; AARCH64-NEXT: mov s3, v0.s[3]
-; AARCH64-NEXT: // kill: def $s0 killed $s0 killed $q0
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_nnan_v5f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: // kill: def $s0 killed $s0 def $q0
+; CHECK-NEXT: // kill: def $s5 killed $s5 def $q5
+; CHECK-NEXT: // kill: def $s1 killed $s1 def $q1
+; CHECK-NEXT: // kill: def $s6 killed $s6 def $q6
+; CHECK-NEXT: // kill: def $s2 killed $s2 def $q2
+; CHECK-NEXT: // kill: def $s7 killed $s7 def $q7
+; CHECK-NEXT: // kill: def $s3 killed $s3 def $q3
+; CHECK-NEXT: mov x8, sp
+; CHECK-NEXT: // kill: def $s4 killed $s4 def $q4
+; CHECK-NEXT: mov v0.s[1], v1.s[0]
+; CHECK-NEXT: mov v5.s[1], v6.s[0]
+; CHECK-NEXT: mov v0.s[2], v2.s[0]
+; CHECK-NEXT: mov v5.s[2], v7.s[0]
+; CHECK-NEXT: ldr s2, [sp, #8]
+; CHECK-NEXT: fmaxnm v4.4s, v4.4s, v2.4s
+; CHECK-NEXT: // kill: def $s4 killed $s4 killed $q4
+; CHECK-NEXT: mov v0.s[3], v3.s[0]
+; CHECK-NEXT: ld1 { v5.s }[3], [x8]
+; CHECK-NEXT: fmaxnm v0.4s, v0.4s, v5.4s
+; CHECK-NEXT: mov s1, v0.s[1]
+; CHECK-NEXT: mov s2, v0.s[2]
+; CHECK-NEXT: mov s3, v0.s[3]
+; CHECK-NEXT: // kill: def $s0 killed $s0 killed $q0
+; CHECK-NEXT: ret
entry:
%c = call nnan <5 x float> @llvm.maximumnum.v5f32(<5 x float> %a, <5 x float> %b)
ret <5 x float> %c
}
define <8 x float> @max_nnan_v8f32(<8 x float> %a, <8 x float> %b) {
-; AARCH64-LABEL: max_nnan_v8f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fmaxnm v1.4s, v1.4s, v3.4s
-; AARCH64-NEXT: fmaxnm v0.4s, v0.4s, v2.4s
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_nnan_v8f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fmaxnm v1.4s, v1.4s, v3.4s
+; CHECK-NEXT: fmaxnm v0.4s, v0.4s, v2.4s
+; CHECK-NEXT: ret
entry:
%c = call nnan <8 x float> @llvm.maximumnum.v8f32(<8 x float> %a, <8 x float> %b)
ret <8 x float> %c
@@ -143,397 +279,397 @@ entry:
;;;;;;;;;;;;;;;;;; max_f16
define half @max_nnan_f16(half %a, half %b) {
-; FULLFP16-LABEL: max_nnan_f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fmaxnm h0, h0, h1
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: max_nnan_f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fcvt s0, h0
+; CHECK-NOFP16-NEXT: fmaxnm s0, s0, s1
+; CHECK-NOFP16-NEXT: fcvt h0, s0
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: max_nnan_f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fcvt s0, h0
-; NOFULLFP16-NEXT: fmaxnm s0, s0, s1
-; NOFULLFP16-NEXT: fcvt h0, s0
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: max_nnan_f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fmaxnm h0, h0, h1
+; CHECK-FP16-NEXT: ret
entry:
%c = call nnan half @llvm.maximumnum.f16(half %a, half %b)
ret half %c
}
define <2 x half> @max_nnan_v2f16(<2 x half> %a, <2 x half> %b) {
-; FULLFP16-LABEL: max_nnan_v2f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: max_nnan_v2f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: // kill: def $d1 killed $d1 def $q1
+; CHECK-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
+; CHECK-NOFP16-NEXT: mov h2, v1.h[1]
+; CHECK-NOFP16-NEXT: mov h3, v0.h[1]
+; CHECK-NOFP16-NEXT: mov h4, v1.h[2]
+; CHECK-NOFP16-NEXT: mov h5, v0.h[2]
+; CHECK-NOFP16-NEXT: fcvt s6, h1
+; CHECK-NOFP16-NEXT: fcvt s7, h0
+; CHECK-NOFP16-NEXT: mov h1, v1.h[3]
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fmaxnm s2, s3, s2
+; CHECK-NOFP16-NEXT: fcvt s3, h4
+; CHECK-NOFP16-NEXT: fcvt s4, h5
+; CHECK-NOFP16-NEXT: fmaxnm s5, s7, s6
+; CHECK-NOFP16-NEXT: mov h6, v0.h[3]
+; CHECK-NOFP16-NEXT: fmaxnm s3, s4, s3
+; CHECK-NOFP16-NEXT: fcvt h2, s2
+; CHECK-NOFP16-NEXT: fcvt h0, s5
+; CHECK-NOFP16-NEXT: fcvt s4, h6
+; CHECK-NOFP16-NEXT: mov v0.h[1], v2.h[0]
+; CHECK-NOFP16-NEXT: fcvt h2, s3
+; CHECK-NOFP16-NEXT: fmaxnm s1, s4, s1
+; CHECK-NOFP16-NEXT: mov v0.h[2], v2.h[0]
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: mov v0.h[3], v1.h[0]
+; CHECK-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: max_nnan_v2f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: // kill: def $d1 killed $d1 def $q1
-; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 def $q0
-; NOFULLFP16-NEXT: mov h2, v1.h[1]
-; NOFULLFP16-NEXT: mov h3, v0.h[1]
-; NOFULLFP16-NEXT: mov h4, v1.h[2]
-; NOFULLFP16-NEXT: mov h5, v0.h[2]
-; NOFULLFP16-NEXT: fcvt s6, h1
-; NOFULLFP16-NEXT: fcvt s7, h0
-; NOFULLFP16-NEXT: mov h1, v1.h[3]
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fmaxnm s2, s3, s2
-; NOFULLFP16-NEXT: fcvt s3, h4
-; NOFULLFP16-NEXT: fcvt s4, h5
-; NOFULLFP16-NEXT: fmaxnm s5, s7, s6
-; NOFULLFP16-NEXT: mov h6, v0.h[3]
-; NOFULLFP16-NEXT: fmaxnm s3, s4, s3
-; NOFULLFP16-NEXT: fcvt h2, s2
-; NOFULLFP16-NEXT: fcvt h0, s5
-; NOFULLFP16-NEXT: fcvt s4, h6
-; NOFULLFP16-NEXT: mov v0.h[1], v2.h[0]
-; NOFULLFP16-NEXT: fcvt h2, s3
-; NOFULLFP16-NEXT: fmaxnm s1, s4, s1
-; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: mov v0.h[3], v1.h[0]
-; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: max_nnan_v2f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
+; CHECK-FP16-NEXT: ret
entry:
%c = call nnan <2 x half> @llvm.maximumnum.v2f16(<2 x half> %a, <2 x half> %b)
ret <2 x half> %c
}
define <4 x half> @max_nnan_v4f16(<4 x half> %a, <4 x half> %b) {
-; FULLFP16-LABEL: max_nnan_v4f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: max_nnan_v4f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: // kill: def $d1 killed $d1 def $q1
+; CHECK-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
+; CHECK-NOFP16-NEXT: mov h2, v1.h[1]
+; CHECK-NOFP16-NEXT: mov h3, v0.h[1]
+; CHECK-NOFP16-NEXT: mov h4, v1.h[2]
+; CHECK-NOFP16-NEXT: mov h5, v0.h[2]
+; CHECK-NOFP16-NEXT: fcvt s6, h1
+; CHECK-NOFP16-NEXT: fcvt s7, h0
+; CHECK-NOFP16-NEXT: mov h1, v1.h[3]
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fmaxnm s2, s3, s2
+; CHECK-NOFP16-NEXT: fcvt s3, h4
+; CHECK-NOFP16-NEXT: fcvt s4, h5
+; CHECK-NOFP16-NEXT: fmaxnm s5, s7, s6
+; CHECK-NOFP16-NEXT: mov h6, v0.h[3]
+; CHECK-NOFP16-NEXT: fmaxnm s3, s4, s3
+; CHECK-NOFP16-NEXT: fcvt h2, s2
+; CHECK-NOFP16-NEXT: fcvt h0, s5
+; CHECK-NOFP16-NEXT: fcvt s4, h6
+; CHECK-NOFP16-NEXT: mov v0.h[1], v2.h[0]
+; CHECK-NOFP16-NEXT: fcvt h2, s3
+; CHECK-NOFP16-NEXT: fmaxnm s1, s4, s1
+; CHECK-NOFP16-NEXT: mov v0.h[2], v2.h[0]
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: mov v0.h[3], v1.h[0]
+; CHECK-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: max_nnan_v4f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: // kill: def $d1 killed $d1 def $q1
-; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 def $q0
-; NOFULLFP16-NEXT: mov h2, v1.h[1]
-; NOFULLFP16-NEXT: mov h3, v0.h[1]
-; NOFULLFP16-NEXT: mov h4, v1.h[2]
-; NOFULLFP16-NEXT: mov h5, v0.h[2]
-; NOFULLFP16-NEXT: fcvt s6, h1
-; NOFULLFP16-NEXT: fcvt s7, h0
-; NOFULLFP16-NEXT: mov h1, v1.h[3]
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fmaxnm s2, s3, s2
-; NOFULLFP16-NEXT: fcvt s3, h4
-; NOFULLFP16-NEXT: fcvt s4, h5
-; NOFULLFP16-NEXT: fmaxnm s5, s7, s6
-; NOFULLFP16-NEXT: mov h6, v0.h[3]
-; NOFULLFP16-NEXT: fmaxnm s3, s4, s3
-; NOFULLFP16-NEXT: fcvt h2, s2
-; NOFULLFP16-NEXT: fcvt h0, s5
-; NOFULLFP16-NEXT: fcvt s4, h6
-; NOFULLFP16-NEXT: mov v0.h[1], v2.h[0]
-; NOFULLFP16-NEXT: fcvt h2, s3
-; NOFULLFP16-NEXT: fmaxnm s1, s4, s1
-; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: mov v0.h[3], v1.h[0]
-; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: max_nnan_v4f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
+; CHECK-FP16-NEXT: ret
entry:
%c = call nnan <4 x half> @llvm.maximumnum.v4f16(<4 x half> %a, <4 x half> %b)
ret <4 x half> %c
}
define <8 x half> @max_nnan_v8f16(<8 x half> %a, <8 x half> %b) {
-; FULLFP16-LABEL: max_nnan_v8f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: max_nnan_v8f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: mov h2, v1.h[1]
+; CHECK-NOFP16-NEXT: mov h3, v0.h[1]
+; CHECK-NOFP16-NEXT: fcvt s4, h1
+; CHECK-NOFP16-NEXT: fcvt s5, h0
+; CHECK-NOFP16-NEXT: mov h6, v1.h[2]
+; CHECK-NOFP16-NEXT: mov h7, v0.h[2]
+; CHECK-NOFP16-NEXT: mov h16, v1.h[3]
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fmaxnm s4, s5, s4
+; CHECK-NOFP16-NEXT: mov h5, v0.h[3]
+; CHECK-NOFP16-NEXT: fcvt s6, h6
+; CHECK-NOFP16-NEXT: fcvt s7, h7
+; CHECK-NOFP16-NEXT: fcvt s16, h16
+; CHECK-NOFP16-NEXT: fmaxnm s3, s3, s2
+; CHECK-NOFP16-NEXT: fcvt s5, h5
+; CHECK-NOFP16-NEXT: fcvt h2, s4
+; CHECK-NOFP16-NEXT: fmaxnm s4, s7, s6
+; CHECK-NOFP16-NEXT: mov h6, v1.h[4]
+; CHECK-NOFP16-NEXT: mov h7, v0.h[4]
+; CHECK-NOFP16-NEXT: fcvt h3, s3
+; CHECK-NOFP16-NEXT: fmaxnm s5, s5, s16
+; CHECK-NOFP16-NEXT: mov h16, v0.h[5]
+; CHECK-NOFP16-NEXT: fcvt h4, s4
+; CHECK-NOFP16-NEXT: mov v2.h[1], v3.h[0]
+; CHECK-NOFP16-NEXT: fcvt s3, h6
+; CHECK-NOFP16-NEXT: fcvt s6, h7
+; CHECK-NOFP16-NEXT: mov h7, v1.h[5]
+; CHECK-NOFP16-NEXT: fcvt h5, s5
+; CHECK-NOFP16-NEXT: fcvt s16, h16
+; CHECK-NOFP16-NEXT: mov v2.h[2], v4.h[0]
+; CHECK-NOFP16-NEXT: mov h4, v1.h[6]
+; CHECK-NOFP16-NEXT: fmaxnm s3, s6, s3
+; CHECK-NOFP16-NEXT: mov h6, v0.h[6]
+; CHECK-NOFP16-NEXT: fcvt s7, h7
+; CHECK-NOFP16-NEXT: mov h1, v1.h[7]
+; CHECK-NOFP16-NEXT: mov h0, v0.h[7]
+; CHECK-NOFP16-NEXT: mov v2.h[3], v5.h[0]
+; CHECK-NOFP16-NEXT: fcvt s4, h4
+; CHECK-NOFP16-NEXT: fcvt h3, s3
+; CHECK-NOFP16-NEXT: fcvt s5, h6
+; CHECK-NOFP16-NEXT: fmaxnm s6, s16, s7
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fcvt s0, h0
+; CHECK-NOFP16-NEXT: mov v2.h[4], v3.h[0]
+; CHECK-NOFP16-NEXT: fmaxnm s4, s5, s4
+; CHECK-NOFP16-NEXT: fcvt h3, s6
+; CHECK-NOFP16-NEXT: fmaxnm s0, s0, s1
+; CHECK-NOFP16-NEXT: mov v2.h[5], v3.h[0]
+; CHECK-NOFP16-NEXT: fcvt h3, s4
+; CHECK-NOFP16-NEXT: fcvt h0, s0
+; CHECK-NOFP16-NEXT: mov v2.h[6], v3.h[0]
+; CHECK-NOFP16-NEXT: mov v2.h[7], v0.h[0]
+; CHECK-NOFP16-NEXT: mov v0.16b, v2.16b
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: max_nnan_v8f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: mov h2, v1.h[1]
-; NOFULLFP16-NEXT: mov h3, v0.h[1]
-; NOFULLFP16-NEXT: fcvt s4, h1
-; NOFULLFP16-NEXT: fcvt s5, h0
-; NOFULLFP16-NEXT: mov h6, v1.h[2]
-; NOFULLFP16-NEXT: mov h7, v0.h[2]
-; NOFULLFP16-NEXT: mov h16, v1.h[3]
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fmaxnm s4, s5, s4
-; NOFULLFP16-NEXT: mov h5, v0.h[3]
-; NOFULLFP16-NEXT: fcvt s6, h6
-; NOFULLFP16-NEXT: fcvt s7, h7
-; NOFULLFP16-NEXT: fcvt s16, h16
-; NOFULLFP16-NEXT: fmaxnm s3, s3, s2
-; NOFULLFP16-NEXT: fcvt s5, h5
-; NOFULLFP16-NEXT: fcvt h2, s4
-; NOFULLFP16-NEXT: fmaxnm s4, s7, s6
-; NOFULLFP16-NEXT: mov h6, v1.h[4]
-; NOFULLFP16-NEXT: mov h7, v0.h[4]
-; NOFULLFP16-NEXT: fcvt h3, s3
-; NOFULLFP16-NEXT: fmaxnm s5, s5, s16
-; NOFULLFP16-NEXT: mov h16, v0.h[5]
-; NOFULLFP16-NEXT: fcvt h4, s4
-; NOFULLFP16-NEXT: mov v2.h[1], v3.h[0]
-; NOFULLFP16-NEXT: fcvt s3, h6
-; NOFULLFP16-NEXT: fcvt s6, h7
-; NOFULLFP16-NEXT: mov h7, v1.h[5]
-; NOFULLFP16-NEXT: fcvt h5, s5
-; NOFULLFP16-NEXT: fcvt s16, h16
-; NOFULLFP16-NEXT: mov v2.h[2], v4.h[0]
-; NOFULLFP16-NEXT: mov h4, v1.h[6]
-; NOFULLFP16-NEXT: fmaxnm s3, s6, s3
-; NOFULLFP16-NEXT: mov h6, v0.h[6]
-; NOFULLFP16-NEXT: fcvt s7, h7
-; NOFULLFP16-NEXT: mov h1, v1.h[7]
-; NOFULLFP16-NEXT: mov h0, v0.h[7]
-; NOFULLFP16-NEXT: mov v2.h[3], v5.h[0]
-; NOFULLFP16-NEXT: fcvt s4, h4
-; NOFULLFP16-NEXT: fcvt h3, s3
-; NOFULLFP16-NEXT: fcvt s5, h6
-; NOFULLFP16-NEXT: fmaxnm s6, s16, s7
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fcvt s0, h0
-; NOFULLFP16-NEXT: mov v2.h[4], v3.h[0]
-; NOFULLFP16-NEXT: fmaxnm s4, s5, s4
-; NOFULLFP16-NEXT: fcvt h3, s6
-; NOFULLFP16-NEXT: fmaxnm s0, s0, s1
-; NOFULLFP16-NEXT: mov v2.h[5], v3.h[0]
-; NOFULLFP16-NEXT: fcvt h3, s4
-; NOFULLFP16-NEXT: fcvt h0, s0
-; NOFULLFP16-NEXT: mov v2.h[6], v3.h[0]
-; NOFULLFP16-NEXT: mov v2.h[7], v0.h[0]
-; NOFULLFP16-NEXT: mov v0.16b, v2.16b
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: max_nnan_v8f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
+; CHECK-FP16-NEXT: ret
entry:
%c = call nnan <8 x half> @llvm.maximumnum.v8f16(<8 x half> %a, <8 x half> %b)
ret <8 x half> %c
}
define <9 x half> @max_nnan_v9f16(<9 x half> %a, <9 x half> %b) {
-; FULLFP16-LABEL: max_nnan_v9f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: // kill: def $h0 killed $h0 def $q0
-; FULLFP16-NEXT: // kill: def $h1 killed $h1 def $q1
-; FULLFP16-NEXT: // kill: def $h2 killed $h2 def $q2
-; FULLFP16-NEXT: add x9, sp, #16
-; FULLFP16-NEXT: // kill: def $h3 killed $h3 def $q3
-; FULLFP16-NEXT: // kill: def $h4 killed $h4 def $q4
-; FULLFP16-NEXT: // kill: def $h5 killed $h5 def $q5
-; FULLFP16-NEXT: // kill: def $h6 killed $h6 def $q6
-; FULLFP16-NEXT: // kill: def $h7 killed $h7 def $q7
-; FULLFP16-NEXT: mov v0.h[1], v1.h[0]
-; FULLFP16-NEXT: ldr h1, [sp, #8]
-; FULLFP16-NEXT: ld1 { v1.h }[1], [x9]
-; FULLFP16-NEXT: add x9, sp, #24
-; FULLFP16-NEXT: mov v0.h[2], v2.h[0]
-; FULLFP16-NEXT: ldr h2, [sp, #72]
-; FULLFP16-NEXT: ld1 { v1.h }[2], [x9]
-; FULLFP16-NEXT: add x9, sp, #32
-; FULLFP16-NEXT: mov v0.h[3], v3.h[0]
-; FULLFP16-NEXT: ld1 { v1.h }[3], [x9]
-; FULLFP16-NEXT: add x9, sp, #40
-; FULLFP16-NEXT: ldr h3, [sp]
-; FULLFP16-NEXT: ld1 { v1.h }[4], [x9]
-; FULLFP16-NEXT: add x9, sp, #48
-; FULLFP16-NEXT: fmaxnm v2.8h, v3.8h, v2.8h
-; FULLFP16-NEXT: mov v0.h[4], v4.h[0]
-; FULLFP16-NEXT: ld1 { v1.h }[5], [x9]
-; FULLFP16-NEXT: add x9, sp, #56
-; FULLFP16-NEXT: str h2, [x8, #16]
-; FULLFP16-NEXT: mov v0.h[5], v5.h[0]
-; FULLFP16-NEXT: ld1 { v1.h }[6], [x9]
-; FULLFP16-NEXT: add x9, sp, #64
-; FULLFP16-NEXT: mov v0.h[6], v6.h[0]
-; FULLFP16-NEXT: ld1 { v1.h }[7], [x9]
-; FULLFP16-NEXT: mov v0.h[7], v7.h[0]
-; FULLFP16-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
-; FULLFP16-NEXT: str q0, [x8]
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: max_nnan_v9f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: ldr h16, [sp, #16]
+; CHECK-NOFP16-NEXT: ldr h17, [sp, #8]
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fcvt s0, h0
+; CHECK-NOFP16-NEXT: ldr h18, [sp, #24]
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s16, h16
+; CHECK-NOFP16-NEXT: fcvt s17, h17
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fcvt s18, h18
+; CHECK-NOFP16-NEXT: fcvt s4, h4
+; CHECK-NOFP16-NEXT: fcvt s5, h5
+; CHECK-NOFP16-NEXT: fmaxnm s1, s1, s16
+; CHECK-NOFP16-NEXT: fmaxnm s0, s0, s17
+; CHECK-NOFP16-NEXT: ldr h16, [sp, #32]
+; CHECK-NOFP16-NEXT: fmaxnm s2, s2, s18
+; CHECK-NOFP16-NEXT: ldr h17, [sp, #40]
+; CHECK-NOFP16-NEXT: fcvt s16, h16
+; CHECK-NOFP16-NEXT: fcvt s17, h17
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: fcvt h0, s0
+; CHECK-NOFP16-NEXT: fcvt h2, s2
+; CHECK-NOFP16-NEXT: fmaxnm s3, s3, s16
+; CHECK-NOFP16-NEXT: fmaxnm s4, s4, s17
+; CHECK-NOFP16-NEXT: mov v0.h[1], v1.h[0]
+; CHECK-NOFP16-NEXT: ldr h1, [sp, #48]
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fcvt h3, s3
+; CHECK-NOFP16-NEXT: fcvt h4, s4
+; CHECK-NOFP16-NEXT: mov v0.h[2], v2.h[0]
+; CHECK-NOFP16-NEXT: ldr h2, [sp, #56]
+; CHECK-NOFP16-NEXT: fmaxnm s1, s5, s1
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: ldr h5, [sp, #64]
+; CHECK-NOFP16-NEXT: mov v0.h[3], v3.h[0]
+; CHECK-NOFP16-NEXT: fcvt s3, h6
+; CHECK-NOFP16-NEXT: ldr h6, [sp, #72]
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: fcvt s6, h6
+; CHECK-NOFP16-NEXT: mov v0.h[4], v4.h[0]
+; CHECK-NOFP16-NEXT: fmaxnm s2, s3, s2
+; CHECK-NOFP16-NEXT: fcvt s3, h5
+; CHECK-NOFP16-NEXT: fcvt s4, h7
+; CHECK-NOFP16-NEXT: ldr h5, [sp]
+; CHECK-NOFP16-NEXT: fcvt s5, h5
+; CHECK-NOFP16-NEXT: mov v0.h[5], v1.h[0]
+; CHECK-NOFP16-NEXT: fcvt h1, s2
+; CHECK-NOFP16-NEXT: fmaxnm s2, s4, s3
+; CHECK-NOFP16-NEXT: fmaxnm s3, s5, s6
+; CHECK-NOFP16-NEXT: mov v0.h[6], v1.h[0]
+; CHECK-NOFP16-NEXT: fcvt h1, s2
+; CHECK-NOFP16-NEXT: fcvt h2, s3
+; CHECK-NOFP16-NEXT: mov v0.h[7], v1.h[0]
+; CHECK-NOFP16-NEXT: str h2, [x8, #16]
+; CHECK-NOFP16-NEXT: str q0, [x8]
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: max_nnan_v9f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: ldr h16, [sp, #16]
-; NOFULLFP16-NEXT: ldr h17, [sp, #8]
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fcvt s0, h0
-; NOFULLFP16-NEXT: ldr h18, [sp, #24]
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s16, h16
-; NOFULLFP16-NEXT: fcvt s17, h17
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fcvt s18, h18
-; NOFULLFP16-NEXT: fcvt s4, h4
-; NOFULLFP16-NEXT: fcvt s5, h5
-; NOFULLFP16-NEXT: fmaxnm s1, s1, s16
-; NOFULLFP16-NEXT: fmaxnm s0, s0, s17
-; NOFULLFP16-NEXT: ldr h16, [sp, #32]
-; NOFULLFP16-NEXT: fmaxnm s2, s2, s18
-; NOFULLFP16-NEXT: ldr h17, [sp, #40]
-; NOFULLFP16-NEXT: fcvt s16, h16
-; NOFULLFP16-NEXT: fcvt s17, h17
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: fcvt h0, s0
-; NOFULLFP16-NEXT: fcvt h2, s2
-; NOFULLFP16-NEXT: fmaxnm s3, s3, s16
-; NOFULLFP16-NEXT: fmaxnm s4, s4, s17
-; NOFULLFP16-NEXT: mov v0.h[1], v1.h[0]
-; NOFULLFP16-NEXT: ldr h1, [sp, #48]
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fcvt h3, s3
-; NOFULLFP16-NEXT: fcvt h4, s4
-; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
-; NOFULLFP16-NEXT: ldr h2, [sp, #56]
-; NOFULLFP16-NEXT: fmaxnm s1, s5, s1
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: ldr h5, [sp, #64]
-; NOFULLFP16-NEXT: mov v0.h[3], v3.h[0]
-; NOFULLFP16-NEXT: fcvt s3, h6
-; NOFULLFP16-NEXT: ldr h6, [sp, #72]
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: fcvt s6, h6
-; NOFULLFP16-NEXT: mov v0.h[4], v4.h[0]
-; NOFULLFP16-NEXT: fmaxnm s2, s3, s2
-; NOFULLFP16-NEXT: fcvt s3, h5
-; NOFULLFP16-NEXT: fcvt s4, h7
-; NOFULLFP16-NEXT: ldr h5, [sp]
-; NOFULLFP16-NEXT: fcvt s5, h5
-; NOFULLFP16-NEXT: mov v0.h[5], v1.h[0]
-; NOFULLFP16-NEXT: fcvt h1, s2
-; NOFULLFP16-NEXT: fmaxnm s2, s4, s3
-; NOFULLFP16-NEXT: fmaxnm s3, s5, s6
-; NOFULLFP16-NEXT: mov v0.h[6], v1.h[0]
-; NOFULLFP16-NEXT: fcvt h1, s2
-; NOFULLFP16-NEXT: fcvt h2, s3
-; NOFULLFP16-NEXT: mov v0.h[7], v1.h[0]
-; NOFULLFP16-NEXT: str h2, [x8, #16]
-; NOFULLFP16-NEXT: str q0, [x8]
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: max_nnan_v9f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: // kill: def $h0 killed $h0 def $q0
+; CHECK-FP16-NEXT: // kill: def $h1 killed $h1 def $q1
+; CHECK-FP16-NEXT: // kill: def $h2 killed $h2 def $q2
+; CHECK-FP16-NEXT: add x9, sp, #16
+; CHECK-FP16-NEXT: // kill: def $h3 killed $h3 def $q3
+; CHECK-FP16-NEXT: // kill: def $h4 killed $h4 def $q4
+; CHECK-FP16-NEXT: // kill: def $h5 killed $h5 def $q5
+; CHECK-FP16-NEXT: // kill: def $h6 killed $h6 def $q6
+; CHECK-FP16-NEXT: // kill: def $h7 killed $h7 def $q7
+; CHECK-FP16-NEXT: mov v0.h[1], v1.h[0]
+; CHECK-FP16-NEXT: ldr h1, [sp, #8]
+; CHECK-FP16-NEXT: ld1 { v1.h }[1], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #24
+; CHECK-FP16-NEXT: mov v0.h[2], v2.h[0]
+; CHECK-FP16-NEXT: ldr h2, [sp, #72]
+; CHECK-FP16-NEXT: ld1 { v1.h }[2], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #32
+; CHECK-FP16-NEXT: mov v0.h[3], v3.h[0]
+; CHECK-FP16-NEXT: ld1 { v1.h }[3], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #40
+; CHECK-FP16-NEXT: ldr h3, [sp]
+; CHECK-FP16-NEXT: ld1 { v1.h }[4], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #48
+; CHECK-FP16-NEXT: fmaxnm v2.8h, v3.8h, v2.8h
+; CHECK-FP16-NEXT: mov v0.h[4], v4.h[0]
+; CHECK-FP16-NEXT: ld1 { v1.h }[5], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #56
+; CHECK-FP16-NEXT: str h2, [x8, #16]
+; CHECK-FP16-NEXT: mov v0.h[5], v5.h[0]
+; CHECK-FP16-NEXT: ld1 { v1.h }[6], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #64
+; CHECK-FP16-NEXT: mov v0.h[6], v6.h[0]
+; CHECK-FP16-NEXT: ld1 { v1.h }[7], [x9]
+; CHECK-FP16-NEXT: mov v0.h[7], v7.h[0]
+; CHECK-FP16-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
+; CHECK-FP16-NEXT: str q0, [x8]
+; CHECK-FP16-NEXT: ret
entry:
%c = call nnan <9 x half> @llvm.maximumnum.v9f16(<9 x half> %a, <9 x half> %b)
ret <9 x half> %c
}
define <16 x half> @max_nnan_v16f16(<16 x half> %a, <16 x half> %b) {
-; FULLFP16-LABEL: max_nnan_v16f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fmaxnm v1.8h, v1.8h, v3.8h
-; FULLFP16-NEXT: fmaxnm v0.8h, v0.8h, v2.8h
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: max_nnan_v16f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: mov h6, v2.h[1]
+; CHECK-NOFP16-NEXT: mov h7, v0.h[1]
+; CHECK-NOFP16-NEXT: fcvt s4, h2
+; CHECK-NOFP16-NEXT: fcvt s5, h0
+; CHECK-NOFP16-NEXT: mov h16, v3.h[1]
+; CHECK-NOFP16-NEXT: mov h17, v1.h[1]
+; CHECK-NOFP16-NEXT: mov h18, v2.h[2]
+; CHECK-NOFP16-NEXT: mov h19, v0.h[2]
+; CHECK-NOFP16-NEXT: fcvt s20, h3
+; CHECK-NOFP16-NEXT: fcvt s21, h1
+; CHECK-NOFP16-NEXT: mov h22, v3.h[2]
+; CHECK-NOFP16-NEXT: mov h23, v1.h[2]
+; CHECK-NOFP16-NEXT: fcvt s6, h6
+; CHECK-NOFP16-NEXT: fcvt s7, h7
+; CHECK-NOFP16-NEXT: mov h24, v0.h[6]
+; CHECK-NOFP16-NEXT: fmaxnm s4, s5, s4
+; CHECK-NOFP16-NEXT: fcvt s5, h16
+; CHECK-NOFP16-NEXT: fcvt s16, h17
+; CHECK-NOFP16-NEXT: fcvt s17, h18
+; CHECK-NOFP16-NEXT: fcvt s18, h19
+; CHECK-NOFP16-NEXT: mov h19, v0.h[3]
+; CHECK-NOFP16-NEXT: fmaxnm s20, s21, s20
+; CHECK-NOFP16-NEXT: fcvt s21, h22
+; CHECK-NOFP16-NEXT: mov h22, v3.h[3]
+; CHECK-NOFP16-NEXT: fmaxnm s6, s7, s6
+; CHECK-NOFP16-NEXT: mov h7, v2.h[3]
+; CHECK-NOFP16-NEXT: mov h25, v1.h[6]
+; CHECK-NOFP16-NEXT: fcvt h4, s4
+; CHECK-NOFP16-NEXT: fmaxnm s5, s16, s5
+; CHECK-NOFP16-NEXT: fcvt s16, h23
+; CHECK-NOFP16-NEXT: mov h23, v1.h[3]
+; CHECK-NOFP16-NEXT: fmaxnm s17, s18, s17
+; CHECK-NOFP16-NEXT: fcvt s18, h19
+; CHECK-NOFP16-NEXT: fcvt h6, s6
+; CHECK-NOFP16-NEXT: fcvt s7, h7
+; CHECK-NOFP16-NEXT: fcvt h19, s5
+; CHECK-NOFP16-NEXT: fcvt h5, s20
+; CHECK-NOFP16-NEXT: fmaxnm s16, s16, s21
+; CHECK-NOFP16-NEXT: fcvt s20, h23
+; CHECK-NOFP16-NEXT: fcvt h17, s17
+; CHECK-NOFP16-NEXT: mov h21, v2.h[4]
+; CHECK-NOFP16-NEXT: mov h23, v1.h[4]
+; CHECK-NOFP16-NEXT: mov v4.h[1], v6.h[0]
+; CHECK-NOFP16-NEXT: fcvt s6, h22
+; CHECK-NOFP16-NEXT: mov h22, v0.h[4]
+; CHECK-NOFP16-NEXT: fmaxnm s7, s18, s7
+; CHECK-NOFP16-NEXT: mov h18, v3.h[4]
+; CHECK-NOFP16-NEXT: mov v5.h[1], v19.h[0]
+; CHECK-NOFP16-NEXT: fcvt h16, s16
+; CHECK-NOFP16-NEXT: fmaxnm s6, s20, s6
+; CHECK-NOFP16-NEXT: mov v4.h[2], v17.h[0]
+; CHECK-NOFP16-NEXT: fcvt s17, h21
+; CHECK-NOFP16-NEXT: fcvt s19, h22
+; CHECK-NOFP16-NEXT: fcvt h7, s7
+; CHECK-NOFP16-NEXT: fcvt s18, h18
+; CHECK-NOFP16-NEXT: fcvt s20, h23
+; CHECK-NOFP16-NEXT: mov h21, v2.h[5]
+; CHECK-NOFP16-NEXT: mov h22, v0.h[5]
+; CHECK-NOFP16-NEXT: mov v5.h[2], v16.h[0]
+; CHECK-NOFP16-NEXT: mov h16, v3.h[5]
+; CHECK-NOFP16-NEXT: mov h23, v1.h[5]
+; CHECK-NOFP16-NEXT: fcvt h6, s6
+; CHECK-NOFP16-NEXT: mov h0, v0.h[7]
+; CHECK-NOFP16-NEXT: mov h1, v1.h[7]
+; CHECK-NOFP16-NEXT: fmaxnm s17, s19, s17
+; CHECK-NOFP16-NEXT: mov h19, v2.h[6]
+; CHECK-NOFP16-NEXT: mov v4.h[3], v7.h[0]
+; CHECK-NOFP16-NEXT: fmaxnm s18, s20, s18
+; CHECK-NOFP16-NEXT: mov h20, v3.h[6]
+; CHECK-NOFP16-NEXT: fcvt s7, h21
+; CHECK-NOFP16-NEXT: fcvt s21, h22
+; CHECK-NOFP16-NEXT: fcvt s22, h24
+; CHECK-NOFP16-NEXT: mov h2, v2.h[7]
+; CHECK-NOFP16-NEXT: mov v5.h[3], v6.h[0]
+; CHECK-NOFP16-NEXT: fcvt s6, h16
+; CHECK-NOFP16-NEXT: fcvt s16, h23
+; CHECK-NOFP16-NEXT: fcvt h17, s17
+; CHECK-NOFP16-NEXT: fcvt s19, h19
+; CHECK-NOFP16-NEXT: fcvt s23, h25
+; CHECK-NOFP16-NEXT: fcvt h18, s18
+; CHECK-NOFP16-NEXT: fcvt s20, h20
+; CHECK-NOFP16-NEXT: mov h3, v3.h[7]
+; CHECK-NOFP16-NEXT: fmaxnm s7, s21, s7
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s0, h0
+; CHECK-NOFP16-NEXT: fmaxnm s6, s16, s6
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: mov v4.h[4], v17.h[0]
+; CHECK-NOFP16-NEXT: fmaxnm s16, s22, s19
+; CHECK-NOFP16-NEXT: mov v5.h[4], v18.h[0]
+; CHECK-NOFP16-NEXT: fmaxnm s17, s23, s20
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fcvt h7, s7
+; CHECK-NOFP16-NEXT: fmaxnm s0, s0, s2
+; CHECK-NOFP16-NEXT: fcvt h6, s6
+; CHECK-NOFP16-NEXT: fcvt h2, s16
+; CHECK-NOFP16-NEXT: fmaxnm s1, s1, s3
+; CHECK-NOFP16-NEXT: mov v4.h[5], v7.h[0]
+; CHECK-NOFP16-NEXT: fcvt h0, s0
+; CHECK-NOFP16-NEXT: mov v5.h[5], v6.h[0]
+; CHECK-NOFP16-NEXT: fcvt h6, s17
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: mov v4.h[6], v2.h[0]
+; CHECK-NOFP16-NEXT: mov v5.h[6], v6.h[0]
+; CHECK-NOFP16-NEXT: mov v4.h[7], v0.h[0]
+; CHECK-NOFP16-NEXT: mov v5.h[7], v1.h[0]
+; CHECK-NOFP16-NEXT: mov v0.16b, v4.16b
+; CHECK-NOFP16-NEXT: mov v1.16b, v5.16b
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: max_nnan_v16f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: mov h6, v2.h[1]
-; NOFULLFP16-NEXT: mov h7, v0.h[1]
-; NOFULLFP16-NEXT: fcvt s4, h2
-; NOFULLFP16-NEXT: fcvt s5, h0
-; NOFULLFP16-NEXT: mov h16, v3.h[1]
-; NOFULLFP16-NEXT: mov h17, v1.h[1]
-; NOFULLFP16-NEXT: mov h18, v2.h[2]
-; NOFULLFP16-NEXT: mov h19, v0.h[2]
-; NOFULLFP16-NEXT: fcvt s20, h3
-; NOFULLFP16-NEXT: fcvt s21, h1
-; NOFULLFP16-NEXT: mov h22, v3.h[2]
-; NOFULLFP16-NEXT: mov h23, v1.h[2]
-; NOFULLFP16-NEXT: fcvt s6, h6
-; NOFULLFP16-NEXT: fcvt s7, h7
-; NOFULLFP16-NEXT: mov h24, v0.h[6]
-; NOFULLFP16-NEXT: fmaxnm s4, s5, s4
-; NOFULLFP16-NEXT: fcvt s5, h16
-; NOFULLFP16-NEXT: fcvt s16, h17
-; NOFULLFP16-NEXT: fcvt s17, h18
-; NOFULLFP16-NEXT: fcvt s18, h19
-; NOFULLFP16-NEXT: mov h19, v0.h[3]
-; NOFULLFP16-NEXT: fmaxnm s20, s21, s20
-; NOFULLFP16-NEXT: fcvt s21, h22
-; NOFULLFP16-NEXT: mov h22, v3.h[3]
-; NOFULLFP16-NEXT: fmaxnm s6, s7, s6
-; NOFULLFP16-NEXT: mov h7, v2.h[3]
-; NOFULLFP16-NEXT: mov h25, v1.h[6]
-; NOFULLFP16-NEXT: fcvt h4, s4
-; NOFULLFP16-NEXT: fmaxnm s5, s16, s5
-; NOFULLFP16-NEXT: fcvt s16, h23
-; NOFULLFP16-NEXT: mov h23, v1.h[3]
-; NOFULLFP16-NEXT: fmaxnm s17, s18, s17
-; NOFULLFP16-NEXT: fcvt s18, h19
-; NOFULLFP16-NEXT: fcvt h6, s6
-; NOFULLFP16-NEXT: fcvt s7, h7
-; NOFULLFP16-NEXT: fcvt h19, s5
-; NOFULLFP16-NEXT: fcvt h5, s20
-; NOFULLFP16-NEXT: fmaxnm s16, s16, s21
-; NOFULLFP16-NEXT: fcvt s20, h23
-; NOFULLFP16-NEXT: fcvt h17, s17
-; NOFULLFP16-NEXT: mov h21, v2.h[4]
-; NOFULLFP16-NEXT: mov h23, v1.h[4]
-; NOFULLFP16-NEXT: mov v4.h[1], v6.h[0]
-; NOFULLFP16-NEXT: fcvt s6, h22
-; NOFULLFP16-NEXT: mov h22, v0.h[4]
-; NOFULLFP16-NEXT: fmaxnm s7, s18, s7
-; NOFULLFP16-NEXT: mov h18, v3.h[4]
-; NOFULLFP16-NEXT: mov v5.h[1], v19.h[0]
-; NOFULLFP16-NEXT: fcvt h16, s16
-; NOFULLFP16-NEXT: fmaxnm s6, s20, s6
-; NOFULLFP16-NEXT: mov v4.h[2], v17.h[0]
-; NOFULLFP16-NEXT: fcvt s17, h21
-; NOFULLFP16-NEXT: fcvt s19, h22
-; NOFULLFP16-NEXT: fcvt h7, s7
-; NOFULLFP16-NEXT: fcvt s18, h18
-; NOFULLFP16-NEXT: fcvt s20, h23
-; NOFULLFP16-NEXT: mov h21, v2.h[5]
-; NOFULLFP16-NEXT: mov h22, v0.h[5]
-; NOFULLFP16-NEXT: mov v5.h[2], v16.h[0]
-; NOFULLFP16-NEXT: mov h16, v3.h[5]
-; NOFULLFP16-NEXT: mov h23, v1.h[5]
-; NOFULLFP16-NEXT: fcvt h6, s6
-; NOFULLFP16-NEXT: mov h0, v0.h[7]
-; NOFULLFP16-NEXT: mov h1, v1.h[7]
-; NOFULLFP16-NEXT: fmaxnm s17, s19, s17
-; NOFULLFP16-NEXT: mov h19, v2.h[6]
-; NOFULLFP16-NEXT: mov v4.h[3], v7.h[0]
-; NOFULLFP16-NEXT: fmaxnm s18, s20, s18
-; NOFULLFP16-NEXT: mov h20, v3.h[6]
-; NOFULLFP16-NEXT: fcvt s7, h21
-; NOFULLFP16-NEXT: fcvt s21, h22
-; NOFULLFP16-NEXT: fcvt s22, h24
-; NOFULLFP16-NEXT: mov h2, v2.h[7]
-; NOFULLFP16-NEXT: mov v5.h[3], v6.h[0]
-; NOFULLFP16-NEXT: fcvt s6, h16
-; NOFULLFP16-NEXT: fcvt s16, h23
-; NOFULLFP16-NEXT: fcvt h17, s17
-; NOFULLFP16-NEXT: fcvt s19, h19
-; NOFULLFP16-NEXT: fcvt s23, h25
-; NOFULLFP16-NEXT: fcvt h18, s18
-; NOFULLFP16-NEXT: fcvt s20, h20
-; NOFULLFP16-NEXT: mov h3, v3.h[7]
-; NOFULLFP16-NEXT: fmaxnm s7, s21, s7
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s0, h0
-; NOFULLFP16-NEXT: fmaxnm s6, s16, s6
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: mov v4.h[4], v17.h[0]
-; NOFULLFP16-NEXT: fmaxnm s16, s22, s19
-; NOFULLFP16-NEXT: mov v5.h[4], v18.h[0]
-; NOFULLFP16-NEXT: fmaxnm s17, s23, s20
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fcvt h7, s7
-; NOFULLFP16-NEXT: fmaxnm s0, s0, s2
-; NOFULLFP16-NEXT: fcvt h6, s6
-; NOFULLFP16-NEXT: fcvt h2, s16
-; NOFULLFP16-NEXT: fmaxnm s1, s1, s3
-; NOFULLFP16-NEXT: mov v4.h[5], v7.h[0]
-; NOFULLFP16-NEXT: fcvt h0, s0
-; NOFULLFP16-NEXT: mov v5.h[5], v6.h[0]
-; NOFULLFP16-NEXT: fcvt h6, s17
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: mov v4.h[6], v2.h[0]
-; NOFULLFP16-NEXT: mov v5.h[6], v6.h[0]
-; NOFULLFP16-NEXT: mov v4.h[7], v0.h[0]
-; NOFULLFP16-NEXT: mov v5.h[7], v1.h[0]
-; NOFULLFP16-NEXT: mov v0.16b, v4.16b
-; NOFULLFP16-NEXT: mov v1.16b, v5.16b
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: max_nnan_v16f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fmaxnm v1.8h, v1.8h, v3.8h
+; CHECK-FP16-NEXT: fmaxnm v0.8h, v0.8h, v2.8h
+; CHECK-FP16-NEXT: ret
entry:
%c = call nnan <16 x half> @llvm.maximumnum.v16f16(<16 x half> %a, <16 x half> %b)
ret <16 x half> %c
@@ -541,54 +677,54 @@ entry:
;;;;;;;;;;;;;;;; min_f64
define double @min_nnan_f64(double %a, double %b) {
-; AARCH64-LABEL: min_nnan_f64:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm d0, d0, d1
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_nnan_f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm d0, d0, d1
+; CHECK-NEXT: ret
entry:
%c = call nnan double @llvm.minimumnum.f64(double %a, double %b)
ret double %c
}
define <2 x double> @min_nnan_v2f64(<2 x double> %a, <2 x double> %b) {
-; AARCH64-LABEL: min_nnan_v2f64:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v0.2d, v0.2d, v1.2d
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_nnan_v2f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v0.2d, v0.2d, v1.2d
+; CHECK-NEXT: ret
entry:
%c = call nnan <2 x double> @llvm.minimumnum.v2f64(<2 x double> %a, <2 x double> %b)
ret <2 x double> %c
}
define <3 x double> @min_nnan_v3f64(<3 x double> %a, <3 x double> %b) {
-; AARCH64-LABEL: min_nnan_v3f64:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: // kill: def $d3 killed $d3 def $q3
-; AARCH64-NEXT: // kill: def $d0 killed $d0 def $q0
-; AARCH64-NEXT: // kill: def $d4 killed $d4 def $q4
-; AARCH64-NEXT: // kill: def $d1 killed $d1 def $q1
-; AARCH64-NEXT: // kill: def $d2 killed $d2 def $q2
-; AARCH64-NEXT: // kill: def $d5 killed $d5 def $q5
-; AARCH64-NEXT: mov v3.d[1], v4.d[0]
-; AARCH64-NEXT: mov v0.d[1], v1.d[0]
-; AARCH64-NEXT: fminnm v2.2d, v2.2d, v5.2d
-; AARCH64-NEXT: // kill: def $d2 killed $d2 killed $q2
-; AARCH64-NEXT: fminnm v0.2d, v0.2d, v3.2d
-; AARCH64-NEXT: ext v1.16b, v0.16b, v0.16b, #8
-; AARCH64-NEXT: // kill: def $d0 killed $d0 killed $q0
-; AARCH64-NEXT: // kill: def $d1 killed $d1 killed $q1
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_nnan_v3f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: // kill: def $d3 killed $d3 def $q3
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT: // kill: def $d4 killed $d4 def $q4
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
+; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
+; CHECK-NEXT: // kill: def $d5 killed $d5 def $q5
+; CHECK-NEXT: mov v3.d[1], v4.d[0]
+; CHECK-NEXT: mov v0.d[1], v1.d[0]
+; CHECK-NEXT: fminnm v2.2d, v2.2d, v5.2d
+; CHECK-NEXT: // kill: def $d2 killed $d2 killed $q2
+; CHECK-NEXT: fminnm v0.2d, v0.2d, v3.2d
+; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q1
+; CHECK-NEXT: ret
entry:
%c = call nnan <3 x double> @llvm.minimumnum.v3f64(<3 x double> %a, <3 x double> %b)
ret <3 x double> %c
}
define <4 x double> @min_nnan_v4f64(<4 x double> %a, <4 x double> %b) {
-; AARCH64-LABEL: min_nnan_v4f64:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.2d, v1.2d, v3.2d
-; AARCH64-NEXT: fminnm v0.2d, v0.2d, v2.2d
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_nnan_v4f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v1.2d, v1.2d, v3.2d
+; CHECK-NEXT: fminnm v0.2d, v0.2d, v2.2d
+; CHECK-NEXT: ret
entry:
%c = call nnan <4 x double> @llvm.minimumnum.v4f64(<4 x double> %a, <4 x double> %b)
ret <4 x double> %c
@@ -596,83 +732,83 @@ entry:
;;;;;;;;;;;;;;;;;; min_f32
define float @min_nnan_f32(float %a, float %b) {
-; AARCH64-LABEL: min_nnan_f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm s0, s0, s1
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_nnan_f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm s0, s0, s1
+; CHECK-NEXT: ret
entry:
%c = call nnan float @llvm.minimumnum.f32(float %a, float %b)
ret float %c
}
define <2 x float> @min_nnan_v2f32(<2 x float> %a, <2 x float> %b) {
-; AARCH64-LABEL: min_nnan_v2f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v0.2s, v0.2s, v1.2s
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_nnan_v2f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v0.2s, v0.2s, v1.2s
+; CHECK-NEXT: ret
entry:
%c = call nnan <2 x float> @llvm.minimumnum.v2f32(<2 x float> %a, <2 x float> %b)
ret <2 x float> %c
}
define <3 x float> @min_nnan_v3f32(<3 x float> %a, <3 x float> %b) {
-; AARCH64-LABEL: min_nnan_v3f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v0.4s, v0.4s, v1.4s
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_nnan_v3f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: ret
entry:
%c = call nnan <3 x float> @llvm.minimumnum.v3f32(<3 x float> %a, <3 x float> %b)
ret <3 x float> %c
}
define <4 x float> @min_nnan_v4f32(<4 x float> %a, <4 x float> %b) {
-; AARCH64-LABEL: min_nnan_v4f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v0.4s, v0.4s, v1.4s
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_nnan_v4f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: ret
entry:
%c = call nnan <4 x float> @llvm.minimumnum.v4f32(<4 x float> %a, <4 x float> %b)
ret <4 x float> %c
}
define <5 x float> @min_nnan_v5f32(<5 x float> %a, <5 x float> %b) {
-; AARCH64-LABEL: min_nnan_v5f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: // kill: def $s0 killed $s0 def $q0
-; AARCH64-NEXT: // kill: def $s5 killed $s5 def $q5
-; AARCH64-NEXT: // kill: def $s1 killed $s1 def $q1
-; AARCH64-NEXT: // kill: def $s6 killed $s6 def $q6
-; AARCH64-NEXT: // kill: def $s2 killed $s2 def $q2
-; AARCH64-NEXT: // kill: def $s7 killed $s7 def $q7
-; AARCH64-NEXT: // kill: def $s3 killed $s3 def $q3
-; AARCH64-NEXT: mov x8, sp
-; AARCH64-NEXT: // kill: def $s4 killed $s4 def $q4
-; AARCH64-NEXT: mov v0.s[1], v1.s[0]
-; AARCH64-NEXT: mov v5.s[1], v6.s[0]
-; AARCH64-NEXT: mov v0.s[2], v2.s[0]
-; AARCH64-NEXT: mov v5.s[2], v7.s[0]
-; AARCH64-NEXT: ldr s2, [sp, #8]
-; AARCH64-NEXT: fminnm v4.4s, v4.4s, v2.4s
-; AARCH64-NEXT: // kill: def $s4 killed $s4 killed $q4
-; AARCH64-NEXT: mov v0.s[3], v3.s[0]
-; AARCH64-NEXT: ld1 { v5.s }[3], [x8]
-; AARCH64-NEXT: fminnm v0.4s, v0.4s, v5.4s
-; AARCH64-NEXT: mov s1, v0.s[1]
-; AARCH64-NEXT: mov s2, v0.s[2]
-; AARCH64-NEXT: mov s3, v0.s[3]
-; AARCH64-NEXT: // kill: def $s0 killed $s0 killed $q0
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_nnan_v5f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: // kill: def $s0 killed $s0 def $q0
+; CHECK-NEXT: // kill: def $s5 killed $s5 def $q5
+; CHECK-NEXT: // kill: def $s1 killed $s1 def $q1
+; CHECK-NEXT: // kill: def $s6 killed $s6 def $q6
+; CHECK-NEXT: // kill: def $s2 killed $s2 def $q2
+; CHECK-NEXT: // kill: def $s7 killed $s7 def $q7
+; CHECK-NEXT: // kill: def $s3 killed $s3 def $q3
+; CHECK-NEXT: mov x8, sp
+; CHECK-NEXT: // kill: def $s4 killed $s4 def $q4
+; CHECK-NEXT: mov v0.s[1], v1.s[0]
+; CHECK-NEXT: mov v5.s[1], v6.s[0]
+; CHECK-NEXT: mov v0.s[2], v2.s[0]
+; CHECK-NEXT: mov v5.s[2], v7.s[0]
+; CHECK-NEXT: ldr s2, [sp, #8]
+; CHECK-NEXT: fminnm v4.4s, v4.4s, v2.4s
+; CHECK-NEXT: // kill: def $s4 killed $s4 killed $q4
+; CHECK-NEXT: mov v0.s[3], v3.s[0]
+; CHECK-NEXT: ld1 { v5.s }[3], [x8]
+; CHECK-NEXT: fminnm v0.4s, v0.4s, v5.4s
+; CHECK-NEXT: mov s1, v0.s[1]
+; CHECK-NEXT: mov s2, v0.s[2]
+; CHECK-NEXT: mov s3, v0.s[3]
+; CHECK-NEXT: // kill: def $s0 killed $s0 killed $q0
+; CHECK-NEXT: ret
entry:
%c = call nnan <5 x float> @llvm.minimumnum.v5f32(<5 x float> %a, <5 x float> %b)
ret <5 x float> %c
}
define <8 x float> @min_nnan_v8f32(<8 x float> %a, <8 x float> %b) {
-; AARCH64-LABEL: min_nnan_v8f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.4s, v1.4s, v3.4s
-; AARCH64-NEXT: fminnm v0.4s, v0.4s, v2.4s
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_nnan_v8f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v1.4s, v1.4s, v3.4s
+; CHECK-NEXT: fminnm v0.4s, v0.4s, v2.4s
+; CHECK-NEXT: ret
entry:
%c = call nnan <8 x float> @llvm.minimumnum.v8f32(<8 x float> %a, <8 x float> %b)
ret <8 x float> %c
@@ -680,397 +816,397 @@ entry:
;;;;;;;;;;;;;;;;;; min_f16
define half @min_nnan_f16(half %a, half %b) {
-; FULLFP16-LABEL: min_nnan_f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fminnm h0, h0, h1
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: min_nnan_f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fcvt s0, h0
+; CHECK-NOFP16-NEXT: fminnm s0, s0, s1
+; CHECK-NOFP16-NEXT: fcvt h0, s0
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: min_nnan_f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fcvt s0, h0
-; NOFULLFP16-NEXT: fminnm s0, s0, s1
-; NOFULLFP16-NEXT: fcvt h0, s0
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: min_nnan_f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fminnm h0, h0, h1
+; CHECK-FP16-NEXT: ret
entry:
%c = call nnan half @llvm.minimumnum.f16(half %a, half %b)
ret half %c
}
define <2 x half> @min_nnan_v2f16(<2 x half> %a, <2 x half> %b) {
-; FULLFP16-LABEL: min_nnan_v2f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fminnm v0.4h, v0.4h, v1.4h
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: min_nnan_v2f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: // kill: def $d1 killed $d1 def $q1
+; CHECK-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
+; CHECK-NOFP16-NEXT: mov h2, v1.h[1]
+; CHECK-NOFP16-NEXT: mov h3, v0.h[1]
+; CHECK-NOFP16-NEXT: mov h4, v1.h[2]
+; CHECK-NOFP16-NEXT: mov h5, v0.h[2]
+; CHECK-NOFP16-NEXT: fcvt s6, h1
+; CHECK-NOFP16-NEXT: fcvt s7, h0
+; CHECK-NOFP16-NEXT: mov h1, v1.h[3]
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fminnm s2, s3, s2
+; CHECK-NOFP16-NEXT: fcvt s3, h4
+; CHECK-NOFP16-NEXT: fcvt s4, h5
+; CHECK-NOFP16-NEXT: fminnm s5, s7, s6
+; CHECK-NOFP16-NEXT: mov h6, v0.h[3]
+; CHECK-NOFP16-NEXT: fminnm s3, s4, s3
+; CHECK-NOFP16-NEXT: fcvt h2, s2
+; CHECK-NOFP16-NEXT: fcvt h0, s5
+; CHECK-NOFP16-NEXT: fcvt s4, h6
+; CHECK-NOFP16-NEXT: mov v0.h[1], v2.h[0]
+; CHECK-NOFP16-NEXT: fcvt h2, s3
+; CHECK-NOFP16-NEXT: fminnm s1, s4, s1
+; CHECK-NOFP16-NEXT: mov v0.h[2], v2.h[0]
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: mov v0.h[3], v1.h[0]
+; CHECK-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: min_nnan_v2f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: // kill: def $d1 killed $d1 def $q1
-; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 def $q0
-; NOFULLFP16-NEXT: mov h2, v1.h[1]
-; NOFULLFP16-NEXT: mov h3, v0.h[1]
-; NOFULLFP16-NEXT: mov h4, v1.h[2]
-; NOFULLFP16-NEXT: mov h5, v0.h[2]
-; NOFULLFP16-NEXT: fcvt s6, h1
-; NOFULLFP16-NEXT: fcvt s7, h0
-; NOFULLFP16-NEXT: mov h1, v1.h[3]
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fminnm s2, s3, s2
-; NOFULLFP16-NEXT: fcvt s3, h4
-; NOFULLFP16-NEXT: fcvt s4, h5
-; NOFULLFP16-NEXT: fminnm s5, s7, s6
-; NOFULLFP16-NEXT: mov h6, v0.h[3]
-; NOFULLFP16-NEXT: fminnm s3, s4, s3
-; NOFULLFP16-NEXT: fcvt h2, s2
-; NOFULLFP16-NEXT: fcvt h0, s5
-; NOFULLFP16-NEXT: fcvt s4, h6
-; NOFULLFP16-NEXT: mov v0.h[1], v2.h[0]
-; NOFULLFP16-NEXT: fcvt h2, s3
-; NOFULLFP16-NEXT: fminnm s1, s4, s1
-; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: mov v0.h[3], v1.h[0]
-; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: min_nnan_v2f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fminnm v0.4h, v0.4h, v1.4h
+; CHECK-FP16-NEXT: ret
entry:
%c = call nnan <2 x half> @llvm.minimumnum.v2f16(<2 x half> %a, <2 x half> %b)
ret <2 x half> %c
}
define <4 x half> @min_nnan_v4f16(<4 x half> %a, <4 x half> %b) {
-; FULLFP16-LABEL: min_nnan_v4f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fminnm v0.4h, v0.4h, v1.4h
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: min_nnan_v4f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: // kill: def $d1 killed $d1 def $q1
+; CHECK-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
+; CHECK-NOFP16-NEXT: mov h2, v1.h[1]
+; CHECK-NOFP16-NEXT: mov h3, v0.h[1]
+; CHECK-NOFP16-NEXT: mov h4, v1.h[2]
+; CHECK-NOFP16-NEXT: mov h5, v0.h[2]
+; CHECK-NOFP16-NEXT: fcvt s6, h1
+; CHECK-NOFP16-NEXT: fcvt s7, h0
+; CHECK-NOFP16-NEXT: mov h1, v1.h[3]
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fminnm s2, s3, s2
+; CHECK-NOFP16-NEXT: fcvt s3, h4
+; CHECK-NOFP16-NEXT: fcvt s4, h5
+; CHECK-NOFP16-NEXT: fminnm s5, s7, s6
+; CHECK-NOFP16-NEXT: mov h6, v0.h[3]
+; CHECK-NOFP16-NEXT: fminnm s3, s4, s3
+; CHECK-NOFP16-NEXT: fcvt h2, s2
+; CHECK-NOFP16-NEXT: fcvt h0, s5
+; CHECK-NOFP16-NEXT: fcvt s4, h6
+; CHECK-NOFP16-NEXT: mov v0.h[1], v2.h[0]
+; CHECK-NOFP16-NEXT: fcvt h2, s3
+; CHECK-NOFP16-NEXT: fminnm s1, s4, s1
+; CHECK-NOFP16-NEXT: mov v0.h[2], v2.h[0]
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: mov v0.h[3], v1.h[0]
+; CHECK-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: min_nnan_v4f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: // kill: def $d1 killed $d1 def $q1
-; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 def $q0
-; NOFULLFP16-NEXT: mov h2, v1.h[1]
-; NOFULLFP16-NEXT: mov h3, v0.h[1]
-; NOFULLFP16-NEXT: mov h4, v1.h[2]
-; NOFULLFP16-NEXT: mov h5, v0.h[2]
-; NOFULLFP16-NEXT: fcvt s6, h1
-; NOFULLFP16-NEXT: fcvt s7, h0
-; NOFULLFP16-NEXT: mov h1, v1.h[3]
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fminnm s2, s3, s2
-; NOFULLFP16-NEXT: fcvt s3, h4
-; NOFULLFP16-NEXT: fcvt s4, h5
-; NOFULLFP16-NEXT: fminnm s5, s7, s6
-; NOFULLFP16-NEXT: mov h6, v0.h[3]
-; NOFULLFP16-NEXT: fminnm s3, s4, s3
-; NOFULLFP16-NEXT: fcvt h2, s2
-; NOFULLFP16-NEXT: fcvt h0, s5
-; NOFULLFP16-NEXT: fcvt s4, h6
-; NOFULLFP16-NEXT: mov v0.h[1], v2.h[0]
-; NOFULLFP16-NEXT: fcvt h2, s3
-; NOFULLFP16-NEXT: fminnm s1, s4, s1
-; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: mov v0.h[3], v1.h[0]
-; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: min_nnan_v4f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fminnm v0.4h, v0.4h, v1.4h
+; CHECK-FP16-NEXT: ret
entry:
%c = call nnan <4 x half> @llvm.minimumnum.v4f16(<4 x half> %a, <4 x half> %b)
ret <4 x half> %c
}
define <8 x half> @min_nnan_v8f16(<8 x half> %a, <8 x half> %b) {
-; FULLFP16-LABEL: min_nnan_v8f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v1.8h
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: min_nnan_v8f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: mov h2, v1.h[1]
+; CHECK-NOFP16-NEXT: mov h3, v0.h[1]
+; CHECK-NOFP16-NEXT: fcvt s4, h1
+; CHECK-NOFP16-NEXT: fcvt s5, h0
+; CHECK-NOFP16-NEXT: mov h6, v1.h[2]
+; CHECK-NOFP16-NEXT: mov h7, v0.h[2]
+; CHECK-NOFP16-NEXT: mov h16, v1.h[3]
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fminnm s4, s5, s4
+; CHECK-NOFP16-NEXT: mov h5, v0.h[3]
+; CHECK-NOFP16-NEXT: fcvt s6, h6
+; CHECK-NOFP16-NEXT: fcvt s7, h7
+; CHECK-NOFP16-NEXT: fcvt s16, h16
+; CHECK-NOFP16-NEXT: fminnm s3, s3, s2
+; CHECK-NOFP16-NEXT: fcvt s5, h5
+; CHECK-NOFP16-NEXT: fcvt h2, s4
+; CHECK-NOFP16-NEXT: fminnm s4, s7, s6
+; CHECK-NOFP16-NEXT: mov h6, v1.h[4]
+; CHECK-NOFP16-NEXT: mov h7, v0.h[4]
+; CHECK-NOFP16-NEXT: fcvt h3, s3
+; CHECK-NOFP16-NEXT: fminnm s5, s5, s16
+; CHECK-NOFP16-NEXT: mov h16, v0.h[5]
+; CHECK-NOFP16-NEXT: fcvt h4, s4
+; CHECK-NOFP16-NEXT: mov v2.h[1], v3.h[0]
+; CHECK-NOFP16-NEXT: fcvt s3, h6
+; CHECK-NOFP16-NEXT: fcvt s6, h7
+; CHECK-NOFP16-NEXT: mov h7, v1.h[5]
+; CHECK-NOFP16-NEXT: fcvt h5, s5
+; CHECK-NOFP16-NEXT: fcvt s16, h16
+; CHECK-NOFP16-NEXT: mov v2.h[2], v4.h[0]
+; CHECK-NOFP16-NEXT: mov h4, v1.h[6]
+; CHECK-NOFP16-NEXT: fminnm s3, s6, s3
+; CHECK-NOFP16-NEXT: mov h6, v0.h[6]
+; CHECK-NOFP16-NEXT: fcvt s7, h7
+; CHECK-NOFP16-NEXT: mov h1, v1.h[7]
+; CHECK-NOFP16-NEXT: mov h0, v0.h[7]
+; CHECK-NOFP16-NEXT: mov v2.h[3], v5.h[0]
+; CHECK-NOFP16-NEXT: fcvt s4, h4
+; CHECK-NOFP16-NEXT: fcvt h3, s3
+; CHECK-NOFP16-NEXT: fcvt s5, h6
+; CHECK-NOFP16-NEXT: fminnm s6, s16, s7
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fcvt s0, h0
+; CHECK-NOFP16-NEXT: mov v2.h[4], v3.h[0]
+; CHECK-NOFP16-NEXT: fminnm s4, s5, s4
+; CHECK-NOFP16-NEXT: fcvt h3, s6
+; CHECK-NOFP16-NEXT: fminnm s0, s0, s1
+; CHECK-NOFP16-NEXT: mov v2.h[5], v3.h[0]
+; CHECK-NOFP16-NEXT: fcvt h3, s4
+; CHECK-NOFP16-NEXT: fcvt h0, s0
+; CHECK-NOFP16-NEXT: mov v2.h[6], v3.h[0]
+; CHECK-NOFP16-NEXT: mov v2.h[7], v0.h[0]
+; CHECK-NOFP16-NEXT: mov v0.16b, v2.16b
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: min_nnan_v8f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: mov h2, v1.h[1]
-; NOFULLFP16-NEXT: mov h3, v0.h[1]
-; NOFULLFP16-NEXT: fcvt s4, h1
-; NOFULLFP16-NEXT: fcvt s5, h0
-; NOFULLFP16-NEXT: mov h6, v1.h[2]
-; NOFULLFP16-NEXT: mov h7, v0.h[2]
-; NOFULLFP16-NEXT: mov h16, v1.h[3]
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fminnm s4, s5, s4
-; NOFULLFP16-NEXT: mov h5, v0.h[3]
-; NOFULLFP16-NEXT: fcvt s6, h6
-; NOFULLFP16-NEXT: fcvt s7, h7
-; NOFULLFP16-NEXT: fcvt s16, h16
-; NOFULLFP16-NEXT: fminnm s3, s3, s2
-; NOFULLFP16-NEXT: fcvt s5, h5
-; NOFULLFP16-NEXT: fcvt h2, s4
-; NOFULLFP16-NEXT: fminnm s4, s7, s6
-; NOFULLFP16-NEXT: mov h6, v1.h[4]
-; NOFULLFP16-NEXT: mov h7, v0.h[4]
-; NOFULLFP16-NEXT: fcvt h3, s3
-; NOFULLFP16-NEXT: fminnm s5, s5, s16
-; NOFULLFP16-NEXT: mov h16, v0.h[5]
-; NOFULLFP16-NEXT: fcvt h4, s4
-; NOFULLFP16-NEXT: mov v2.h[1], v3.h[0]
-; NOFULLFP16-NEXT: fcvt s3, h6
-; NOFULLFP16-NEXT: fcvt s6, h7
-; NOFULLFP16-NEXT: mov h7, v1.h[5]
-; NOFULLFP16-NEXT: fcvt h5, s5
-; NOFULLFP16-NEXT: fcvt s16, h16
-; NOFULLFP16-NEXT: mov v2.h[2], v4.h[0]
-; NOFULLFP16-NEXT: mov h4, v1.h[6]
-; NOFULLFP16-NEXT: fminnm s3, s6, s3
-; NOFULLFP16-NEXT: mov h6, v0.h[6]
-; NOFULLFP16-NEXT: fcvt s7, h7
-; NOFULLFP16-NEXT: mov h1, v1.h[7]
-; NOFULLFP16-NEXT: mov h0, v0.h[7]
-; NOFULLFP16-NEXT: mov v2.h[3], v5.h[0]
-; NOFULLFP16-NEXT: fcvt s4, h4
-; NOFULLFP16-NEXT: fcvt h3, s3
-; NOFULLFP16-NEXT: fcvt s5, h6
-; NOFULLFP16-NEXT: fminnm s6, s16, s7
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fcvt s0, h0
-; NOFULLFP16-NEXT: mov v2.h[4], v3.h[0]
-; NOFULLFP16-NEXT: fminnm s4, s5, s4
-; NOFULLFP16-NEXT: fcvt h3, s6
-; NOFULLFP16-NEXT: fminnm s0, s0, s1
-; NOFULLFP16-NEXT: mov v2.h[5], v3.h[0]
-; NOFULLFP16-NEXT: fcvt h3, s4
-; NOFULLFP16-NEXT: fcvt h0, s0
-; NOFULLFP16-NEXT: mov v2.h[6], v3.h[0]
-; NOFULLFP16-NEXT: mov v2.h[7], v0.h[0]
-; NOFULLFP16-NEXT: mov v0.16b, v2.16b
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: min_nnan_v8f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fminnm v0.8h, v0.8h, v1.8h
+; CHECK-FP16-NEXT: ret
entry:
%c = call nnan <8 x half> @llvm.minimumnum.v8f16(<8 x half> %a, <8 x half> %b)
ret <8 x half> %c
}
define <9 x half> @min_nnan_v9f16(<9 x half> %a, <9 x half> %b) {
-; FULLFP16-LABEL: min_nnan_v9f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: // kill: def $h0 killed $h0 def $q0
-; FULLFP16-NEXT: // kill: def $h1 killed $h1 def $q1
-; FULLFP16-NEXT: // kill: def $h2 killed $h2 def $q2
-; FULLFP16-NEXT: add x9, sp, #16
-; FULLFP16-NEXT: // kill: def $h3 killed $h3 def $q3
-; FULLFP16-NEXT: // kill: def $h4 killed $h4 def $q4
-; FULLFP16-NEXT: // kill: def $h5 killed $h5 def $q5
-; FULLFP16-NEXT: // kill: def $h6 killed $h6 def $q6
-; FULLFP16-NEXT: // kill: def $h7 killed $h7 def $q7
-; FULLFP16-NEXT: mov v0.h[1], v1.h[0]
-; FULLFP16-NEXT: ldr h1, [sp, #8]
-; FULLFP16-NEXT: ld1 { v1.h }[1], [x9]
-; FULLFP16-NEXT: add x9, sp, #24
-; FULLFP16-NEXT: mov v0.h[2], v2.h[0]
-; FULLFP16-NEXT: ldr h2, [sp, #72]
-; FULLFP16-NEXT: ld1 { v1.h }[2], [x9]
-; FULLFP16-NEXT: add x9, sp, #32
-; FULLFP16-NEXT: mov v0.h[3], v3.h[0]
-; FULLFP16-NEXT: ld1 { v1.h }[3], [x9]
-; FULLFP16-NEXT: add x9, sp, #40
-; FULLFP16-NEXT: ldr h3, [sp]
-; FULLFP16-NEXT: ld1 { v1.h }[4], [x9]
-; FULLFP16-NEXT: add x9, sp, #48
-; FULLFP16-NEXT: fminnm v2.8h, v3.8h, v2.8h
-; FULLFP16-NEXT: mov v0.h[4], v4.h[0]
-; FULLFP16-NEXT: ld1 { v1.h }[5], [x9]
-; FULLFP16-NEXT: add x9, sp, #56
-; FULLFP16-NEXT: str h2, [x8, #16]
-; FULLFP16-NEXT: mov v0.h[5], v5.h[0]
-; FULLFP16-NEXT: ld1 { v1.h }[6], [x9]
-; FULLFP16-NEXT: add x9, sp, #64
-; FULLFP16-NEXT: mov v0.h[6], v6.h[0]
-; FULLFP16-NEXT: ld1 { v1.h }[7], [x9]
-; FULLFP16-NEXT: mov v0.h[7], v7.h[0]
-; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v1.8h
-; FULLFP16-NEXT: str q0, [x8]
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: min_nnan_v9f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: ldr h16, [sp, #16]
+; CHECK-NOFP16-NEXT: ldr h17, [sp, #8]
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fcvt s0, h0
+; CHECK-NOFP16-NEXT: ldr h18, [sp, #24]
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s16, h16
+; CHECK-NOFP16-NEXT: fcvt s17, h17
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fcvt s18, h18
+; CHECK-NOFP16-NEXT: fcvt s4, h4
+; CHECK-NOFP16-NEXT: fcvt s5, h5
+; CHECK-NOFP16-NEXT: fminnm s1, s1, s16
+; CHECK-NOFP16-NEXT: fminnm s0, s0, s17
+; CHECK-NOFP16-NEXT: ldr h16, [sp, #32]
+; CHECK-NOFP16-NEXT: fminnm s2, s2, s18
+; CHECK-NOFP16-NEXT: ldr h17, [sp, #40]
+; CHECK-NOFP16-NEXT: fcvt s16, h16
+; CHECK-NOFP16-NEXT: fcvt s17, h17
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: fcvt h0, s0
+; CHECK-NOFP16-NEXT: fcvt h2, s2
+; CHECK-NOFP16-NEXT: fminnm s3, s3, s16
+; CHECK-NOFP16-NEXT: fminnm s4, s4, s17
+; CHECK-NOFP16-NEXT: mov v0.h[1], v1.h[0]
+; CHECK-NOFP16-NEXT: ldr h1, [sp, #48]
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fcvt h3, s3
+; CHECK-NOFP16-NEXT: fcvt h4, s4
+; CHECK-NOFP16-NEXT: mov v0.h[2], v2.h[0]
+; CHECK-NOFP16-NEXT: ldr h2, [sp, #56]
+; CHECK-NOFP16-NEXT: fminnm s1, s5, s1
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: ldr h5, [sp, #64]
+; CHECK-NOFP16-NEXT: mov v0.h[3], v3.h[0]
+; CHECK-NOFP16-NEXT: fcvt s3, h6
+; CHECK-NOFP16-NEXT: ldr h6, [sp, #72]
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: fcvt s6, h6
+; CHECK-NOFP16-NEXT: mov v0.h[4], v4.h[0]
+; CHECK-NOFP16-NEXT: fminnm s2, s3, s2
+; CHECK-NOFP16-NEXT: fcvt s3, h5
+; CHECK-NOFP16-NEXT: fcvt s4, h7
+; CHECK-NOFP16-NEXT: ldr h5, [sp]
+; CHECK-NOFP16-NEXT: fcvt s5, h5
+; CHECK-NOFP16-NEXT: mov v0.h[5], v1.h[0]
+; CHECK-NOFP16-NEXT: fcvt h1, s2
+; CHECK-NOFP16-NEXT: fminnm s2, s4, s3
+; CHECK-NOFP16-NEXT: fminnm s3, s5, s6
+; CHECK-NOFP16-NEXT: mov v0.h[6], v1.h[0]
+; CHECK-NOFP16-NEXT: fcvt h1, s2
+; CHECK-NOFP16-NEXT: fcvt h2, s3
+; CHECK-NOFP16-NEXT: mov v0.h[7], v1.h[0]
+; CHECK-NOFP16-NEXT: str h2, [x8, #16]
+; CHECK-NOFP16-NEXT: str q0, [x8]
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: min_nnan_v9f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: ldr h16, [sp, #16]
-; NOFULLFP16-NEXT: ldr h17, [sp, #8]
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fcvt s0, h0
-; NOFULLFP16-NEXT: ldr h18, [sp, #24]
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s16, h16
-; NOFULLFP16-NEXT: fcvt s17, h17
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fcvt s18, h18
-; NOFULLFP16-NEXT: fcvt s4, h4
-; NOFULLFP16-NEXT: fcvt s5, h5
-; NOFULLFP16-NEXT: fminnm s1, s1, s16
-; NOFULLFP16-NEXT: fminnm s0, s0, s17
-; NOFULLFP16-NEXT: ldr h16, [sp, #32]
-; NOFULLFP16-NEXT: fminnm s2, s2, s18
-; NOFULLFP16-NEXT: ldr h17, [sp, #40]
-; NOFULLFP16-NEXT: fcvt s16, h16
-; NOFULLFP16-NEXT: fcvt s17, h17
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: fcvt h0, s0
-; NOFULLFP16-NEXT: fcvt h2, s2
-; NOFULLFP16-NEXT: fminnm s3, s3, s16
-; NOFULLFP16-NEXT: fminnm s4, s4, s17
-; NOFULLFP16-NEXT: mov v0.h[1], v1.h[0]
-; NOFULLFP16-NEXT: ldr h1, [sp, #48]
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fcvt h3, s3
-; NOFULLFP16-NEXT: fcvt h4, s4
-; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
-; NOFULLFP16-NEXT: ldr h2, [sp, #56]
-; NOFULLFP16-NEXT: fminnm s1, s5, s1
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: ldr h5, [sp, #64]
-; NOFULLFP16-NEXT: mov v0.h[3], v3.h[0]
-; NOFULLFP16-NEXT: fcvt s3, h6
-; NOFULLFP16-NEXT: ldr h6, [sp, #72]
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: fcvt s6, h6
-; NOFULLFP16-NEXT: mov v0.h[4], v4.h[0]
-; NOFULLFP16-NEXT: fminnm s2, s3, s2
-; NOFULLFP16-NEXT: fcvt s3, h5
-; NOFULLFP16-NEXT: fcvt s4, h7
-; NOFULLFP16-NEXT: ldr h5, [sp]
-; NOFULLFP16-NEXT: fcvt s5, h5
-; NOFULLFP16-NEXT: mov v0.h[5], v1.h[0]
-; NOFULLFP16-NEXT: fcvt h1, s2
-; NOFULLFP16-NEXT: fminnm s2, s4, s3
-; NOFULLFP16-NEXT: fminnm s3, s5, s6
-; NOFULLFP16-NEXT: mov v0.h[6], v1.h[0]
-; NOFULLFP16-NEXT: fcvt h1, s2
-; NOFULLFP16-NEXT: fcvt h2, s3
-; NOFULLFP16-NEXT: mov v0.h[7], v1.h[0]
-; NOFULLFP16-NEXT: str h2, [x8, #16]
-; NOFULLFP16-NEXT: str q0, [x8]
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: min_nnan_v9f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: // kill: def $h0 killed $h0 def $q0
+; CHECK-FP16-NEXT: // kill: def $h1 killed $h1 def $q1
+; CHECK-FP16-NEXT: // kill: def $h2 killed $h2 def $q2
+; CHECK-FP16-NEXT: add x9, sp, #16
+; CHECK-FP16-NEXT: // kill: def $h3 killed $h3 def $q3
+; CHECK-FP16-NEXT: // kill: def $h4 killed $h4 def $q4
+; CHECK-FP16-NEXT: // kill: def $h5 killed $h5 def $q5
+; CHECK-FP16-NEXT: // kill: def $h6 killed $h6 def $q6
+; CHECK-FP16-NEXT: // kill: def $h7 killed $h7 def $q7
+; CHECK-FP16-NEXT: mov v0.h[1], v1.h[0]
+; CHECK-FP16-NEXT: ldr h1, [sp, #8]
+; CHECK-FP16-NEXT: ld1 { v1.h }[1], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #24
+; CHECK-FP16-NEXT: mov v0.h[2], v2.h[0]
+; CHECK-FP16-NEXT: ldr h2, [sp, #72]
+; CHECK-FP16-NEXT: ld1 { v1.h }[2], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #32
+; CHECK-FP16-NEXT: mov v0.h[3], v3.h[0]
+; CHECK-FP16-NEXT: ld1 { v1.h }[3], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #40
+; CHECK-FP16-NEXT: ldr h3, [sp]
+; CHECK-FP16-NEXT: ld1 { v1.h }[4], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #48
+; CHECK-FP16-NEXT: fminnm v2.8h, v3.8h, v2.8h
+; CHECK-FP16-NEXT: mov v0.h[4], v4.h[0]
+; CHECK-FP16-NEXT: ld1 { v1.h }[5], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #56
+; CHECK-FP16-NEXT: str h2, [x8, #16]
+; CHECK-FP16-NEXT: mov v0.h[5], v5.h[0]
+; CHECK-FP16-NEXT: ld1 { v1.h }[6], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #64
+; CHECK-FP16-NEXT: mov v0.h[6], v6.h[0]
+; CHECK-FP16-NEXT: ld1 { v1.h }[7], [x9]
+; CHECK-FP16-NEXT: mov v0.h[7], v7.h[0]
+; CHECK-FP16-NEXT: fminnm v0.8h, v0.8h, v1.8h
+; CHECK-FP16-NEXT: str q0, [x8]
+; CHECK-FP16-NEXT: ret
entry:
%c = call nnan <9 x half> @llvm.minimumnum.v9f16(<9 x half> %a, <9 x half> %b)
ret <9 x half> %c
}
define <16 x half> @min_nnan_v16f16(<16 x half> %a, <16 x half> %b) {
-; FULLFP16-LABEL: min_nnan_v16f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fminnm v1.8h, v1.8h, v3.8h
-; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v2.8h
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: min_nnan_v16f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: mov h6, v2.h[1]
+; CHECK-NOFP16-NEXT: mov h7, v0.h[1]
+; CHECK-NOFP16-NEXT: fcvt s4, h2
+; CHECK-NOFP16-NEXT: fcvt s5, h0
+; CHECK-NOFP16-NEXT: mov h16, v3.h[1]
+; CHECK-NOFP16-NEXT: mov h17, v1.h[1]
+; CHECK-NOFP16-NEXT: mov h18, v2.h[2]
+; CHECK-NOFP16-NEXT: mov h19, v0.h[2]
+; CHECK-NOFP16-NEXT: fcvt s20, h3
+; CHECK-NOFP16-NEXT: fcvt s21, h1
+; CHECK-NOFP16-NEXT: mov h22, v3.h[2]
+; CHECK-NOFP16-NEXT: mov h23, v1.h[2]
+; CHECK-NOFP16-NEXT: fcvt s6, h6
+; CHECK-NOFP16-NEXT: fcvt s7, h7
+; CHECK-NOFP16-NEXT: mov h24, v0.h[6]
+; CHECK-NOFP16-NEXT: fminnm s4, s5, s4
+; CHECK-NOFP16-NEXT: fcvt s5, h16
+; CHECK-NOFP16-NEXT: fcvt s16, h17
+; CHECK-NOFP16-NEXT: fcvt s17, h18
+; CHECK-NOFP16-NEXT: fcvt s18, h19
+; CHECK-NOFP16-NEXT: mov h19, v0.h[3]
+; CHECK-NOFP16-NEXT: fminnm s20, s21, s20
+; CHECK-NOFP16-NEXT: fcvt s21, h22
+; CHECK-NOFP16-NEXT: mov h22, v3.h[3]
+; CHECK-NOFP16-NEXT: fminnm s6, s7, s6
+; CHECK-NOFP16-NEXT: mov h7, v2.h[3]
+; CHECK-NOFP16-NEXT: mov h25, v1.h[6]
+; CHECK-NOFP16-NEXT: fcvt h4, s4
+; CHECK-NOFP16-NEXT: fminnm s5, s16, s5
+; CHECK-NOFP16-NEXT: fcvt s16, h23
+; CHECK-NOFP16-NEXT: mov h23, v1.h[3]
+; CHECK-NOFP16-NEXT: fminnm s17, s18, s17
+; CHECK-NOFP16-NEXT: fcvt s18, h19
+; CHECK-NOFP16-NEXT: fcvt h6, s6
+; CHECK-NOFP16-NEXT: fcvt s7, h7
+; CHECK-NOFP16-NEXT: fcvt h19, s5
+; CHECK-NOFP16-NEXT: fcvt h5, s20
+; CHECK-NOFP16-NEXT: fminnm s16, s16, s21
+; CHECK-NOFP16-NEXT: fcvt s20, h23
+; CHECK-NOFP16-NEXT: fcvt h17, s17
+; CHECK-NOFP16-NEXT: mov h21, v2.h[4]
+; CHECK-NOFP16-NEXT: mov h23, v1.h[4]
+; CHECK-NOFP16-NEXT: mov v4.h[1], v6.h[0]
+; CHECK-NOFP16-NEXT: fcvt s6, h22
+; CHECK-NOFP16-NEXT: mov h22, v0.h[4]
+; CHECK-NOFP16-NEXT: fminnm s7, s18, s7
+; CHECK-NOFP16-NEXT: mov h18, v3.h[4]
+; CHECK-NOFP16-NEXT: mov v5.h[1], v19.h[0]
+; CHECK-NOFP16-NEXT: fcvt h16, s16
+; CHECK-NOFP16-NEXT: fminnm s6, s20, s6
+; CHECK-NOFP16-NEXT: mov v4.h[2], v17.h[0]
+; CHECK-NOFP16-NEXT: fcvt s17, h21
+; CHECK-NOFP16-NEXT: fcvt s19, h22
+; CHECK-NOFP16-NEXT: fcvt h7, s7
+; CHECK-NOFP16-NEXT: fcvt s18, h18
+; CHECK-NOFP16-NEXT: fcvt s20, h23
+; CHECK-NOFP16-NEXT: mov h21, v2.h[5]
+; CHECK-NOFP16-NEXT: mov h22, v0.h[5]
+; CHECK-NOFP16-NEXT: mov v5.h[2], v16.h[0]
+; CHECK-NOFP16-NEXT: mov h16, v3.h[5]
+; CHECK-NOFP16-NEXT: mov h23, v1.h[5]
+; CHECK-NOFP16-NEXT: fcvt h6, s6
+; CHECK-NOFP16-NEXT: mov h0, v0.h[7]
+; CHECK-NOFP16-NEXT: mov h1, v1.h[7]
+; CHECK-NOFP16-NEXT: fminnm s17, s19, s17
+; CHECK-NOFP16-NEXT: mov h19, v2.h[6]
+; CHECK-NOFP16-NEXT: mov v4.h[3], v7.h[0]
+; CHECK-NOFP16-NEXT: fminnm s18, s20, s18
+; CHECK-NOFP16-NEXT: mov h20, v3.h[6]
+; CHECK-NOFP16-NEXT: fcvt s7, h21
+; CHECK-NOFP16-NEXT: fcvt s21, h22
+; CHECK-NOFP16-NEXT: fcvt s22, h24
+; CHECK-NOFP16-NEXT: mov h2, v2.h[7]
+; CHECK-NOFP16-NEXT: mov v5.h[3], v6.h[0]
+; CHECK-NOFP16-NEXT: fcvt s6, h16
+; CHECK-NOFP16-NEXT: fcvt s16, h23
+; CHECK-NOFP16-NEXT: fcvt h17, s17
+; CHECK-NOFP16-NEXT: fcvt s19, h19
+; CHECK-NOFP16-NEXT: fcvt s23, h25
+; CHECK-NOFP16-NEXT: fcvt h18, s18
+; CHECK-NOFP16-NEXT: fcvt s20, h20
+; CHECK-NOFP16-NEXT: mov h3, v3.h[7]
+; CHECK-NOFP16-NEXT: fminnm s7, s21, s7
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s0, h0
+; CHECK-NOFP16-NEXT: fminnm s6, s16, s6
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: mov v4.h[4], v17.h[0]
+; CHECK-NOFP16-NEXT: fminnm s16, s22, s19
+; CHECK-NOFP16-NEXT: mov v5.h[4], v18.h[0]
+; CHECK-NOFP16-NEXT: fminnm s17, s23, s20
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fcvt h7, s7
+; CHECK-NOFP16-NEXT: fminnm s0, s0, s2
+; CHECK-NOFP16-NEXT: fcvt h6, s6
+; CHECK-NOFP16-NEXT: fcvt h2, s16
+; CHECK-NOFP16-NEXT: fminnm s1, s1, s3
+; CHECK-NOFP16-NEXT: mov v4.h[5], v7.h[0]
+; CHECK-NOFP16-NEXT: fcvt h0, s0
+; CHECK-NOFP16-NEXT: mov v5.h[5], v6.h[0]
+; CHECK-NOFP16-NEXT: fcvt h6, s17
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: mov v4.h[6], v2.h[0]
+; CHECK-NOFP16-NEXT: mov v5.h[6], v6.h[0]
+; CHECK-NOFP16-NEXT: mov v4.h[7], v0.h[0]
+; CHECK-NOFP16-NEXT: mov v5.h[7], v1.h[0]
+; CHECK-NOFP16-NEXT: mov v0.16b, v4.16b
+; CHECK-NOFP16-NEXT: mov v1.16b, v5.16b
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: min_nnan_v16f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: mov h6, v2.h[1]
-; NOFULLFP16-NEXT: mov h7, v0.h[1]
-; NOFULLFP16-NEXT: fcvt s4, h2
-; NOFULLFP16-NEXT: fcvt s5, h0
-; NOFULLFP16-NEXT: mov h16, v3.h[1]
-; NOFULLFP16-NEXT: mov h17, v1.h[1]
-; NOFULLFP16-NEXT: mov h18, v2.h[2]
-; NOFULLFP16-NEXT: mov h19, v0.h[2]
-; NOFULLFP16-NEXT: fcvt s20, h3
-; NOFULLFP16-NEXT: fcvt s21, h1
-; NOFULLFP16-NEXT: mov h22, v3.h[2]
-; NOFULLFP16-NEXT: mov h23, v1.h[2]
-; NOFULLFP16-NEXT: fcvt s6, h6
-; NOFULLFP16-NEXT: fcvt s7, h7
-; NOFULLFP16-NEXT: mov h24, v0.h[6]
-; NOFULLFP16-NEXT: fminnm s4, s5, s4
-; NOFULLFP16-NEXT: fcvt s5, h16
-; NOFULLFP16-NEXT: fcvt s16, h17
-; NOFULLFP16-NEXT: fcvt s17, h18
-; NOFULLFP16-NEXT: fcvt s18, h19
-; NOFULLFP16-NEXT: mov h19, v0.h[3]
-; NOFULLFP16-NEXT: fminnm s20, s21, s20
-; NOFULLFP16-NEXT: fcvt s21, h22
-; NOFULLFP16-NEXT: mov h22, v3.h[3]
-; NOFULLFP16-NEXT: fminnm s6, s7, s6
-; NOFULLFP16-NEXT: mov h7, v2.h[3]
-; NOFULLFP16-NEXT: mov h25, v1.h[6]
-; NOFULLFP16-NEXT: fcvt h4, s4
-; NOFULLFP16-NEXT: fminnm s5, s16, s5
-; NOFULLFP16-NEXT: fcvt s16, h23
-; NOFULLFP16-NEXT: mov h23, v1.h[3]
-; NOFULLFP16-NEXT: fminnm s17, s18, s17
-; NOFULLFP16-NEXT: fcvt s18, h19
-; NOFULLFP16-NEXT: fcvt h6, s6
-; NOFULLFP16-NEXT: fcvt s7, h7
-; NOFULLFP16-NEXT: fcvt h19, s5
-; NOFULLFP16-NEXT: fcvt h5, s20
-; NOFULLFP16-NEXT: fminnm s16, s16, s21
-; NOFULLFP16-NEXT: fcvt s20, h23
-; NOFULLFP16-NEXT: fcvt h17, s17
-; NOFULLFP16-NEXT: mov h21, v2.h[4]
-; NOFULLFP16-NEXT: mov h23, v1.h[4]
-; NOFULLFP16-NEXT: mov v4.h[1], v6.h[0]
-; NOFULLFP16-NEXT: fcvt s6, h22
-; NOFULLFP16-NEXT: mov h22, v0.h[4]
-; NOFULLFP16-NEXT: fminnm s7, s18, s7
-; NOFULLFP16-NEXT: mov h18, v3.h[4]
-; NOFULLFP16-NEXT: mov v5.h[1], v19.h[0]
-; NOFULLFP16-NEXT: fcvt h16, s16
-; NOFULLFP16-NEXT: fminnm s6, s20, s6
-; NOFULLFP16-NEXT: mov v4.h[2], v17.h[0]
-; NOFULLFP16-NEXT: fcvt s17, h21
-; NOFULLFP16-NEXT: fcvt s19, h22
-; NOFULLFP16-NEXT: fcvt h7, s7
-; NOFULLFP16-NEXT: fcvt s18, h18
-; NOFULLFP16-NEXT: fcvt s20, h23
-; NOFULLFP16-NEXT: mov h21, v2.h[5]
-; NOFULLFP16-NEXT: mov h22, v0.h[5]
-; NOFULLFP16-NEXT: mov v5.h[2], v16.h[0]
-; NOFULLFP16-NEXT: mov h16, v3.h[5]
-; NOFULLFP16-NEXT: mov h23, v1.h[5]
-; NOFULLFP16-NEXT: fcvt h6, s6
-; NOFULLFP16-NEXT: mov h0, v0.h[7]
-; NOFULLFP16-NEXT: mov h1, v1.h[7]
-; NOFULLFP16-NEXT: fminnm s17, s19, s17
-; NOFULLFP16-NEXT: mov h19, v2.h[6]
-; NOFULLFP16-NEXT: mov v4.h[3], v7.h[0]
-; NOFULLFP16-NEXT: fminnm s18, s20, s18
-; NOFULLFP16-NEXT: mov h20, v3.h[6]
-; NOFULLFP16-NEXT: fcvt s7, h21
-; NOFULLFP16-NEXT: fcvt s21, h22
-; NOFULLFP16-NEXT: fcvt s22, h24
-; NOFULLFP16-NEXT: mov h2, v2.h[7]
-; NOFULLFP16-NEXT: mov v5.h[3], v6.h[0]
-; NOFULLFP16-NEXT: fcvt s6, h16
-; NOFULLFP16-NEXT: fcvt s16, h23
-; NOFULLFP16-NEXT: fcvt h17, s17
-; NOFULLFP16-NEXT: fcvt s19, h19
-; NOFULLFP16-NEXT: fcvt s23, h25
-; NOFULLFP16-NEXT: fcvt h18, s18
-; NOFULLFP16-NEXT: fcvt s20, h20
-; NOFULLFP16-NEXT: mov h3, v3.h[7]
-; NOFULLFP16-NEXT: fminnm s7, s21, s7
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s0, h0
-; NOFULLFP16-NEXT: fminnm s6, s16, s6
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: mov v4.h[4], v17.h[0]
-; NOFULLFP16-NEXT: fminnm s16, s22, s19
-; NOFULLFP16-NEXT: mov v5.h[4], v18.h[0]
-; NOFULLFP16-NEXT: fminnm s17, s23, s20
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fcvt h7, s7
-; NOFULLFP16-NEXT: fminnm s0, s0, s2
-; NOFULLFP16-NEXT: fcvt h6, s6
-; NOFULLFP16-NEXT: fcvt h2, s16
-; NOFULLFP16-NEXT: fminnm s1, s1, s3
-; NOFULLFP16-NEXT: mov v4.h[5], v7.h[0]
-; NOFULLFP16-NEXT: fcvt h0, s0
-; NOFULLFP16-NEXT: mov v5.h[5], v6.h[0]
-; NOFULLFP16-NEXT: fcvt h6, s17
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: mov v4.h[6], v2.h[0]
-; NOFULLFP16-NEXT: mov v5.h[6], v6.h[0]
-; NOFULLFP16-NEXT: mov v4.h[7], v0.h[0]
-; NOFULLFP16-NEXT: mov v5.h[7], v1.h[0]
-; NOFULLFP16-NEXT: mov v0.16b, v4.16b
-; NOFULLFP16-NEXT: mov v1.16b, v5.16b
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: min_nnan_v16f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fminnm v1.8h, v1.8h, v3.8h
+; CHECK-FP16-NEXT: fminnm v0.8h, v0.8h, v2.8h
+; CHECK-FP16-NEXT: ret
entry:
%c = call nnan <16 x half> @llvm.minimumnum.v16f16(<16 x half> %a, <16 x half> %b)
ret <16 x half> %c
@@ -1078,61 +1214,61 @@ entry:
;;;;;;;;;;;;;;;; max_f128
define fp128 @max_fp128(fp128 %x, fp128 %y) {
-; AARCH64-LABEL: max_fp128:
-; AARCH64: // %bb.0: // %start
-; AARCH64-NEXT: sub sp, sp, #48
-; AARCH64-NEXT: str x30, [sp, #32] // 8-byte Spill
-; AARCH64-NEXT: .cfi_def_cfa_offset 48
-; AARCH64-NEXT: .cfi_offset w30, -16
-; AARCH64-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
-; AARCH64-NEXT: mov v1.16b, v0.16b
-; AARCH64-NEXT: bl __unordtf2
-; AARCH64-NEXT: ldr q0, [sp, #16] // 16-byte Reload
-; AARCH64-NEXT: cmp w0, #0
-; AARCH64-NEXT: b.eq .LBB32_2
-; AARCH64-NEXT: // %bb.1: // %start
-; AARCH64-NEXT: str q0, [sp] // 16-byte Spill
-; AARCH64-NEXT: .LBB32_2: // %start
-; AARCH64-NEXT: mov v1.16b, v0.16b
-; AARCH64-NEXT: bl __unordtf2
-; AARCH64-NEXT: ldp q0, q1, [sp] // 32-byte Folded Reload
-; AARCH64-NEXT: cmp w0, #0
-; AARCH64-NEXT: b.eq .LBB32_4
-; AARCH64-NEXT: // %bb.3: // %start
-; AARCH64-NEXT: mov v1.16b, v0.16b
-; AARCH64-NEXT: .LBB32_4: // %start
-; AARCH64-NEXT: ldr q0, [sp] // 16-byte Reload
-; AARCH64-NEXT: str q1, [sp, #16] // 16-byte Spill
-; AARCH64-NEXT: bl __gttf2
-; AARCH64-NEXT: ldr q0, [sp] // 16-byte Reload
-; AARCH64-NEXT: cmp w0, #0
-; AARCH64-NEXT: b.le .LBB32_6
-; AARCH64-NEXT: // %bb.5: // %start
-; AARCH64-NEXT: str q0, [sp, #16] // 16-byte Spill
-; AARCH64-NEXT: .LBB32_6: // %start
-; AARCH64-NEXT: str q0, [sp] // 16-byte Spill
-; AARCH64-NEXT: bl __trunctfsf2
-; AARCH64-NEXT: fmov w8, s0
-; AARCH64-NEXT: ldr q0, [sp, #16] // 16-byte Reload
-; AARCH64-NEXT: mov v1.16b, v0.16b
-; AARCH64-NEXT: cmp w8, #0
-; AARCH64-NEXT: b.ne .LBB32_8
-; AARCH64-NEXT: // %bb.7: // %start
-; AARCH64-NEXT: ldr q1, [sp] // 16-byte Reload
-; AARCH64-NEXT: .LBB32_8: // %start
-; AARCH64-NEXT: adrp x8, .LCPI32_0
-; AARCH64-NEXT: str q1, [sp] // 16-byte Spill
-; AARCH64-NEXT: ldr q1, [x8, :lo12:.LCPI32_0]
-; AARCH64-NEXT: bl __eqtf2
-; AARCH64-NEXT: ldr q0, [sp, #16] // 16-byte Reload
-; AARCH64-NEXT: cmp w0, #0
-; AARCH64-NEXT: b.ne .LBB32_10
-; AARCH64-NEXT: // %bb.9: // %start
-; AARCH64-NEXT: ldr q0, [sp] // 16-byte Reload
-; AARCH64-NEXT: .LBB32_10: // %start
-; AARCH64-NEXT: ldr x30, [sp, #32] // 8-byte Reload
-; AARCH64-NEXT: add sp, sp, #48
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_fp128:
+; CHECK: // %bb.0: // %start
+; CHECK-NEXT: sub sp, sp, #48
+; CHECK-NEXT: str x30, [sp, #32] // 8-byte Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 48
+; CHECK-NEXT: .cfi_offset w30, -16
+; CHECK-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
+; CHECK-NEXT: mov v1.16b, v0.16b
+; CHECK-NEXT: bl __unordtf2
+; CHECK-NEXT: ldr q0, [sp, #16] // 16-byte Reload
+; CHECK-NEXT: cmp w0, #0
+; CHECK-NEXT: b.eq .LBB32_2
+; CHECK-NEXT: // %bb.1: // %start
+; CHECK-NEXT: str q0, [sp] // 16-byte Spill
+; CHECK-NEXT: .LBB32_2: // %start
+; CHECK-NEXT: mov v1.16b, v0.16b
+; CHECK-NEXT: bl __unordtf2
+; CHECK-NEXT: ldp q0, q1, [sp] // 32-byte Folded Reload
+; CHECK-NEXT: cmp w0, #0
+; CHECK-NEXT: b.eq .LBB32_4
+; CHECK-NEXT: // %bb.3: // %start
+; CHECK-NEXT: mov v1.16b, v0.16b
+; CHECK-NEXT: .LBB32_4: // %start
+; CHECK-NEXT: ldr q0, [sp] // 16-byte Reload
+; CHECK-NEXT: str q1, [sp, #16] // 16-byte Spill
+; CHECK-NEXT: bl __gttf2
+; CHECK-NEXT: ldr q0, [sp] // 16-byte Reload
+; CHECK-NEXT: cmp w0, #0
+; CHECK-NEXT: b.le .LBB32_6
+; CHECK-NEXT: // %bb.5: // %start
+; CHECK-NEXT: str q0, [sp, #16] // 16-byte Spill
+; CHECK-NEXT: .LBB32_6: // %start
+; CHECK-NEXT: str q0, [sp] // 16-byte Spill
+; CHECK-NEXT: bl __trunctfsf2
+; CHECK-NEXT: fmov w8, s0
+; CHECK-NEXT: ldr q0, [sp, #16] // 16-byte Reload
+; CHECK-NEXT: mov v1.16b, v0.16b
+; CHECK-NEXT: cmp w8, #0
+; CHECK-NEXT: b.ne .LBB32_8
+; CHECK-NEXT: // %bb.7: // %start
+; CHECK-NEXT: ldr q1, [sp] // 16-byte Reload
+; CHECK-NEXT: .LBB32_8: // %start
+; CHECK-NEXT: adrp x8, .LCPI32_0
+; CHECK-NEXT: str q1, [sp] // 16-byte Spill
+; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI32_0]
+; CHECK-NEXT: bl __eqtf2
+; CHECK-NEXT: ldr q0, [sp, #16] // 16-byte Reload
+; CHECK-NEXT: cmp w0, #0
+; CHECK-NEXT: b.ne .LBB32_10
+; CHECK-NEXT: // %bb.9: // %start
+; CHECK-NEXT: ldr q0, [sp] // 16-byte Reload
+; CHECK-NEXT: .LBB32_10: // %start
+; CHECK-NEXT: ldr x30, [sp, #32] // 8-byte Reload
+; CHECK-NEXT: add sp, sp, #48
+; CHECK-NEXT: ret
start:
%0 = tail call fp128 @llvm.maximumnum.f128(fp128 %x, fp128 %y)
ret fp128 %0
@@ -1140,66 +1276,66 @@ start:
;;;;;;;;;;;;;;;; max_f64
define double @max_f64(double %a, double %b) {
-; AARCH64-LABEL: max_f64:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm d1, d1, d1
-; AARCH64-NEXT: fminnm d0, d0, d0
-; AARCH64-NEXT: fmaxnm d0, d0, d1
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm d1, d1, d1
+; CHECK-NEXT: fminnm d0, d0, d0
+; CHECK-NEXT: fmaxnm d0, d0, d1
+; CHECK-NEXT: ret
entry:
%c = call double @llvm.maximumnum.f64(double %a, double %b)
ret double %c
}
define <2 x double> @max_v2f64(<2 x double> %a, <2 x double> %b) {
-; AARCH64-LABEL: max_v2f64:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.2d, v1.2d, v1.2d
-; AARCH64-NEXT: fminnm v0.2d, v0.2d, v0.2d
-; AARCH64-NEXT: fmaxnm v0.2d, v0.2d, v1.2d
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_v2f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v1.2d, v1.2d, v1.2d
+; CHECK-NEXT: fminnm v0.2d, v0.2d, v0.2d
+; CHECK-NEXT: fmaxnm v0.2d, v0.2d, v1.2d
+; CHECK-NEXT: ret
entry:
%c = call <2 x double> @llvm.maximumnum.v2f64(<2 x double> %a, <2 x double> %b)
ret <2 x double> %c
}
define <3 x double> @max_v3f64(<3 x double> %a, <3 x double> %b) {
-; AARCH64-LABEL: max_v3f64:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: // kill: def $d3 killed $d3 def $q3
-; AARCH64-NEXT: // kill: def $d0 killed $d0 def $q0
-; AARCH64-NEXT: // kill: def $d4 killed $d4 def $q4
-; AARCH64-NEXT: // kill: def $d1 killed $d1 def $q1
-; AARCH64-NEXT: // kill: def $d2 killed $d2 def $q2
-; AARCH64-NEXT: // kill: def $d5 killed $d5 def $q5
-; AARCH64-NEXT: mov v0.d[1], v1.d[0]
-; AARCH64-NEXT: mov v3.d[1], v4.d[0]
-; AARCH64-NEXT: fminnm v2.2d, v2.2d, v2.2d
-; AARCH64-NEXT: fminnm v1.2d, v3.2d, v3.2d
-; AARCH64-NEXT: fminnm v0.2d, v0.2d, v0.2d
-; AARCH64-NEXT: fmaxnm v0.2d, v0.2d, v1.2d
-; AARCH64-NEXT: fminnm v1.2d, v5.2d, v5.2d
-; AARCH64-NEXT: fmaxnm v2.2d, v2.2d, v1.2d
-; AARCH64-NEXT: ext v1.16b, v0.16b, v0.16b, #8
-; AARCH64-NEXT: // kill: def $d0 killed $d0 killed $q0
-; AARCH64-NEXT: // kill: def $d1 killed $d1 killed $q1
-; AARCH64-NEXT: // kill: def $d2 killed $d2 killed $q2
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_v3f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: // kill: def $d3 killed $d3 def $q3
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT: // kill: def $d4 killed $d4 def $q4
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
+; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
+; CHECK-NEXT: // kill: def $d5 killed $d5 def $q5
+; CHECK-NEXT: mov v0.d[1], v1.d[0]
+; CHECK-NEXT: mov v3.d[1], v4.d[0]
+; CHECK-NEXT: fminnm v2.2d, v2.2d, v2.2d
+; CHECK-NEXT: fminnm v1.2d, v3.2d, v3.2d
+; CHECK-NEXT: fminnm v0.2d, v0.2d, v0.2d
+; CHECK-NEXT: fmaxnm v0.2d, v0.2d, v1.2d
+; CHECK-NEXT: fminnm v1.2d, v5.2d, v5.2d
+; CHECK-NEXT: fmaxnm v2.2d, v2.2d, v1.2d
+; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q1
+; CHECK-NEXT: // kill: def $d2 killed $d2 killed $q2
+; CHECK-NEXT: ret
entry:
%c = call <3 x double> @llvm.maximumnum.v3f64(<3 x double> %a, <3 x double> %b)
ret <3 x double> %c
}
define <4 x double> @max_v4f64(<4 x double> %a, <4 x double> %b) {
-; AARCH64-LABEL: max_v4f64:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v2.2d, v2.2d, v2.2d
-; AARCH64-NEXT: fminnm v0.2d, v0.2d, v0.2d
-; AARCH64-NEXT: fminnm v3.2d, v3.2d, v3.2d
-; AARCH64-NEXT: fminnm v1.2d, v1.2d, v1.2d
-; AARCH64-NEXT: fmaxnm v0.2d, v0.2d, v2.2d
-; AARCH64-NEXT: fmaxnm v1.2d, v1.2d, v3.2d
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_v4f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v2.2d, v2.2d, v2.2d
+; CHECK-NEXT: fminnm v0.2d, v0.2d, v0.2d
+; CHECK-NEXT: fminnm v3.2d, v3.2d, v3.2d
+; CHECK-NEXT: fminnm v1.2d, v1.2d, v1.2d
+; CHECK-NEXT: fmaxnm v0.2d, v0.2d, v2.2d
+; CHECK-NEXT: fmaxnm v1.2d, v1.2d, v3.2d
+; CHECK-NEXT: ret
entry:
%c = call <4 x double> @llvm.maximumnum.v4f64(<4 x double> %a, <4 x double> %b)
ret <4 x double> %c
@@ -1207,99 +1343,99 @@ entry:
;;;;;;;;;;;;;;;;;; max_f32
define float @max_f32(float %a, float %b) {
-; AARCH64-LABEL: max_f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm s1, s1, s1
-; AARCH64-NEXT: fminnm s0, s0, s0
-; AARCH64-NEXT: fmaxnm s0, s0, s1
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm s1, s1, s1
+; CHECK-NEXT: fminnm s0, s0, s0
+; CHECK-NEXT: fmaxnm s0, s0, s1
+; CHECK-NEXT: ret
entry:
%c = call float @llvm.maximumnum.f32(float %a, float %b)
ret float %c
}
define <2 x float> @max_v2f32(<2 x float> %a, <2 x float> %b) {
-; AARCH64-LABEL: max_v2f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.2s, v1.2s, v1.2s
-; AARCH64-NEXT: fminnm v0.2s, v0.2s, v0.2s
-; AARCH64-NEXT: fmaxnm v0.2s, v0.2s, v1.2s
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_v2f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v1.2s, v1.2s, v1.2s
+; CHECK-NEXT: fminnm v0.2s, v0.2s, v0.2s
+; CHECK-NEXT: fmaxnm v0.2s, v0.2s, v1.2s
+; CHECK-NEXT: ret
entry:
%c = call <2 x float> @llvm.maximumnum.v2f32(<2 x float> %a, <2 x float> %b)
ret <2 x float> %c
}
define <3 x float> @max_v3f32(<3 x float> %a, <3 x float> %b) {
-; AARCH64-LABEL: max_v3f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.4s, v1.4s, v1.4s
-; AARCH64-NEXT: fminnm v0.4s, v0.4s, v0.4s
-; AARCH64-NEXT: fmaxnm v0.4s, v0.4s, v1.4s
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_v3f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v1.4s, v1.4s, v1.4s
+; CHECK-NEXT: fminnm v0.4s, v0.4s, v0.4s
+; CHECK-NEXT: fmaxnm v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: ret
entry:
%c = call <3 x float> @llvm.maximumnum.v3f32(<3 x float> %a, <3 x float> %b)
ret <3 x float> %c
}
define <4 x float> @max_v4f32(<4 x float> %a, <4 x float> %b) {
-; AARCH64-LABEL: max_v4f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.4s, v1.4s, v1.4s
-; AARCH64-NEXT: fminnm v0.4s, v0.4s, v0.4s
-; AARCH64-NEXT: fmaxnm v0.4s, v0.4s, v1.4s
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_v4f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v1.4s, v1.4s, v1.4s
+; CHECK-NEXT: fminnm v0.4s, v0.4s, v0.4s
+; CHECK-NEXT: fmaxnm v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: ret
entry:
%c = call <4 x float> @llvm.maximumnum.v4f32(<4 x float> %a, <4 x float> %b)
ret <4 x float> %c
}
define <5 x float> @max_v5f32(<5 x float> %a, <5 x float> %b) {
-; AARCH64-LABEL: max_v5f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: // kill: def $s0 killed $s0 def $q0
-; AARCH64-NEXT: // kill: def $s5 killed $s5 def $q5
-; AARCH64-NEXT: // kill: def $s1 killed $s1 def $q1
-; AARCH64-NEXT: // kill: def $s6 killed $s6 def $q6
-; AARCH64-NEXT: // kill: def $s2 killed $s2 def $q2
-; AARCH64-NEXT: // kill: def $s7 killed $s7 def $q7
-; AARCH64-NEXT: // kill: def $s3 killed $s3 def $q3
-; AARCH64-NEXT: mov x8, sp
-; AARCH64-NEXT: // kill: def $s4 killed $s4 def $q4
-; AARCH64-NEXT: mov v0.s[1], v1.s[0]
-; AARCH64-NEXT: mov v5.s[1], v6.s[0]
-; AARCH64-NEXT: mov v0.s[2], v2.s[0]
-; AARCH64-NEXT: mov v5.s[2], v7.s[0]
-; AARCH64-NEXT: ldr s2, [sp, #8]
-; AARCH64-NEXT: fminnm v2.4s, v2.4s, v2.4s
-; AARCH64-NEXT: mov v0.s[3], v3.s[0]
-; AARCH64-NEXT: ld1 { v5.s }[3], [x8]
-; AARCH64-NEXT: fminnm v3.4s, v4.4s, v4.4s
-; AARCH64-NEXT: fminnm v1.4s, v5.4s, v5.4s
-; AARCH64-NEXT: fminnm v0.4s, v0.4s, v0.4s
-; AARCH64-NEXT: fmaxnm v4.4s, v3.4s, v2.4s
-; AARCH64-NEXT: // kill: def $s4 killed $s4 killed $q4
-; AARCH64-NEXT: fmaxnm v0.4s, v0.4s, v1.4s
-; AARCH64-NEXT: mov s1, v0.s[1]
-; AARCH64-NEXT: mov s2, v0.s[2]
-; AARCH64-NEXT: mov s3, v0.s[3]
-; AARCH64-NEXT: // kill: def $s0 killed $s0 killed $q0
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_v5f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: // kill: def $s0 killed $s0 def $q0
+; CHECK-NEXT: // kill: def $s5 killed $s5 def $q5
+; CHECK-NEXT: // kill: def $s1 killed $s1 def $q1
+; CHECK-NEXT: // kill: def $s6 killed $s6 def $q6
+; CHECK-NEXT: // kill: def $s2 killed $s2 def $q2
+; CHECK-NEXT: // kill: def $s7 killed $s7 def $q7
+; CHECK-NEXT: // kill: def $s3 killed $s3 def $q3
+; CHECK-NEXT: mov x8, sp
+; CHECK-NEXT: // kill: def $s4 killed $s4 def $q4
+; CHECK-NEXT: mov v0.s[1], v1.s[0]
+; CHECK-NEXT: mov v5.s[1], v6.s[0]
+; CHECK-NEXT: mov v0.s[2], v2.s[0]
+; CHECK-NEXT: mov v5.s[2], v7.s[0]
+; CHECK-NEXT: ldr s2, [sp, #8]
+; CHECK-NEXT: fminnm v2.4s, v2.4s, v2.4s
+; CHECK-NEXT: mov v0.s[3], v3.s[0]
+; CHECK-NEXT: ld1 { v5.s }[3], [x8]
+; CHECK-NEXT: fminnm v3.4s, v4.4s, v4.4s
+; CHECK-NEXT: fminnm v1.4s, v5.4s, v5.4s
+; CHECK-NEXT: fminnm v0.4s, v0.4s, v0.4s
+; CHECK-NEXT: fmaxnm v4.4s, v3.4s, v2.4s
+; CHECK-NEXT: // kill: def $s4 killed $s4 killed $q4
+; CHECK-NEXT: fmaxnm v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: mov s1, v0.s[1]
+; CHECK-NEXT: mov s2, v0.s[2]
+; CHECK-NEXT: mov s3, v0.s[3]
+; CHECK-NEXT: // kill: def $s0 killed $s0 killed $q0
+; CHECK-NEXT: ret
entry:
%c = call <5 x float> @llvm.maximumnum.v5f32(<5 x float> %a, <5 x float> %b)
ret <5 x float> %c
}
define <8 x float> @max_v8f32(<8 x float> %a, <8 x float> %b) {
-; AARCH64-LABEL: max_v8f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v2.4s, v2.4s, v2.4s
-; AARCH64-NEXT: fminnm v0.4s, v0.4s, v0.4s
-; AARCH64-NEXT: fminnm v3.4s, v3.4s, v3.4s
-; AARCH64-NEXT: fminnm v1.4s, v1.4s, v1.4s
-; AARCH64-NEXT: fmaxnm v0.4s, v0.4s, v2.4s
-; AARCH64-NEXT: fmaxnm v1.4s, v1.4s, v3.4s
-; AARCH64-NEXT: ret
+; CHECK-LABEL: max_v8f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v2.4s, v2.4s, v2.4s
+; CHECK-NEXT: fminnm v0.4s, v0.4s, v0.4s
+; CHECK-NEXT: fminnm v3.4s, v3.4s, v3.4s
+; CHECK-NEXT: fminnm v1.4s, v1.4s, v1.4s
+; CHECK-NEXT: fmaxnm v0.4s, v0.4s, v2.4s
+; CHECK-NEXT: fmaxnm v1.4s, v1.4s, v3.4s
+; CHECK-NEXT: ret
entry:
%c = call <8 x float> @llvm.maximumnum.v8f32(<8 x float> %a, <8 x float> %b)
ret <8 x float> %c
@@ -1307,414 +1443,414 @@ entry:
;;;;;;;;;;;;;;;;;; max_f16
define half @max_f16(half %a, half %b) {
-; FULLFP16-LABEL: max_f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fminnm h1, h1, h1
-; FULLFP16-NEXT: fminnm h0, h0, h0
-; FULLFP16-NEXT: fmaxnm h0, h0, h1
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: max_f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fcvt s0, h0
+; CHECK-NOFP16-NEXT: fmaxnm s0, s0, s1
+; CHECK-NOFP16-NEXT: fcvt h0, s0
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: max_f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fcvt s0, h0
-; NOFULLFP16-NEXT: fmaxnm s0, s0, s1
-; NOFULLFP16-NEXT: fcvt h0, s0
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: max_f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fminnm h1, h1, h1
+; CHECK-FP16-NEXT: fminnm h0, h0, h0
+; CHECK-FP16-NEXT: fmaxnm h0, h0, h1
+; CHECK-FP16-NEXT: ret
entry:
%c = call half @llvm.maximumnum.f16(half %a, half %b)
ret half %c
}
define <2 x half> @max_v2f16(<2 x half> %a, <2 x half> %b) {
-; FULLFP16-LABEL: max_v2f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fminnm v1.4h, v1.4h, v1.4h
-; FULLFP16-NEXT: fminnm v0.4h, v0.4h, v0.4h
-; FULLFP16-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: max_v2f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: // kill: def $d1 killed $d1 def $q1
+; CHECK-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
+; CHECK-NOFP16-NEXT: mov h2, v1.h[1]
+; CHECK-NOFP16-NEXT: mov h3, v0.h[1]
+; CHECK-NOFP16-NEXT: mov h4, v1.h[2]
+; CHECK-NOFP16-NEXT: mov h5, v0.h[2]
+; CHECK-NOFP16-NEXT: fcvt s6, h1
+; CHECK-NOFP16-NEXT: fcvt s7, h0
+; CHECK-NOFP16-NEXT: mov h1, v1.h[3]
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fmaxnm s2, s3, s2
+; CHECK-NOFP16-NEXT: fcvt s3, h4
+; CHECK-NOFP16-NEXT: fcvt s4, h5
+; CHECK-NOFP16-NEXT: fmaxnm s5, s7, s6
+; CHECK-NOFP16-NEXT: mov h6, v0.h[3]
+; CHECK-NOFP16-NEXT: fmaxnm s3, s4, s3
+; CHECK-NOFP16-NEXT: fcvt h2, s2
+; CHECK-NOFP16-NEXT: fcvt h0, s5
+; CHECK-NOFP16-NEXT: fcvt s4, h6
+; CHECK-NOFP16-NEXT: mov v0.h[1], v2.h[0]
+; CHECK-NOFP16-NEXT: fcvt h2, s3
+; CHECK-NOFP16-NEXT: fmaxnm s1, s4, s1
+; CHECK-NOFP16-NEXT: mov v0.h[2], v2.h[0]
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: mov v0.h[3], v1.h[0]
+; CHECK-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: max_v2f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: // kill: def $d1 killed $d1 def $q1
-; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 def $q0
-; NOFULLFP16-NEXT: mov h2, v1.h[1]
-; NOFULLFP16-NEXT: mov h3, v0.h[1]
-; NOFULLFP16-NEXT: mov h4, v1.h[2]
-; NOFULLFP16-NEXT: mov h5, v0.h[2]
-; NOFULLFP16-NEXT: fcvt s6, h1
-; NOFULLFP16-NEXT: fcvt s7, h0
-; NOFULLFP16-NEXT: mov h1, v1.h[3]
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fmaxnm s2, s3, s2
-; NOFULLFP16-NEXT: fcvt s3, h4
-; NOFULLFP16-NEXT: fcvt s4, h5
-; NOFULLFP16-NEXT: fmaxnm s5, s7, s6
-; NOFULLFP16-NEXT: mov h6, v0.h[3]
-; NOFULLFP16-NEXT: fmaxnm s3, s4, s3
-; NOFULLFP16-NEXT: fcvt h2, s2
-; NOFULLFP16-NEXT: fcvt h0, s5
-; NOFULLFP16-NEXT: fcvt s4, h6
-; NOFULLFP16-NEXT: mov v0.h[1], v2.h[0]
-; NOFULLFP16-NEXT: fcvt h2, s3
-; NOFULLFP16-NEXT: fmaxnm s1, s4, s1
-; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: mov v0.h[3], v1.h[0]
-; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: max_v2f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fminnm v1.4h, v1.4h, v1.4h
+; CHECK-FP16-NEXT: fminnm v0.4h, v0.4h, v0.4h
+; CHECK-FP16-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
+; CHECK-FP16-NEXT: ret
entry:
%c = call <2 x half> @llvm.maximumnum.v2f16(<2 x half> %a, <2 x half> %b)
ret <2 x half> %c
}
define <4 x half> @max_v4f16(<4 x half> %a, <4 x half> %b) {
-; FULLFP16-LABEL: max_v4f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fminnm v1.4h, v1.4h, v1.4h
-; FULLFP16-NEXT: fminnm v0.4h, v0.4h, v0.4h
-; FULLFP16-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: max_v4f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: // kill: def $d1 killed $d1 def $q1
+; CHECK-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
+; CHECK-NOFP16-NEXT: mov h2, v1.h[1]
+; CHECK-NOFP16-NEXT: mov h3, v0.h[1]
+; CHECK-NOFP16-NEXT: mov h4, v1.h[2]
+; CHECK-NOFP16-NEXT: mov h5, v0.h[2]
+; CHECK-NOFP16-NEXT: fcvt s6, h1
+; CHECK-NOFP16-NEXT: fcvt s7, h0
+; CHECK-NOFP16-NEXT: mov h1, v1.h[3]
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fmaxnm s2, s3, s2
+; CHECK-NOFP16-NEXT: fcvt s3, h4
+; CHECK-NOFP16-NEXT: fcvt s4, h5
+; CHECK-NOFP16-NEXT: fmaxnm s5, s7, s6
+; CHECK-NOFP16-NEXT: mov h6, v0.h[3]
+; CHECK-NOFP16-NEXT: fmaxnm s3, s4, s3
+; CHECK-NOFP16-NEXT: fcvt h2, s2
+; CHECK-NOFP16-NEXT: fcvt h0, s5
+; CHECK-NOFP16-NEXT: fcvt s4, h6
+; CHECK-NOFP16-NEXT: mov v0.h[1], v2.h[0]
+; CHECK-NOFP16-NEXT: fcvt h2, s3
+; CHECK-NOFP16-NEXT: fmaxnm s1, s4, s1
+; CHECK-NOFP16-NEXT: mov v0.h[2], v2.h[0]
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: mov v0.h[3], v1.h[0]
+; CHECK-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: max_v4f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: // kill: def $d1 killed $d1 def $q1
-; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 def $q0
-; NOFULLFP16-NEXT: mov h2, v1.h[1]
-; NOFULLFP16-NEXT: mov h3, v0.h[1]
-; NOFULLFP16-NEXT: mov h4, v1.h[2]
-; NOFULLFP16-NEXT: mov h5, v0.h[2]
-; NOFULLFP16-NEXT: fcvt s6, h1
-; NOFULLFP16-NEXT: fcvt s7, h0
-; NOFULLFP16-NEXT: mov h1, v1.h[3]
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fmaxnm s2, s3, s2
-; NOFULLFP16-NEXT: fcvt s3, h4
-; NOFULLFP16-NEXT: fcvt s4, h5
-; NOFULLFP16-NEXT: fmaxnm s5, s7, s6
-; NOFULLFP16-NEXT: mov h6, v0.h[3]
-; NOFULLFP16-NEXT: fmaxnm s3, s4, s3
-; NOFULLFP16-NEXT: fcvt h2, s2
-; NOFULLFP16-NEXT: fcvt h0, s5
-; NOFULLFP16-NEXT: fcvt s4, h6
-; NOFULLFP16-NEXT: mov v0.h[1], v2.h[0]
-; NOFULLFP16-NEXT: fcvt h2, s3
-; NOFULLFP16-NEXT: fmaxnm s1, s4, s1
-; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: mov v0.h[3], v1.h[0]
-; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: max_v4f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fminnm v1.4h, v1.4h, v1.4h
+; CHECK-FP16-NEXT: fminnm v0.4h, v0.4h, v0.4h
+; CHECK-FP16-NEXT: fmaxnm v0.4h, v0.4h, v1.4h
+; CHECK-FP16-NEXT: ret
entry:
%c = call <4 x half> @llvm.maximumnum.v4f16(<4 x half> %a, <4 x half> %b)
ret <4 x half> %c
}
define <8 x half> @max_v8f16(<8 x half> %a, <8 x half> %b) {
-; FULLFP16-LABEL: max_v8f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
-; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
-; FULLFP16-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: max_v8f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: mov h2, v1.h[1]
+; CHECK-NOFP16-NEXT: mov h3, v0.h[1]
+; CHECK-NOFP16-NEXT: fcvt s4, h1
+; CHECK-NOFP16-NEXT: fcvt s5, h0
+; CHECK-NOFP16-NEXT: mov h6, v1.h[2]
+; CHECK-NOFP16-NEXT: mov h7, v0.h[2]
+; CHECK-NOFP16-NEXT: mov h16, v1.h[3]
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fmaxnm s4, s5, s4
+; CHECK-NOFP16-NEXT: mov h5, v0.h[3]
+; CHECK-NOFP16-NEXT: fcvt s6, h6
+; CHECK-NOFP16-NEXT: fcvt s7, h7
+; CHECK-NOFP16-NEXT: fcvt s16, h16
+; CHECK-NOFP16-NEXT: fmaxnm s3, s3, s2
+; CHECK-NOFP16-NEXT: fcvt s5, h5
+; CHECK-NOFP16-NEXT: fcvt h2, s4
+; CHECK-NOFP16-NEXT: fmaxnm s4, s7, s6
+; CHECK-NOFP16-NEXT: mov h6, v1.h[4]
+; CHECK-NOFP16-NEXT: mov h7, v0.h[4]
+; CHECK-NOFP16-NEXT: fcvt h3, s3
+; CHECK-NOFP16-NEXT: fmaxnm s5, s5, s16
+; CHECK-NOFP16-NEXT: mov h16, v0.h[5]
+; CHECK-NOFP16-NEXT: fcvt h4, s4
+; CHECK-NOFP16-NEXT: mov v2.h[1], v3.h[0]
+; CHECK-NOFP16-NEXT: fcvt s3, h6
+; CHECK-NOFP16-NEXT: fcvt s6, h7
+; CHECK-NOFP16-NEXT: mov h7, v1.h[5]
+; CHECK-NOFP16-NEXT: fcvt h5, s5
+; CHECK-NOFP16-NEXT: fcvt s16, h16
+; CHECK-NOFP16-NEXT: mov v2.h[2], v4.h[0]
+; CHECK-NOFP16-NEXT: mov h4, v1.h[6]
+; CHECK-NOFP16-NEXT: fmaxnm s3, s6, s3
+; CHECK-NOFP16-NEXT: mov h6, v0.h[6]
+; CHECK-NOFP16-NEXT: fcvt s7, h7
+; CHECK-NOFP16-NEXT: mov h1, v1.h[7]
+; CHECK-NOFP16-NEXT: mov h0, v0.h[7]
+; CHECK-NOFP16-NEXT: mov v2.h[3], v5.h[0]
+; CHECK-NOFP16-NEXT: fcvt s4, h4
+; CHECK-NOFP16-NEXT: fcvt h3, s3
+; CHECK-NOFP16-NEXT: fcvt s5, h6
+; CHECK-NOFP16-NEXT: fmaxnm s6, s16, s7
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fcvt s0, h0
+; CHECK-NOFP16-NEXT: mov v2.h[4], v3.h[0]
+; CHECK-NOFP16-NEXT: fmaxnm s4, s5, s4
+; CHECK-NOFP16-NEXT: fcvt h3, s6
+; CHECK-NOFP16-NEXT: fmaxnm s0, s0, s1
+; CHECK-NOFP16-NEXT: mov v2.h[5], v3.h[0]
+; CHECK-NOFP16-NEXT: fcvt h3, s4
+; CHECK-NOFP16-NEXT: fcvt h0, s0
+; CHECK-NOFP16-NEXT: mov v2.h[6], v3.h[0]
+; CHECK-NOFP16-NEXT: mov v2.h[7], v0.h[0]
+; CHECK-NOFP16-NEXT: mov v0.16b, v2.16b
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: max_v8f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: mov h2, v1.h[1]
-; NOFULLFP16-NEXT: mov h3, v0.h[1]
-; NOFULLFP16-NEXT: fcvt s4, h1
-; NOFULLFP16-NEXT: fcvt s5, h0
-; NOFULLFP16-NEXT: mov h6, v1.h[2]
-; NOFULLFP16-NEXT: mov h7, v0.h[2]
-; NOFULLFP16-NEXT: mov h16, v1.h[3]
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fmaxnm s4, s5, s4
-; NOFULLFP16-NEXT: mov h5, v0.h[3]
-; NOFULLFP16-NEXT: fcvt s6, h6
-; NOFULLFP16-NEXT: fcvt s7, h7
-; NOFULLFP16-NEXT: fcvt s16, h16
-; NOFULLFP16-NEXT: fmaxnm s3, s3, s2
-; NOFULLFP16-NEXT: fcvt s5, h5
-; NOFULLFP16-NEXT: fcvt h2, s4
-; NOFULLFP16-NEXT: fmaxnm s4, s7, s6
-; NOFULLFP16-NEXT: mov h6, v1.h[4]
-; NOFULLFP16-NEXT: mov h7, v0.h[4]
-; NOFULLFP16-NEXT: fcvt h3, s3
-; NOFULLFP16-NEXT: fmaxnm s5, s5, s16
-; NOFULLFP16-NEXT: mov h16, v0.h[5]
-; NOFULLFP16-NEXT: fcvt h4, s4
-; NOFULLFP16-NEXT: mov v2.h[1], v3.h[0]
-; NOFULLFP16-NEXT: fcvt s3, h6
-; NOFULLFP16-NEXT: fcvt s6, h7
-; NOFULLFP16-NEXT: mov h7, v1.h[5]
-; NOFULLFP16-NEXT: fcvt h5, s5
-; NOFULLFP16-NEXT: fcvt s16, h16
-; NOFULLFP16-NEXT: mov v2.h[2], v4.h[0]
-; NOFULLFP16-NEXT: mov h4, v1.h[6]
-; NOFULLFP16-NEXT: fmaxnm s3, s6, s3
-; NOFULLFP16-NEXT: mov h6, v0.h[6]
-; NOFULLFP16-NEXT: fcvt s7, h7
-; NOFULLFP16-NEXT: mov h1, v1.h[7]
-; NOFULLFP16-NEXT: mov h0, v0.h[7]
-; NOFULLFP16-NEXT: mov v2.h[3], v5.h[0]
-; NOFULLFP16-NEXT: fcvt s4, h4
-; NOFULLFP16-NEXT: fcvt h3, s3
-; NOFULLFP16-NEXT: fcvt s5, h6
-; NOFULLFP16-NEXT: fmaxnm s6, s16, s7
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fcvt s0, h0
-; NOFULLFP16-NEXT: mov v2.h[4], v3.h[0]
-; NOFULLFP16-NEXT: fmaxnm s4, s5, s4
-; NOFULLFP16-NEXT: fcvt h3, s6
-; NOFULLFP16-NEXT: fmaxnm s0, s0, s1
-; NOFULLFP16-NEXT: mov v2.h[5], v3.h[0]
-; NOFULLFP16-NEXT: fcvt h3, s4
-; NOFULLFP16-NEXT: fcvt h0, s0
-; NOFULLFP16-NEXT: mov v2.h[6], v3.h[0]
-; NOFULLFP16-NEXT: mov v2.h[7], v0.h[0]
-; NOFULLFP16-NEXT: mov v0.16b, v2.16b
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: max_v8f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
+; CHECK-FP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
+; CHECK-FP16-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
+; CHECK-FP16-NEXT: ret
entry:
%c = call <8 x half> @llvm.maximumnum.v8f16(<8 x half> %a, <8 x half> %b)
ret <8 x half> %c
}
define <9 x half> @max_v9f16(<9 x half> %a, <9 x half> %b) {
-; FULLFP16-LABEL: max_v9f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: // kill: def $h0 killed $h0 def $q0
-; FULLFP16-NEXT: // kill: def $h1 killed $h1 def $q1
-; FULLFP16-NEXT: // kill: def $h2 killed $h2 def $q2
-; FULLFP16-NEXT: add x9, sp, #16
-; FULLFP16-NEXT: // kill: def $h3 killed $h3 def $q3
-; FULLFP16-NEXT: // kill: def $h4 killed $h4 def $q4
-; FULLFP16-NEXT: add x10, sp, #40
-; FULLFP16-NEXT: // kill: def $h5 killed $h5 def $q5
-; FULLFP16-NEXT: // kill: def $h6 killed $h6 def $q6
-; FULLFP16-NEXT: // kill: def $h7 killed $h7 def $q7
-; FULLFP16-NEXT: mov v0.h[1], v1.h[0]
-; FULLFP16-NEXT: ldr h1, [sp, #8]
-; FULLFP16-NEXT: ld1 { v1.h }[1], [x9]
-; FULLFP16-NEXT: add x9, sp, #24
-; FULLFP16-NEXT: mov v0.h[2], v2.h[0]
-; FULLFP16-NEXT: ld1 { v1.h }[2], [x9]
-; FULLFP16-NEXT: add x9, sp, #32
-; FULLFP16-NEXT: mov v0.h[3], v3.h[0]
-; FULLFP16-NEXT: ld1 { v1.h }[3], [x9]
-; FULLFP16-NEXT: ldr h2, [x10]
-; FULLFP16-NEXT: add x9, sp, #48
-; FULLFP16-NEXT: ldr h3, [sp, #72]
-; FULLFP16-NEXT: ld1 { v2.h }[1], [x9]
-; FULLFP16-NEXT: add x9, sp, #56
-; FULLFP16-NEXT: fminnm v3.8h, v3.8h, v3.8h
-; FULLFP16-NEXT: mov v0.h[4], v4.h[0]
-; FULLFP16-NEXT: ld1 { v2.h }[2], [x9]
-; FULLFP16-NEXT: add x9, sp, #64
-; FULLFP16-NEXT: mov v0.h[5], v5.h[0]
-; FULLFP16-NEXT: ld1 { v2.h }[3], [x9]
-; FULLFP16-NEXT: zip1 v1.2d, v1.2d, v2.2d
-; FULLFP16-NEXT: ldr h2, [sp]
-; FULLFP16-NEXT: mov v0.h[6], v6.h[0]
-; FULLFP16-NEXT: fminnm v2.8h, v2.8h, v2.8h
-; FULLFP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
-; FULLFP16-NEXT: mov v0.h[7], v7.h[0]
-; FULLFP16-NEXT: fmaxnm v2.8h, v2.8h, v3.8h
-; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
-; FULLFP16-NEXT: str h2, [x8, #16]
-; FULLFP16-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
-; FULLFP16-NEXT: str q0, [x8]
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: max_v9f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: ldr h16, [sp, #16]
+; CHECK-NOFP16-NEXT: ldr h17, [sp, #8]
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fcvt s0, h0
+; CHECK-NOFP16-NEXT: ldr h18, [sp, #24]
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s16, h16
+; CHECK-NOFP16-NEXT: fcvt s17, h17
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fcvt s18, h18
+; CHECK-NOFP16-NEXT: fcvt s4, h4
+; CHECK-NOFP16-NEXT: fcvt s5, h5
+; CHECK-NOFP16-NEXT: fmaxnm s1, s1, s16
+; CHECK-NOFP16-NEXT: fmaxnm s0, s0, s17
+; CHECK-NOFP16-NEXT: ldr h16, [sp, #32]
+; CHECK-NOFP16-NEXT: fmaxnm s2, s2, s18
+; CHECK-NOFP16-NEXT: ldr h17, [sp, #40]
+; CHECK-NOFP16-NEXT: fcvt s16, h16
+; CHECK-NOFP16-NEXT: fcvt s17, h17
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: fcvt h0, s0
+; CHECK-NOFP16-NEXT: fcvt h2, s2
+; CHECK-NOFP16-NEXT: fmaxnm s3, s3, s16
+; CHECK-NOFP16-NEXT: fmaxnm s4, s4, s17
+; CHECK-NOFP16-NEXT: mov v0.h[1], v1.h[0]
+; CHECK-NOFP16-NEXT: ldr h1, [sp, #48]
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fcvt h3, s3
+; CHECK-NOFP16-NEXT: fcvt h4, s4
+; CHECK-NOFP16-NEXT: mov v0.h[2], v2.h[0]
+; CHECK-NOFP16-NEXT: ldr h2, [sp, #56]
+; CHECK-NOFP16-NEXT: fmaxnm s1, s5, s1
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: ldr h5, [sp, #64]
+; CHECK-NOFP16-NEXT: mov v0.h[3], v3.h[0]
+; CHECK-NOFP16-NEXT: fcvt s3, h6
+; CHECK-NOFP16-NEXT: ldr h6, [sp, #72]
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: fcvt s6, h6
+; CHECK-NOFP16-NEXT: mov v0.h[4], v4.h[0]
+; CHECK-NOFP16-NEXT: fmaxnm s2, s3, s2
+; CHECK-NOFP16-NEXT: fcvt s3, h5
+; CHECK-NOFP16-NEXT: fcvt s4, h7
+; CHECK-NOFP16-NEXT: ldr h5, [sp]
+; CHECK-NOFP16-NEXT: fcvt s5, h5
+; CHECK-NOFP16-NEXT: mov v0.h[5], v1.h[0]
+; CHECK-NOFP16-NEXT: fcvt h1, s2
+; CHECK-NOFP16-NEXT: fmaxnm s2, s4, s3
+; CHECK-NOFP16-NEXT: fmaxnm s3, s5, s6
+; CHECK-NOFP16-NEXT: mov v0.h[6], v1.h[0]
+; CHECK-NOFP16-NEXT: fcvt h1, s2
+; CHECK-NOFP16-NEXT: fcvt h2, s3
+; CHECK-NOFP16-NEXT: mov v0.h[7], v1.h[0]
+; CHECK-NOFP16-NEXT: str h2, [x8, #16]
+; CHECK-NOFP16-NEXT: str q0, [x8]
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: max_v9f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: ldr h16, [sp, #16]
-; NOFULLFP16-NEXT: ldr h17, [sp, #8]
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fcvt s0, h0
-; NOFULLFP16-NEXT: ldr h18, [sp, #24]
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s16, h16
-; NOFULLFP16-NEXT: fcvt s17, h17
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fcvt s18, h18
-; NOFULLFP16-NEXT: fcvt s4, h4
-; NOFULLFP16-NEXT: fcvt s5, h5
-; NOFULLFP16-NEXT: fmaxnm s1, s1, s16
-; NOFULLFP16-NEXT: fmaxnm s0, s0, s17
-; NOFULLFP16-NEXT: ldr h16, [sp, #32]
-; NOFULLFP16-NEXT: fmaxnm s2, s2, s18
-; NOFULLFP16-NEXT: ldr h17, [sp, #40]
-; NOFULLFP16-NEXT: fcvt s16, h16
-; NOFULLFP16-NEXT: fcvt s17, h17
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: fcvt h0, s0
-; NOFULLFP16-NEXT: fcvt h2, s2
-; NOFULLFP16-NEXT: fmaxnm s3, s3, s16
-; NOFULLFP16-NEXT: fmaxnm s4, s4, s17
-; NOFULLFP16-NEXT: mov v0.h[1], v1.h[0]
-; NOFULLFP16-NEXT: ldr h1, [sp, #48]
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fcvt h3, s3
-; NOFULLFP16-NEXT: fcvt h4, s4
-; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
-; NOFULLFP16-NEXT: ldr h2, [sp, #56]
-; NOFULLFP16-NEXT: fmaxnm s1, s5, s1
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: ldr h5, [sp, #64]
-; NOFULLFP16-NEXT: mov v0.h[3], v3.h[0]
-; NOFULLFP16-NEXT: fcvt s3, h6
-; NOFULLFP16-NEXT: ldr h6, [sp, #72]
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: fcvt s6, h6
-; NOFULLFP16-NEXT: mov v0.h[4], v4.h[0]
-; NOFULLFP16-NEXT: fmaxnm s2, s3, s2
-; NOFULLFP16-NEXT: fcvt s3, h5
-; NOFULLFP16-NEXT: fcvt s4, h7
-; NOFULLFP16-NEXT: ldr h5, [sp]
-; NOFULLFP16-NEXT: fcvt s5, h5
-; NOFULLFP16-NEXT: mov v0.h[5], v1.h[0]
-; NOFULLFP16-NEXT: fcvt h1, s2
-; NOFULLFP16-NEXT: fmaxnm s2, s4, s3
-; NOFULLFP16-NEXT: fmaxnm s3, s5, s6
-; NOFULLFP16-NEXT: mov v0.h[6], v1.h[0]
-; NOFULLFP16-NEXT: fcvt h1, s2
-; NOFULLFP16-NEXT: fcvt h2, s3
-; NOFULLFP16-NEXT: mov v0.h[7], v1.h[0]
-; NOFULLFP16-NEXT: str h2, [x8, #16]
-; NOFULLFP16-NEXT: str q0, [x8]
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: max_v9f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: // kill: def $h0 killed $h0 def $q0
+; CHECK-FP16-NEXT: // kill: def $h1 killed $h1 def $q1
+; CHECK-FP16-NEXT: // kill: def $h2 killed $h2 def $q2
+; CHECK-FP16-NEXT: add x9, sp, #16
+; CHECK-FP16-NEXT: // kill: def $h3 killed $h3 def $q3
+; CHECK-FP16-NEXT: // kill: def $h4 killed $h4 def $q4
+; CHECK-FP16-NEXT: add x10, sp, #40
+; CHECK-FP16-NEXT: // kill: def $h5 killed $h5 def $q5
+; CHECK-FP16-NEXT: // kill: def $h6 killed $h6 def $q6
+; CHECK-FP16-NEXT: // kill: def $h7 killed $h7 def $q7
+; CHECK-FP16-NEXT: mov v0.h[1], v1.h[0]
+; CHECK-FP16-NEXT: ldr h1, [sp, #8]
+; CHECK-FP16-NEXT: ld1 { v1.h }[1], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #24
+; CHECK-FP16-NEXT: mov v0.h[2], v2.h[0]
+; CHECK-FP16-NEXT: ld1 { v1.h }[2], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #32
+; CHECK-FP16-NEXT: mov v0.h[3], v3.h[0]
+; CHECK-FP16-NEXT: ld1 { v1.h }[3], [x9]
+; CHECK-FP16-NEXT: ldr h2, [x10]
+; CHECK-FP16-NEXT: add x9, sp, #48
+; CHECK-FP16-NEXT: ldr h3, [sp, #72]
+; CHECK-FP16-NEXT: ld1 { v2.h }[1], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #56
+; CHECK-FP16-NEXT: fminnm v3.8h, v3.8h, v3.8h
+; CHECK-FP16-NEXT: mov v0.h[4], v4.h[0]
+; CHECK-FP16-NEXT: ld1 { v2.h }[2], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #64
+; CHECK-FP16-NEXT: mov v0.h[5], v5.h[0]
+; CHECK-FP16-NEXT: ld1 { v2.h }[3], [x9]
+; CHECK-FP16-NEXT: zip1 v1.2d, v1.2d, v2.2d
+; CHECK-FP16-NEXT: ldr h2, [sp]
+; CHECK-FP16-NEXT: mov v0.h[6], v6.h[0]
+; CHECK-FP16-NEXT: fminnm v2.8h, v2.8h, v2.8h
+; CHECK-FP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
+; CHECK-FP16-NEXT: mov v0.h[7], v7.h[0]
+; CHECK-FP16-NEXT: fmaxnm v2.8h, v2.8h, v3.8h
+; CHECK-FP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
+; CHECK-FP16-NEXT: str h2, [x8, #16]
+; CHECK-FP16-NEXT: fmaxnm v0.8h, v0.8h, v1.8h
+; CHECK-FP16-NEXT: str q0, [x8]
+; CHECK-FP16-NEXT: ret
entry:
%c = call <9 x half> @llvm.maximumnum.v9f16(<9 x half> %a, <9 x half> %b)
ret <9 x half> %c
}
define <16 x half> @max_v16f16(<16 x half> %a, <16 x half> %b) {
-; FULLFP16-LABEL: max_v16f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fminnm v2.8h, v2.8h, v2.8h
-; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
-; FULLFP16-NEXT: fminnm v3.8h, v3.8h, v3.8h
-; FULLFP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
-; FULLFP16-NEXT: fmaxnm v0.8h, v0.8h, v2.8h
-; FULLFP16-NEXT: fmaxnm v1.8h, v1.8h, v3.8h
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: max_v16f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: mov h6, v2.h[1]
+; CHECK-NOFP16-NEXT: mov h7, v0.h[1]
+; CHECK-NOFP16-NEXT: fcvt s4, h2
+; CHECK-NOFP16-NEXT: fcvt s5, h0
+; CHECK-NOFP16-NEXT: mov h16, v3.h[1]
+; CHECK-NOFP16-NEXT: mov h17, v1.h[1]
+; CHECK-NOFP16-NEXT: mov h18, v2.h[2]
+; CHECK-NOFP16-NEXT: mov h19, v0.h[2]
+; CHECK-NOFP16-NEXT: fcvt s20, h3
+; CHECK-NOFP16-NEXT: fcvt s21, h1
+; CHECK-NOFP16-NEXT: mov h22, v3.h[2]
+; CHECK-NOFP16-NEXT: mov h23, v1.h[2]
+; CHECK-NOFP16-NEXT: fcvt s6, h6
+; CHECK-NOFP16-NEXT: fcvt s7, h7
+; CHECK-NOFP16-NEXT: mov h24, v0.h[6]
+; CHECK-NOFP16-NEXT: fmaxnm s4, s5, s4
+; CHECK-NOFP16-NEXT: fcvt s5, h16
+; CHECK-NOFP16-NEXT: fcvt s16, h17
+; CHECK-NOFP16-NEXT: fcvt s17, h18
+; CHECK-NOFP16-NEXT: fcvt s18, h19
+; CHECK-NOFP16-NEXT: mov h19, v0.h[3]
+; CHECK-NOFP16-NEXT: fmaxnm s20, s21, s20
+; CHECK-NOFP16-NEXT: fcvt s21, h22
+; CHECK-NOFP16-NEXT: mov h22, v3.h[3]
+; CHECK-NOFP16-NEXT: fmaxnm s6, s7, s6
+; CHECK-NOFP16-NEXT: mov h7, v2.h[3]
+; CHECK-NOFP16-NEXT: mov h25, v1.h[6]
+; CHECK-NOFP16-NEXT: fcvt h4, s4
+; CHECK-NOFP16-NEXT: fmaxnm s5, s16, s5
+; CHECK-NOFP16-NEXT: fcvt s16, h23
+; CHECK-NOFP16-NEXT: mov h23, v1.h[3]
+; CHECK-NOFP16-NEXT: fmaxnm s17, s18, s17
+; CHECK-NOFP16-NEXT: fcvt s18, h19
+; CHECK-NOFP16-NEXT: fcvt h6, s6
+; CHECK-NOFP16-NEXT: fcvt s7, h7
+; CHECK-NOFP16-NEXT: fcvt h19, s5
+; CHECK-NOFP16-NEXT: fcvt h5, s20
+; CHECK-NOFP16-NEXT: fmaxnm s16, s16, s21
+; CHECK-NOFP16-NEXT: fcvt s20, h23
+; CHECK-NOFP16-NEXT: fcvt h17, s17
+; CHECK-NOFP16-NEXT: mov h21, v2.h[4]
+; CHECK-NOFP16-NEXT: mov h23, v1.h[4]
+; CHECK-NOFP16-NEXT: mov v4.h[1], v6.h[0]
+; CHECK-NOFP16-NEXT: fcvt s6, h22
+; CHECK-NOFP16-NEXT: mov h22, v0.h[4]
+; CHECK-NOFP16-NEXT: fmaxnm s7, s18, s7
+; CHECK-NOFP16-NEXT: mov h18, v3.h[4]
+; CHECK-NOFP16-NEXT: mov v5.h[1], v19.h[0]
+; CHECK-NOFP16-NEXT: fcvt h16, s16
+; CHECK-NOFP16-NEXT: fmaxnm s6, s20, s6
+; CHECK-NOFP16-NEXT: mov v4.h[2], v17.h[0]
+; CHECK-NOFP16-NEXT: fcvt s17, h21
+; CHECK-NOFP16-NEXT: fcvt s19, h22
+; CHECK-NOFP16-NEXT: fcvt h7, s7
+; CHECK-NOFP16-NEXT: fcvt s18, h18
+; CHECK-NOFP16-NEXT: fcvt s20, h23
+; CHECK-NOFP16-NEXT: mov h21, v2.h[5]
+; CHECK-NOFP16-NEXT: mov h22, v0.h[5]
+; CHECK-NOFP16-NEXT: mov v5.h[2], v16.h[0]
+; CHECK-NOFP16-NEXT: mov h16, v3.h[5]
+; CHECK-NOFP16-NEXT: mov h23, v1.h[5]
+; CHECK-NOFP16-NEXT: fcvt h6, s6
+; CHECK-NOFP16-NEXT: mov h0, v0.h[7]
+; CHECK-NOFP16-NEXT: mov h1, v1.h[7]
+; CHECK-NOFP16-NEXT: fmaxnm s17, s19, s17
+; CHECK-NOFP16-NEXT: mov h19, v2.h[6]
+; CHECK-NOFP16-NEXT: mov v4.h[3], v7.h[0]
+; CHECK-NOFP16-NEXT: fmaxnm s18, s20, s18
+; CHECK-NOFP16-NEXT: mov h20, v3.h[6]
+; CHECK-NOFP16-NEXT: fcvt s7, h21
+; CHECK-NOFP16-NEXT: fcvt s21, h22
+; CHECK-NOFP16-NEXT: fcvt s22, h24
+; CHECK-NOFP16-NEXT: mov h2, v2.h[7]
+; CHECK-NOFP16-NEXT: mov v5.h[3], v6.h[0]
+; CHECK-NOFP16-NEXT: fcvt s6, h16
+; CHECK-NOFP16-NEXT: fcvt s16, h23
+; CHECK-NOFP16-NEXT: fcvt h17, s17
+; CHECK-NOFP16-NEXT: fcvt s19, h19
+; CHECK-NOFP16-NEXT: fcvt s23, h25
+; CHECK-NOFP16-NEXT: fcvt h18, s18
+; CHECK-NOFP16-NEXT: fcvt s20, h20
+; CHECK-NOFP16-NEXT: mov h3, v3.h[7]
+; CHECK-NOFP16-NEXT: fmaxnm s7, s21, s7
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s0, h0
+; CHECK-NOFP16-NEXT: fmaxnm s6, s16, s6
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: mov v4.h[4], v17.h[0]
+; CHECK-NOFP16-NEXT: fmaxnm s16, s22, s19
+; CHECK-NOFP16-NEXT: mov v5.h[4], v18.h[0]
+; CHECK-NOFP16-NEXT: fmaxnm s17, s23, s20
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fcvt h7, s7
+; CHECK-NOFP16-NEXT: fmaxnm s0, s0, s2
+; CHECK-NOFP16-NEXT: fcvt h6, s6
+; CHECK-NOFP16-NEXT: fcvt h2, s16
+; CHECK-NOFP16-NEXT: fmaxnm s1, s1, s3
+; CHECK-NOFP16-NEXT: mov v4.h[5], v7.h[0]
+; CHECK-NOFP16-NEXT: fcvt h0, s0
+; CHECK-NOFP16-NEXT: mov v5.h[5], v6.h[0]
+; CHECK-NOFP16-NEXT: fcvt h6, s17
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: mov v4.h[6], v2.h[0]
+; CHECK-NOFP16-NEXT: mov v5.h[6], v6.h[0]
+; CHECK-NOFP16-NEXT: mov v4.h[7], v0.h[0]
+; CHECK-NOFP16-NEXT: mov v5.h[7], v1.h[0]
+; CHECK-NOFP16-NEXT: mov v0.16b, v4.16b
+; CHECK-NOFP16-NEXT: mov v1.16b, v5.16b
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: max_v16f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: mov h6, v2.h[1]
-; NOFULLFP16-NEXT: mov h7, v0.h[1]
-; NOFULLFP16-NEXT: fcvt s4, h2
-; NOFULLFP16-NEXT: fcvt s5, h0
-; NOFULLFP16-NEXT: mov h16, v3.h[1]
-; NOFULLFP16-NEXT: mov h17, v1.h[1]
-; NOFULLFP16-NEXT: mov h18, v2.h[2]
-; NOFULLFP16-NEXT: mov h19, v0.h[2]
-; NOFULLFP16-NEXT: fcvt s20, h3
-; NOFULLFP16-NEXT: fcvt s21, h1
-; NOFULLFP16-NEXT: mov h22, v3.h[2]
-; NOFULLFP16-NEXT: mov h23, v1.h[2]
-; NOFULLFP16-NEXT: fcvt s6, h6
-; NOFULLFP16-NEXT: fcvt s7, h7
-; NOFULLFP16-NEXT: mov h24, v0.h[6]
-; NOFULLFP16-NEXT: fmaxnm s4, s5, s4
-; NOFULLFP16-NEXT: fcvt s5, h16
-; NOFULLFP16-NEXT: fcvt s16, h17
-; NOFULLFP16-NEXT: fcvt s17, h18
-; NOFULLFP16-NEXT: fcvt s18, h19
-; NOFULLFP16-NEXT: mov h19, v0.h[3]
-; NOFULLFP16-NEXT: fmaxnm s20, s21, s20
-; NOFULLFP16-NEXT: fcvt s21, h22
-; NOFULLFP16-NEXT: mov h22, v3.h[3]
-; NOFULLFP16-NEXT: fmaxnm s6, s7, s6
-; NOFULLFP16-NEXT: mov h7, v2.h[3]
-; NOFULLFP16-NEXT: mov h25, v1.h[6]
-; NOFULLFP16-NEXT: fcvt h4, s4
-; NOFULLFP16-NEXT: fmaxnm s5, s16, s5
-; NOFULLFP16-NEXT: fcvt s16, h23
-; NOFULLFP16-NEXT: mov h23, v1.h[3]
-; NOFULLFP16-NEXT: fmaxnm s17, s18, s17
-; NOFULLFP16-NEXT: fcvt s18, h19
-; NOFULLFP16-NEXT: fcvt h6, s6
-; NOFULLFP16-NEXT: fcvt s7, h7
-; NOFULLFP16-NEXT: fcvt h19, s5
-; NOFULLFP16-NEXT: fcvt h5, s20
-; NOFULLFP16-NEXT: fmaxnm s16, s16, s21
-; NOFULLFP16-NEXT: fcvt s20, h23
-; NOFULLFP16-NEXT: fcvt h17, s17
-; NOFULLFP16-NEXT: mov h21, v2.h[4]
-; NOFULLFP16-NEXT: mov h23, v1.h[4]
-; NOFULLFP16-NEXT: mov v4.h[1], v6.h[0]
-; NOFULLFP16-NEXT: fcvt s6, h22
-; NOFULLFP16-NEXT: mov h22, v0.h[4]
-; NOFULLFP16-NEXT: fmaxnm s7, s18, s7
-; NOFULLFP16-NEXT: mov h18, v3.h[4]
-; NOFULLFP16-NEXT: mov v5.h[1], v19.h[0]
-; NOFULLFP16-NEXT: fcvt h16, s16
-; NOFULLFP16-NEXT: fmaxnm s6, s20, s6
-; NOFULLFP16-NEXT: mov v4.h[2], v17.h[0]
-; NOFULLFP16-NEXT: fcvt s17, h21
-; NOFULLFP16-NEXT: fcvt s19, h22
-; NOFULLFP16-NEXT: fcvt h7, s7
-; NOFULLFP16-NEXT: fcvt s18, h18
-; NOFULLFP16-NEXT: fcvt s20, h23
-; NOFULLFP16-NEXT: mov h21, v2.h[5]
-; NOFULLFP16-NEXT: mov h22, v0.h[5]
-; NOFULLFP16-NEXT: mov v5.h[2], v16.h[0]
-; NOFULLFP16-NEXT: mov h16, v3.h[5]
-; NOFULLFP16-NEXT: mov h23, v1.h[5]
-; NOFULLFP16-NEXT: fcvt h6, s6
-; NOFULLFP16-NEXT: mov h0, v0.h[7]
-; NOFULLFP16-NEXT: mov h1, v1.h[7]
-; NOFULLFP16-NEXT: fmaxnm s17, s19, s17
-; NOFULLFP16-NEXT: mov h19, v2.h[6]
-; NOFULLFP16-NEXT: mov v4.h[3], v7.h[0]
-; NOFULLFP16-NEXT: fmaxnm s18, s20, s18
-; NOFULLFP16-NEXT: mov h20, v3.h[6]
-; NOFULLFP16-NEXT: fcvt s7, h21
-; NOFULLFP16-NEXT: fcvt s21, h22
-; NOFULLFP16-NEXT: fcvt s22, h24
-; NOFULLFP16-NEXT: mov h2, v2.h[7]
-; NOFULLFP16-NEXT: mov v5.h[3], v6.h[0]
-; NOFULLFP16-NEXT: fcvt s6, h16
-; NOFULLFP16-NEXT: fcvt s16, h23
-; NOFULLFP16-NEXT: fcvt h17, s17
-; NOFULLFP16-NEXT: fcvt s19, h19
-; NOFULLFP16-NEXT: fcvt s23, h25
-; NOFULLFP16-NEXT: fcvt h18, s18
-; NOFULLFP16-NEXT: fcvt s20, h20
-; NOFULLFP16-NEXT: mov h3, v3.h[7]
-; NOFULLFP16-NEXT: fmaxnm s7, s21, s7
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s0, h0
-; NOFULLFP16-NEXT: fmaxnm s6, s16, s6
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: mov v4.h[4], v17.h[0]
-; NOFULLFP16-NEXT: fmaxnm s16, s22, s19
-; NOFULLFP16-NEXT: mov v5.h[4], v18.h[0]
-; NOFULLFP16-NEXT: fmaxnm s17, s23, s20
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fcvt h7, s7
-; NOFULLFP16-NEXT: fmaxnm s0, s0, s2
-; NOFULLFP16-NEXT: fcvt h6, s6
-; NOFULLFP16-NEXT: fcvt h2, s16
-; NOFULLFP16-NEXT: fmaxnm s1, s1, s3
-; NOFULLFP16-NEXT: mov v4.h[5], v7.h[0]
-; NOFULLFP16-NEXT: fcvt h0, s0
-; NOFULLFP16-NEXT: mov v5.h[5], v6.h[0]
-; NOFULLFP16-NEXT: fcvt h6, s17
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: mov v4.h[6], v2.h[0]
-; NOFULLFP16-NEXT: mov v5.h[6], v6.h[0]
-; NOFULLFP16-NEXT: mov v4.h[7], v0.h[0]
-; NOFULLFP16-NEXT: mov v5.h[7], v1.h[0]
-; NOFULLFP16-NEXT: mov v0.16b, v4.16b
-; NOFULLFP16-NEXT: mov v1.16b, v5.16b
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: max_v16f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fminnm v2.8h, v2.8h, v2.8h
+; CHECK-FP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
+; CHECK-FP16-NEXT: fminnm v3.8h, v3.8h, v3.8h
+; CHECK-FP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
+; CHECK-FP16-NEXT: fmaxnm v0.8h, v0.8h, v2.8h
+; CHECK-FP16-NEXT: fmaxnm v1.8h, v1.8h, v3.8h
+; CHECK-FP16-NEXT: ret
entry:
%c = call <16 x half> @llvm.maximumnum.v16f16(<16 x half> %a, <16 x half> %b)
ret <16 x half> %c
@@ -1722,61 +1858,61 @@ entry:
;;;;;;;;;;;;;;;; min_f128
define fp128 @min_fp128(fp128 %x, fp128 %y) {
-; AARCH64-LABEL: min_fp128:
-; AARCH64: // %bb.0: // %start
-; AARCH64-NEXT: sub sp, sp, #48
-; AARCH64-NEXT: str x30, [sp, #32] // 8-byte Spill
-; AARCH64-NEXT: .cfi_def_cfa_offset 48
-; AARCH64-NEXT: .cfi_offset w30, -16
-; AARCH64-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
-; AARCH64-NEXT: mov v1.16b, v0.16b
-; AARCH64-NEXT: bl __unordtf2
-; AARCH64-NEXT: ldr q0, [sp, #16] // 16-byte Reload
-; AARCH64-NEXT: cmp w0, #0
-; AARCH64-NEXT: b.eq .LBB49_2
-; AARCH64-NEXT: // %bb.1: // %start
-; AARCH64-NEXT: str q0, [sp] // 16-byte Spill
-; AARCH64-NEXT: .LBB49_2: // %start
-; AARCH64-NEXT: mov v1.16b, v0.16b
-; AARCH64-NEXT: bl __unordtf2
-; AARCH64-NEXT: ldp q0, q1, [sp] // 32-byte Folded Reload
-; AARCH64-NEXT: cmp w0, #0
-; AARCH64-NEXT: b.eq .LBB49_4
-; AARCH64-NEXT: // %bb.3: // %start
-; AARCH64-NEXT: mov v1.16b, v0.16b
-; AARCH64-NEXT: .LBB49_4: // %start
-; AARCH64-NEXT: ldr q0, [sp] // 16-byte Reload
-; AARCH64-NEXT: str q1, [sp, #16] // 16-byte Spill
-; AARCH64-NEXT: bl __gttf2
-; AARCH64-NEXT: ldr q0, [sp] // 16-byte Reload
-; AARCH64-NEXT: cmp w0, #0
-; AARCH64-NEXT: b.le .LBB49_6
-; AARCH64-NEXT: // %bb.5: // %start
-; AARCH64-NEXT: str q0, [sp, #16] // 16-byte Spill
-; AARCH64-NEXT: .LBB49_6: // %start
-; AARCH64-NEXT: str q0, [sp] // 16-byte Spill
-; AARCH64-NEXT: bl __trunctfsf2
-; AARCH64-NEXT: fmov w8, s0
-; AARCH64-NEXT: ldr q0, [sp, #16] // 16-byte Reload
-; AARCH64-NEXT: mov v1.16b, v0.16b
-; AARCH64-NEXT: cmp w8, #0
-; AARCH64-NEXT: b.ne .LBB49_8
-; AARCH64-NEXT: // %bb.7: // %start
-; AARCH64-NEXT: ldr q1, [sp] // 16-byte Reload
-; AARCH64-NEXT: .LBB49_8: // %start
-; AARCH64-NEXT: adrp x8, .LCPI49_0
-; AARCH64-NEXT: str q1, [sp] // 16-byte Spill
-; AARCH64-NEXT: ldr q1, [x8, :lo12:.LCPI49_0]
-; AARCH64-NEXT: bl __eqtf2
-; AARCH64-NEXT: ldr q0, [sp, #16] // 16-byte Reload
-; AARCH64-NEXT: cmp w0, #0
-; AARCH64-NEXT: b.ne .LBB49_10
-; AARCH64-NEXT: // %bb.9: // %start
-; AARCH64-NEXT: ldr q0, [sp] // 16-byte Reload
-; AARCH64-NEXT: .LBB49_10: // %start
-; AARCH64-NEXT: ldr x30, [sp, #32] // 8-byte Reload
-; AARCH64-NEXT: add sp, sp, #48
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_fp128:
+; CHECK: // %bb.0: // %start
+; CHECK-NEXT: sub sp, sp, #48
+; CHECK-NEXT: str x30, [sp, #32] // 8-byte Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 48
+; CHECK-NEXT: .cfi_offset w30, -16
+; CHECK-NEXT: stp q0, q1, [sp] // 32-byte Folded Spill
+; CHECK-NEXT: mov v1.16b, v0.16b
+; CHECK-NEXT: bl __unordtf2
+; CHECK-NEXT: ldr q0, [sp, #16] // 16-byte Reload
+; CHECK-NEXT: cmp w0, #0
+; CHECK-NEXT: b.eq .LBB49_2
+; CHECK-NEXT: // %bb.1: // %start
+; CHECK-NEXT: str q0, [sp] // 16-byte Spill
+; CHECK-NEXT: .LBB49_2: // %start
+; CHECK-NEXT: mov v1.16b, v0.16b
+; CHECK-NEXT: bl __unordtf2
+; CHECK-NEXT: ldp q0, q1, [sp] // 32-byte Folded Reload
+; CHECK-NEXT: cmp w0, #0
+; CHECK-NEXT: b.eq .LBB49_4
+; CHECK-NEXT: // %bb.3: // %start
+; CHECK-NEXT: mov v1.16b, v0.16b
+; CHECK-NEXT: .LBB49_4: // %start
+; CHECK-NEXT: ldr q0, [sp] // 16-byte Reload
+; CHECK-NEXT: str q1, [sp, #16] // 16-byte Spill
+; CHECK-NEXT: bl __gttf2
+; CHECK-NEXT: ldr q0, [sp] // 16-byte Reload
+; CHECK-NEXT: cmp w0, #0
+; CHECK-NEXT: b.le .LBB49_6
+; CHECK-NEXT: // %bb.5: // %start
+; CHECK-NEXT: str q0, [sp, #16] // 16-byte Spill
+; CHECK-NEXT: .LBB49_6: // %start
+; CHECK-NEXT: str q0, [sp] // 16-byte Spill
+; CHECK-NEXT: bl __trunctfsf2
+; CHECK-NEXT: fmov w8, s0
+; CHECK-NEXT: ldr q0, [sp, #16] // 16-byte Reload
+; CHECK-NEXT: mov v1.16b, v0.16b
+; CHECK-NEXT: cmp w8, #0
+; CHECK-NEXT: b.ne .LBB49_8
+; CHECK-NEXT: // %bb.7: // %start
+; CHECK-NEXT: ldr q1, [sp] // 16-byte Reload
+; CHECK-NEXT: .LBB49_8: // %start
+; CHECK-NEXT: adrp x8, .LCPI49_0
+; CHECK-NEXT: str q1, [sp] // 16-byte Spill
+; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI49_0]
+; CHECK-NEXT: bl __eqtf2
+; CHECK-NEXT: ldr q0, [sp, #16] // 16-byte Reload
+; CHECK-NEXT: cmp w0, #0
+; CHECK-NEXT: b.ne .LBB49_10
+; CHECK-NEXT: // %bb.9: // %start
+; CHECK-NEXT: ldr q0, [sp] // 16-byte Reload
+; CHECK-NEXT: .LBB49_10: // %start
+; CHECK-NEXT: ldr x30, [sp, #32] // 8-byte Reload
+; CHECK-NEXT: add sp, sp, #48
+; CHECK-NEXT: ret
start:
%0 = tail call fp128 @llvm.maximumnum.f128(fp128 %x, fp128 %y)
ret fp128 %0
@@ -1784,66 +1920,66 @@ start:
;;;;;;;;;;;;;;;; min_f64
define double @min_f64(double %a, double %b) {
-; AARCH64-LABEL: min_f64:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm d1, d1, d1
-; AARCH64-NEXT: fminnm d0, d0, d0
-; AARCH64-NEXT: fminnm d0, d0, d1
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm d1, d1, d1
+; CHECK-NEXT: fminnm d0, d0, d0
+; CHECK-NEXT: fminnm d0, d0, d1
+; CHECK-NEXT: ret
entry:
%c = call double @llvm.minimumnum.f64(double %a, double %b)
ret double %c
}
define <2 x double> @min_v2f64(<2 x double> %a, <2 x double> %b) {
-; AARCH64-LABEL: min_v2f64:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.2d, v1.2d, v1.2d
-; AARCH64-NEXT: fminnm v0.2d, v0.2d, v0.2d
-; AARCH64-NEXT: fminnm v0.2d, v0.2d, v1.2d
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_v2f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v1.2d, v1.2d, v1.2d
+; CHECK-NEXT: fminnm v0.2d, v0.2d, v0.2d
+; CHECK-NEXT: fminnm v0.2d, v0.2d, v1.2d
+; CHECK-NEXT: ret
entry:
%c = call <2 x double> @llvm.minimumnum.v2f64(<2 x double> %a, <2 x double> %b)
ret <2 x double> %c
}
define <3 x double> @min_v3f64(<3 x double> %a, <3 x double> %b) {
-; AARCH64-LABEL: min_v3f64:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: // kill: def $d3 killed $d3 def $q3
-; AARCH64-NEXT: // kill: def $d0 killed $d0 def $q0
-; AARCH64-NEXT: // kill: def $d4 killed $d4 def $q4
-; AARCH64-NEXT: // kill: def $d1 killed $d1 def $q1
-; AARCH64-NEXT: // kill: def $d2 killed $d2 def $q2
-; AARCH64-NEXT: // kill: def $d5 killed $d5 def $q5
-; AARCH64-NEXT: mov v0.d[1], v1.d[0]
-; AARCH64-NEXT: mov v3.d[1], v4.d[0]
-; AARCH64-NEXT: fminnm v2.2d, v2.2d, v2.2d
-; AARCH64-NEXT: fminnm v1.2d, v3.2d, v3.2d
-; AARCH64-NEXT: fminnm v0.2d, v0.2d, v0.2d
-; AARCH64-NEXT: fminnm v0.2d, v0.2d, v1.2d
-; AARCH64-NEXT: fminnm v1.2d, v5.2d, v5.2d
-; AARCH64-NEXT: fminnm v2.2d, v2.2d, v1.2d
-; AARCH64-NEXT: ext v1.16b, v0.16b, v0.16b, #8
-; AARCH64-NEXT: // kill: def $d0 killed $d0 killed $q0
-; AARCH64-NEXT: // kill: def $d1 killed $d1 killed $q1
-; AARCH64-NEXT: // kill: def $d2 killed $d2 killed $q2
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_v3f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: // kill: def $d3 killed $d3 def $q3
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT: // kill: def $d4 killed $d4 def $q4
+; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
+; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2
+; CHECK-NEXT: // kill: def $d5 killed $d5 def $q5
+; CHECK-NEXT: mov v0.d[1], v1.d[0]
+; CHECK-NEXT: mov v3.d[1], v4.d[0]
+; CHECK-NEXT: fminnm v2.2d, v2.2d, v2.2d
+; CHECK-NEXT: fminnm v1.2d, v3.2d, v3.2d
+; CHECK-NEXT: fminnm v0.2d, v0.2d, v0.2d
+; CHECK-NEXT: fminnm v0.2d, v0.2d, v1.2d
+; CHECK-NEXT: fminnm v1.2d, v5.2d, v5.2d
+; CHECK-NEXT: fminnm v2.2d, v2.2d, v1.2d
+; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8
+; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
+; CHECK-NEXT: // kill: def $d1 killed $d1 killed $q1
+; CHECK-NEXT: // kill: def $d2 killed $d2 killed $q2
+; CHECK-NEXT: ret
entry:
%c = call <3 x double> @llvm.minimumnum.v3f64(<3 x double> %a, <3 x double> %b)
ret <3 x double> %c
}
define <4 x double> @min_v4f64(<4 x double> %a, <4 x double> %b) {
-; AARCH64-LABEL: min_v4f64:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v2.2d, v2.2d, v2.2d
-; AARCH64-NEXT: fminnm v0.2d, v0.2d, v0.2d
-; AARCH64-NEXT: fminnm v3.2d, v3.2d, v3.2d
-; AARCH64-NEXT: fminnm v1.2d, v1.2d, v1.2d
-; AARCH64-NEXT: fminnm v0.2d, v0.2d, v2.2d
-; AARCH64-NEXT: fminnm v1.2d, v1.2d, v3.2d
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_v4f64:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v2.2d, v2.2d, v2.2d
+; CHECK-NEXT: fminnm v0.2d, v0.2d, v0.2d
+; CHECK-NEXT: fminnm v3.2d, v3.2d, v3.2d
+; CHECK-NEXT: fminnm v1.2d, v1.2d, v1.2d
+; CHECK-NEXT: fminnm v0.2d, v0.2d, v2.2d
+; CHECK-NEXT: fminnm v1.2d, v1.2d, v3.2d
+; CHECK-NEXT: ret
entry:
%c = call <4 x double> @llvm.minimumnum.v4f64(<4 x double> %a, <4 x double> %b)
ret <4 x double> %c
@@ -1851,99 +1987,99 @@ entry:
;;;;;;;;;;;;;;;;;; min_f32
define float @min_f32(float %a, float %b) {
-; AARCH64-LABEL: min_f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm s1, s1, s1
-; AARCH64-NEXT: fminnm s0, s0, s0
-; AARCH64-NEXT: fminnm s0, s0, s1
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm s1, s1, s1
+; CHECK-NEXT: fminnm s0, s0, s0
+; CHECK-NEXT: fminnm s0, s0, s1
+; CHECK-NEXT: ret
entry:
%c = call float @llvm.minimumnum.f32(float %a, float %b)
ret float %c
}
define <2 x float> @min_v2f32(<2 x float> %a, <2 x float> %b) {
-; AARCH64-LABEL: min_v2f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.2s, v1.2s, v1.2s
-; AARCH64-NEXT: fminnm v0.2s, v0.2s, v0.2s
-; AARCH64-NEXT: fminnm v0.2s, v0.2s, v1.2s
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_v2f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v1.2s, v1.2s, v1.2s
+; CHECK-NEXT: fminnm v0.2s, v0.2s, v0.2s
+; CHECK-NEXT: fminnm v0.2s, v0.2s, v1.2s
+; CHECK-NEXT: ret
entry:
%c = call <2 x float> @llvm.minimumnum.v2f32(<2 x float> %a, <2 x float> %b)
ret <2 x float> %c
}
define <3 x float> @min_v3f32(<3 x float> %a, <3 x float> %b) {
-; AARCH64-LABEL: min_v3f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.4s, v1.4s, v1.4s
-; AARCH64-NEXT: fminnm v0.4s, v0.4s, v0.4s
-; AARCH64-NEXT: fminnm v0.4s, v0.4s, v1.4s
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_v3f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v1.4s, v1.4s, v1.4s
+; CHECK-NEXT: fminnm v0.4s, v0.4s, v0.4s
+; CHECK-NEXT: fminnm v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: ret
entry:
%c = call <3 x float> @llvm.minimumnum.v3f32(<3 x float> %a, <3 x float> %b)
ret <3 x float> %c
}
define <4 x float> @min_v4f32(<4 x float> %a, <4 x float> %b) {
-; AARCH64-LABEL: min_v4f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v1.4s, v1.4s, v1.4s
-; AARCH64-NEXT: fminnm v0.4s, v0.4s, v0.4s
-; AARCH64-NEXT: fminnm v0.4s, v0.4s, v1.4s
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_v4f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v1.4s, v1.4s, v1.4s
+; CHECK-NEXT: fminnm v0.4s, v0.4s, v0.4s
+; CHECK-NEXT: fminnm v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: ret
entry:
%c = call <4 x float> @llvm.minimumnum.v4f32(<4 x float> %a, <4 x float> %b)
ret <4 x float> %c
}
define <5 x float> @min_v5f32(<5 x float> %a, <5 x float> %b) {
-; AARCH64-LABEL: min_v5f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: // kill: def $s0 killed $s0 def $q0
-; AARCH64-NEXT: // kill: def $s5 killed $s5 def $q5
-; AARCH64-NEXT: // kill: def $s1 killed $s1 def $q1
-; AARCH64-NEXT: // kill: def $s6 killed $s6 def $q6
-; AARCH64-NEXT: // kill: def $s2 killed $s2 def $q2
-; AARCH64-NEXT: // kill: def $s7 killed $s7 def $q7
-; AARCH64-NEXT: // kill: def $s3 killed $s3 def $q3
-; AARCH64-NEXT: mov x8, sp
-; AARCH64-NEXT: // kill: def $s4 killed $s4 def $q4
-; AARCH64-NEXT: mov v0.s[1], v1.s[0]
-; AARCH64-NEXT: mov v5.s[1], v6.s[0]
-; AARCH64-NEXT: mov v0.s[2], v2.s[0]
-; AARCH64-NEXT: mov v5.s[2], v7.s[0]
-; AARCH64-NEXT: ldr s2, [sp, #8]
-; AARCH64-NEXT: fminnm v2.4s, v2.4s, v2.4s
-; AARCH64-NEXT: mov v0.s[3], v3.s[0]
-; AARCH64-NEXT: ld1 { v5.s }[3], [x8]
-; AARCH64-NEXT: fminnm v3.4s, v4.4s, v4.4s
-; AARCH64-NEXT: fminnm v1.4s, v5.4s, v5.4s
-; AARCH64-NEXT: fminnm v0.4s, v0.4s, v0.4s
-; AARCH64-NEXT: fminnm v4.4s, v3.4s, v2.4s
-; AARCH64-NEXT: // kill: def $s4 killed $s4 killed $q4
-; AARCH64-NEXT: fminnm v0.4s, v0.4s, v1.4s
-; AARCH64-NEXT: mov s1, v0.s[1]
-; AARCH64-NEXT: mov s2, v0.s[2]
-; AARCH64-NEXT: mov s3, v0.s[3]
-; AARCH64-NEXT: // kill: def $s0 killed $s0 killed $q0
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_v5f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: // kill: def $s0 killed $s0 def $q0
+; CHECK-NEXT: // kill: def $s5 killed $s5 def $q5
+; CHECK-NEXT: // kill: def $s1 killed $s1 def $q1
+; CHECK-NEXT: // kill: def $s6 killed $s6 def $q6
+; CHECK-NEXT: // kill: def $s2 killed $s2 def $q2
+; CHECK-NEXT: // kill: def $s7 killed $s7 def $q7
+; CHECK-NEXT: // kill: def $s3 killed $s3 def $q3
+; CHECK-NEXT: mov x8, sp
+; CHECK-NEXT: // kill: def $s4 killed $s4 def $q4
+; CHECK-NEXT: mov v0.s[1], v1.s[0]
+; CHECK-NEXT: mov v5.s[1], v6.s[0]
+; CHECK-NEXT: mov v0.s[2], v2.s[0]
+; CHECK-NEXT: mov v5.s[2], v7.s[0]
+; CHECK-NEXT: ldr s2, [sp, #8]
+; CHECK-NEXT: fminnm v2.4s, v2.4s, v2.4s
+; CHECK-NEXT: mov v0.s[3], v3.s[0]
+; CHECK-NEXT: ld1 { v5.s }[3], [x8]
+; CHECK-NEXT: fminnm v3.4s, v4.4s, v4.4s
+; CHECK-NEXT: fminnm v1.4s, v5.4s, v5.4s
+; CHECK-NEXT: fminnm v0.4s, v0.4s, v0.4s
+; CHECK-NEXT: fminnm v4.4s, v3.4s, v2.4s
+; CHECK-NEXT: // kill: def $s4 killed $s4 killed $q4
+; CHECK-NEXT: fminnm v0.4s, v0.4s, v1.4s
+; CHECK-NEXT: mov s1, v0.s[1]
+; CHECK-NEXT: mov s2, v0.s[2]
+; CHECK-NEXT: mov s3, v0.s[3]
+; CHECK-NEXT: // kill: def $s0 killed $s0 killed $q0
+; CHECK-NEXT: ret
entry:
%c = call <5 x float> @llvm.minimumnum.v5f32(<5 x float> %a, <5 x float> %b)
ret <5 x float> %c
}
define <8 x float> @min_v8f32(<8 x float> %a, <8 x float> %b) {
-; AARCH64-LABEL: min_v8f32:
-; AARCH64: // %bb.0: // %entry
-; AARCH64-NEXT: fminnm v2.4s, v2.4s, v2.4s
-; AARCH64-NEXT: fminnm v0.4s, v0.4s, v0.4s
-; AARCH64-NEXT: fminnm v3.4s, v3.4s, v3.4s
-; AARCH64-NEXT: fminnm v1.4s, v1.4s, v1.4s
-; AARCH64-NEXT: fminnm v0.4s, v0.4s, v2.4s
-; AARCH64-NEXT: fminnm v1.4s, v1.4s, v3.4s
-; AARCH64-NEXT: ret
+; CHECK-LABEL: min_v8f32:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: fminnm v2.4s, v2.4s, v2.4s
+; CHECK-NEXT: fminnm v0.4s, v0.4s, v0.4s
+; CHECK-NEXT: fminnm v3.4s, v3.4s, v3.4s
+; CHECK-NEXT: fminnm v1.4s, v1.4s, v1.4s
+; CHECK-NEXT: fminnm v0.4s, v0.4s, v2.4s
+; CHECK-NEXT: fminnm v1.4s, v1.4s, v3.4s
+; CHECK-NEXT: ret
entry:
%c = call <8 x float> @llvm.minimumnum.v8f32(<8 x float> %a, <8 x float> %b)
ret <8 x float> %c
@@ -1951,415 +2087,420 @@ entry:
;;;;;;;;;;;;;;;;;; min_f16
define half @min_f16(half %a, half %b) {
-; FULLFP16-LABEL: min_f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fminnm h1, h1, h1
-; FULLFP16-NEXT: fminnm h0, h0, h0
-; FULLFP16-NEXT: fminnm h0, h0, h1
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: min_f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fcvt s0, h0
+; CHECK-NOFP16-NEXT: fminnm s0, s0, s1
+; CHECK-NOFP16-NEXT: fcvt h0, s0
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: min_f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fcvt s0, h0
-; NOFULLFP16-NEXT: fminnm s0, s0, s1
-; NOFULLFP16-NEXT: fcvt h0, s0
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: min_f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fminnm h1, h1, h1
+; CHECK-FP16-NEXT: fminnm h0, h0, h0
+; CHECK-FP16-NEXT: fminnm h0, h0, h1
+; CHECK-FP16-NEXT: ret
entry:
%c = call half @llvm.minimumnum.f16(half %a, half %b)
ret half %c
}
define <2 x half> @min_v2f16(<2 x half> %a, <2 x half> %b) {
-; FULLFP16-LABEL: min_v2f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fminnm v1.4h, v1.4h, v1.4h
-; FULLFP16-NEXT: fminnm v0.4h, v0.4h, v0.4h
-; FULLFP16-NEXT: fminnm v0.4h, v0.4h, v1.4h
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: min_v2f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: // kill: def $d1 killed $d1 def $q1
+; CHECK-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
+; CHECK-NOFP16-NEXT: mov h2, v1.h[1]
+; CHECK-NOFP16-NEXT: mov h3, v0.h[1]
+; CHECK-NOFP16-NEXT: mov h4, v1.h[2]
+; CHECK-NOFP16-NEXT: mov h5, v0.h[2]
+; CHECK-NOFP16-NEXT: fcvt s6, h1
+; CHECK-NOFP16-NEXT: fcvt s7, h0
+; CHECK-NOFP16-NEXT: mov h1, v1.h[3]
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fminnm s2, s3, s2
+; CHECK-NOFP16-NEXT: fcvt s3, h4
+; CHECK-NOFP16-NEXT: fcvt s4, h5
+; CHECK-NOFP16-NEXT: fminnm s5, s7, s6
+; CHECK-NOFP16-NEXT: mov h6, v0.h[3]
+; CHECK-NOFP16-NEXT: fminnm s3, s4, s3
+; CHECK-NOFP16-NEXT: fcvt h2, s2
+; CHECK-NOFP16-NEXT: fcvt h0, s5
+; CHECK-NOFP16-NEXT: fcvt s4, h6
+; CHECK-NOFP16-NEXT: mov v0.h[1], v2.h[0]
+; CHECK-NOFP16-NEXT: fcvt h2, s3
+; CHECK-NOFP16-NEXT: fminnm s1, s4, s1
+; CHECK-NOFP16-NEXT: mov v0.h[2], v2.h[0]
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: mov v0.h[3], v1.h[0]
+; CHECK-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: min_v2f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: // kill: def $d1 killed $d1 def $q1
-; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 def $q0
-; NOFULLFP16-NEXT: mov h2, v1.h[1]
-; NOFULLFP16-NEXT: mov h3, v0.h[1]
-; NOFULLFP16-NEXT: mov h4, v1.h[2]
-; NOFULLFP16-NEXT: mov h5, v0.h[2]
-; NOFULLFP16-NEXT: fcvt s6, h1
-; NOFULLFP16-NEXT: fcvt s7, h0
-; NOFULLFP16-NEXT: mov h1, v1.h[3]
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fminnm s2, s3, s2
-; NOFULLFP16-NEXT: fcvt s3, h4
-; NOFULLFP16-NEXT: fcvt s4, h5
-; NOFULLFP16-NEXT: fminnm s5, s7, s6
-; NOFULLFP16-NEXT: mov h6, v0.h[3]
-; NOFULLFP16-NEXT: fminnm s3, s4, s3
-; NOFULLFP16-NEXT: fcvt h2, s2
-; NOFULLFP16-NEXT: fcvt h0, s5
-; NOFULLFP16-NEXT: fcvt s4, h6
-; NOFULLFP16-NEXT: mov v0.h[1], v2.h[0]
-; NOFULLFP16-NEXT: fcvt h2, s3
-; NOFULLFP16-NEXT: fminnm s1, s4, s1
-; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: mov v0.h[3], v1.h[0]
-; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: min_v2f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fminnm v1.4h, v1.4h, v1.4h
+; CHECK-FP16-NEXT: fminnm v0.4h, v0.4h, v0.4h
+; CHECK-FP16-NEXT: fminnm v0.4h, v0.4h, v1.4h
+; CHECK-FP16-NEXT: ret
entry:
%c = call <2 x half> @llvm.minimumnum.v2f16(<2 x half> %a, <2 x half> %b)
ret <2 x half> %c
}
define <4 x half> @min_v4f16(<4 x half> %a, <4 x half> %b) {
-; FULLFP16-LABEL: min_v4f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fminnm v1.4h, v1.4h, v1.4h
-; FULLFP16-NEXT: fminnm v0.4h, v0.4h, v0.4h
-; FULLFP16-NEXT: fminnm v0.4h, v0.4h, v1.4h
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: min_v4f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: // kill: def $d1 killed $d1 def $q1
+; CHECK-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
+; CHECK-NOFP16-NEXT: mov h2, v1.h[1]
+; CHECK-NOFP16-NEXT: mov h3, v0.h[1]
+; CHECK-NOFP16-NEXT: mov h4, v1.h[2]
+; CHECK-NOFP16-NEXT: mov h5, v0.h[2]
+; CHECK-NOFP16-NEXT: fcvt s6, h1
+; CHECK-NOFP16-NEXT: fcvt s7, h0
+; CHECK-NOFP16-NEXT: mov h1, v1.h[3]
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fminnm s2, s3, s2
+; CHECK-NOFP16-NEXT: fcvt s3, h4
+; CHECK-NOFP16-NEXT: fcvt s4, h5
+; CHECK-NOFP16-NEXT: fminnm s5, s7, s6
+; CHECK-NOFP16-NEXT: mov h6, v0.h[3]
+; CHECK-NOFP16-NEXT: fminnm s3, s4, s3
+; CHECK-NOFP16-NEXT: fcvt h2, s2
+; CHECK-NOFP16-NEXT: fcvt h0, s5
+; CHECK-NOFP16-NEXT: fcvt s4, h6
+; CHECK-NOFP16-NEXT: mov v0.h[1], v2.h[0]
+; CHECK-NOFP16-NEXT: fcvt h2, s3
+; CHECK-NOFP16-NEXT: fminnm s1, s4, s1
+; CHECK-NOFP16-NEXT: mov v0.h[2], v2.h[0]
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: mov v0.h[3], v1.h[0]
+; CHECK-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: min_v4f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: // kill: def $d1 killed $d1 def $q1
-; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 def $q0
-; NOFULLFP16-NEXT: mov h2, v1.h[1]
-; NOFULLFP16-NEXT: mov h3, v0.h[1]
-; NOFULLFP16-NEXT: mov h4, v1.h[2]
-; NOFULLFP16-NEXT: mov h5, v0.h[2]
-; NOFULLFP16-NEXT: fcvt s6, h1
-; NOFULLFP16-NEXT: fcvt s7, h0
-; NOFULLFP16-NEXT: mov h1, v1.h[3]
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fminnm s2, s3, s2
-; NOFULLFP16-NEXT: fcvt s3, h4
-; NOFULLFP16-NEXT: fcvt s4, h5
-; NOFULLFP16-NEXT: fminnm s5, s7, s6
-; NOFULLFP16-NEXT: mov h6, v0.h[3]
-; NOFULLFP16-NEXT: fminnm s3, s4, s3
-; NOFULLFP16-NEXT: fcvt h2, s2
-; NOFULLFP16-NEXT: fcvt h0, s5
-; NOFULLFP16-NEXT: fcvt s4, h6
-; NOFULLFP16-NEXT: mov v0.h[1], v2.h[0]
-; NOFULLFP16-NEXT: fcvt h2, s3
-; NOFULLFP16-NEXT: fminnm s1, s4, s1
-; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: mov v0.h[3], v1.h[0]
-; NOFULLFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: min_v4f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fminnm v1.4h, v1.4h, v1.4h
+; CHECK-FP16-NEXT: fminnm v0.4h, v0.4h, v0.4h
+; CHECK-FP16-NEXT: fminnm v0.4h, v0.4h, v1.4h
+; CHECK-FP16-NEXT: ret
entry:
%c = call <4 x half> @llvm.minimumnum.v4f16(<4 x half> %a, <4 x half> %b)
ret <4 x half> %c
}
define <8 x half> @min_v8f16(<8 x half> %a, <8 x half> %b) {
-; FULLFP16-LABEL: min_v8f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
-; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
-; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v1.8h
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: min_v8f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: mov h2, v1.h[1]
+; CHECK-NOFP16-NEXT: mov h3, v0.h[1]
+; CHECK-NOFP16-NEXT: fcvt s4, h1
+; CHECK-NOFP16-NEXT: fcvt s5, h0
+; CHECK-NOFP16-NEXT: mov h6, v1.h[2]
+; CHECK-NOFP16-NEXT: mov h7, v0.h[2]
+; CHECK-NOFP16-NEXT: mov h16, v1.h[3]
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fminnm s4, s5, s4
+; CHECK-NOFP16-NEXT: mov h5, v0.h[3]
+; CHECK-NOFP16-NEXT: fcvt s6, h6
+; CHECK-NOFP16-NEXT: fcvt s7, h7
+; CHECK-NOFP16-NEXT: fcvt s16, h16
+; CHECK-NOFP16-NEXT: fminnm s3, s3, s2
+; CHECK-NOFP16-NEXT: fcvt s5, h5
+; CHECK-NOFP16-NEXT: fcvt h2, s4
+; CHECK-NOFP16-NEXT: fminnm s4, s7, s6
+; CHECK-NOFP16-NEXT: mov h6, v1.h[4]
+; CHECK-NOFP16-NEXT: mov h7, v0.h[4]
+; CHECK-NOFP16-NEXT: fcvt h3, s3
+; CHECK-NOFP16-NEXT: fminnm s5, s5, s16
+; CHECK-NOFP16-NEXT: mov h16, v0.h[5]
+; CHECK-NOFP16-NEXT: fcvt h4, s4
+; CHECK-NOFP16-NEXT: mov v2.h[1], v3.h[0]
+; CHECK-NOFP16-NEXT: fcvt s3, h6
+; CHECK-NOFP16-NEXT: fcvt s6, h7
+; CHECK-NOFP16-NEXT: mov h7, v1.h[5]
+; CHECK-NOFP16-NEXT: fcvt h5, s5
+; CHECK-NOFP16-NEXT: fcvt s16, h16
+; CHECK-NOFP16-NEXT: mov v2.h[2], v4.h[0]
+; CHECK-NOFP16-NEXT: mov h4, v1.h[6]
+; CHECK-NOFP16-NEXT: fminnm s3, s6, s3
+; CHECK-NOFP16-NEXT: mov h6, v0.h[6]
+; CHECK-NOFP16-NEXT: fcvt s7, h7
+; CHECK-NOFP16-NEXT: mov h1, v1.h[7]
+; CHECK-NOFP16-NEXT: mov h0, v0.h[7]
+; CHECK-NOFP16-NEXT: mov v2.h[3], v5.h[0]
+; CHECK-NOFP16-NEXT: fcvt s4, h4
+; CHECK-NOFP16-NEXT: fcvt h3, s3
+; CHECK-NOFP16-NEXT: fcvt s5, h6
+; CHECK-NOFP16-NEXT: fminnm s6, s16, s7
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fcvt s0, h0
+; CHECK-NOFP16-NEXT: mov v2.h[4], v3.h[0]
+; CHECK-NOFP16-NEXT: fminnm s4, s5, s4
+; CHECK-NOFP16-NEXT: fcvt h3, s6
+; CHECK-NOFP16-NEXT: fminnm s0, s0, s1
+; CHECK-NOFP16-NEXT: mov v2.h[5], v3.h[0]
+; CHECK-NOFP16-NEXT: fcvt h3, s4
+; CHECK-NOFP16-NEXT: fcvt h0, s0
+; CHECK-NOFP16-NEXT: mov v2.h[6], v3.h[0]
+; CHECK-NOFP16-NEXT: mov v2.h[7], v0.h[0]
+; CHECK-NOFP16-NEXT: mov v0.16b, v2.16b
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: min_v8f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: mov h2, v1.h[1]
-; NOFULLFP16-NEXT: mov h3, v0.h[1]
-; NOFULLFP16-NEXT: fcvt s4, h1
-; NOFULLFP16-NEXT: fcvt s5, h0
-; NOFULLFP16-NEXT: mov h6, v1.h[2]
-; NOFULLFP16-NEXT: mov h7, v0.h[2]
-; NOFULLFP16-NEXT: mov h16, v1.h[3]
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fminnm s4, s5, s4
-; NOFULLFP16-NEXT: mov h5, v0.h[3]
-; NOFULLFP16-NEXT: fcvt s6, h6
-; NOFULLFP16-NEXT: fcvt s7, h7
-; NOFULLFP16-NEXT: fcvt s16, h16
-; NOFULLFP16-NEXT: fminnm s3, s3, s2
-; NOFULLFP16-NEXT: fcvt s5, h5
-; NOFULLFP16-NEXT: fcvt h2, s4
-; NOFULLFP16-NEXT: fminnm s4, s7, s6
-; NOFULLFP16-NEXT: mov h6, v1.h[4]
-; NOFULLFP16-NEXT: mov h7, v0.h[4]
-; NOFULLFP16-NEXT: fcvt h3, s3
-; NOFULLFP16-NEXT: fminnm s5, s5, s16
-; NOFULLFP16-NEXT: mov h16, v0.h[5]
-; NOFULLFP16-NEXT: fcvt h4, s4
-; NOFULLFP16-NEXT: mov v2.h[1], v3.h[0]
-; NOFULLFP16-NEXT: fcvt s3, h6
-; NOFULLFP16-NEXT: fcvt s6, h7
-; NOFULLFP16-NEXT: mov h7, v1.h[5]
-; NOFULLFP16-NEXT: fcvt h5, s5
-; NOFULLFP16-NEXT: fcvt s16, h16
-; NOFULLFP16-NEXT: mov v2.h[2], v4.h[0]
-; NOFULLFP16-NEXT: mov h4, v1.h[6]
-; NOFULLFP16-NEXT: fminnm s3, s6, s3
-; NOFULLFP16-NEXT: mov h6, v0.h[6]
-; NOFULLFP16-NEXT: fcvt s7, h7
-; NOFULLFP16-NEXT: mov h1, v1.h[7]
-; NOFULLFP16-NEXT: mov h0, v0.h[7]
-; NOFULLFP16-NEXT: mov v2.h[3], v5.h[0]
-; NOFULLFP16-NEXT: fcvt s4, h4
-; NOFULLFP16-NEXT: fcvt h3, s3
-; NOFULLFP16-NEXT: fcvt s5, h6
-; NOFULLFP16-NEXT: fminnm s6, s16, s7
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fcvt s0, h0
-; NOFULLFP16-NEXT: mov v2.h[4], v3.h[0]
-; NOFULLFP16-NEXT: fminnm s4, s5, s4
-; NOFULLFP16-NEXT: fcvt h3, s6
-; NOFULLFP16-NEXT: fminnm s0, s0, s1
-; NOFULLFP16-NEXT: mov v2.h[5], v3.h[0]
-; NOFULLFP16-NEXT: fcvt h3, s4
-; NOFULLFP16-NEXT: fcvt h0, s0
-; NOFULLFP16-NEXT: mov v2.h[6], v3.h[0]
-; NOFULLFP16-NEXT: mov v2.h[7], v0.h[0]
-; NOFULLFP16-NEXT: mov v0.16b, v2.16b
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: min_v8f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
+; CHECK-FP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
+; CHECK-FP16-NEXT: fminnm v0.8h, v0.8h, v1.8h
+; CHECK-FP16-NEXT: ret
entry:
%c = call <8 x half> @llvm.minimumnum.v8f16(<8 x half> %a, <8 x half> %b)
ret <8 x half> %c
}
define <9 x half> @min_v9f16(<9 x half> %a, <9 x half> %b) {
-; FULLFP16-LABEL: min_v9f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: // kill: def $h0 killed $h0 def $q0
-; FULLFP16-NEXT: // kill: def $h1 killed $h1 def $q1
-; FULLFP16-NEXT: // kill: def $h2 killed $h2 def $q2
-; FULLFP16-NEXT: add x9, sp, #16
-; FULLFP16-NEXT: // kill: def $h3 killed $h3 def $q3
-; FULLFP16-NEXT: // kill: def $h4 killed $h4 def $q4
-; FULLFP16-NEXT: add x10, sp, #40
-; FULLFP16-NEXT: // kill: def $h5 killed $h5 def $q5
-; FULLFP16-NEXT: // kill: def $h6 killed $h6 def $q6
-; FULLFP16-NEXT: // kill: def $h7 killed $h7 def $q7
-; FULLFP16-NEXT: mov v0.h[1], v1.h[0]
-; FULLFP16-NEXT: ldr h1, [sp, #8]
-; FULLFP16-NEXT: ld1 { v1.h }[1], [x9]
-; FULLFP16-NEXT: add x9, sp, #24
-; FULLFP16-NEXT: mov v0.h[2], v2.h[0]
-; FULLFP16-NEXT: ld1 { v1.h }[2], [x9]
-; FULLFP16-NEXT: add x9, sp, #32
-; FULLFP16-NEXT: mov v0.h[3], v3.h[0]
-; FULLFP16-NEXT: ld1 { v1.h }[3], [x9]
-; FULLFP16-NEXT: ldr h2, [x10]
-; FULLFP16-NEXT: add x9, sp, #48
-; FULLFP16-NEXT: ldr h3, [sp, #72]
-; FULLFP16-NEXT: ld1 { v2.h }[1], [x9]
-; FULLFP16-NEXT: add x9, sp, #56
-; FULLFP16-NEXT: fminnm v3.8h, v3.8h, v3.8h
-; FULLFP16-NEXT: mov v0.h[4], v4.h[0]
-; FULLFP16-NEXT: ld1 { v2.h }[2], [x9]
-; FULLFP16-NEXT: add x9, sp, #64
-; FULLFP16-NEXT: mov v0.h[5], v5.h[0]
-; FULLFP16-NEXT: ld1 { v2.h }[3], [x9]
-; FULLFP16-NEXT: zip1 v1.2d, v1.2d, v2.2d
-; FULLFP16-NEXT: ldr h2, [sp]
-; FULLFP16-NEXT: mov v0.h[6], v6.h[0]
-; FULLFP16-NEXT: fminnm v2.8h, v2.8h, v2.8h
-; FULLFP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
-; FULLFP16-NEXT: mov v0.h[7], v7.h[0]
-; FULLFP16-NEXT: fminnm v2.8h, v2.8h, v3.8h
-; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
-; FULLFP16-NEXT: str h2, [x8, #16]
-; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v1.8h
-; FULLFP16-NEXT: str q0, [x8]
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: min_v9f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: ldr h16, [sp, #16]
+; CHECK-NOFP16-NEXT: ldr h17, [sp, #8]
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fcvt s0, h0
+; CHECK-NOFP16-NEXT: ldr h18, [sp, #24]
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s16, h16
+; CHECK-NOFP16-NEXT: fcvt s17, h17
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fcvt s18, h18
+; CHECK-NOFP16-NEXT: fcvt s4, h4
+; CHECK-NOFP16-NEXT: fcvt s5, h5
+; CHECK-NOFP16-NEXT: fminnm s1, s1, s16
+; CHECK-NOFP16-NEXT: fminnm s0, s0, s17
+; CHECK-NOFP16-NEXT: ldr h16, [sp, #32]
+; CHECK-NOFP16-NEXT: fminnm s2, s2, s18
+; CHECK-NOFP16-NEXT: ldr h17, [sp, #40]
+; CHECK-NOFP16-NEXT: fcvt s16, h16
+; CHECK-NOFP16-NEXT: fcvt s17, h17
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: fcvt h0, s0
+; CHECK-NOFP16-NEXT: fcvt h2, s2
+; CHECK-NOFP16-NEXT: fminnm s3, s3, s16
+; CHECK-NOFP16-NEXT: fminnm s4, s4, s17
+; CHECK-NOFP16-NEXT: mov v0.h[1], v1.h[0]
+; CHECK-NOFP16-NEXT: ldr h1, [sp, #48]
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: fcvt h3, s3
+; CHECK-NOFP16-NEXT: fcvt h4, s4
+; CHECK-NOFP16-NEXT: mov v0.h[2], v2.h[0]
+; CHECK-NOFP16-NEXT: ldr h2, [sp, #56]
+; CHECK-NOFP16-NEXT: fminnm s1, s5, s1
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: ldr h5, [sp, #64]
+; CHECK-NOFP16-NEXT: mov v0.h[3], v3.h[0]
+; CHECK-NOFP16-NEXT: fcvt s3, h6
+; CHECK-NOFP16-NEXT: ldr h6, [sp, #72]
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: fcvt s6, h6
+; CHECK-NOFP16-NEXT: mov v0.h[4], v4.h[0]
+; CHECK-NOFP16-NEXT: fminnm s2, s3, s2
+; CHECK-NOFP16-NEXT: fcvt s3, h5
+; CHECK-NOFP16-NEXT: fcvt s4, h7
+; CHECK-NOFP16-NEXT: ldr h5, [sp]
+; CHECK-NOFP16-NEXT: fcvt s5, h5
+; CHECK-NOFP16-NEXT: mov v0.h[5], v1.h[0]
+; CHECK-NOFP16-NEXT: fcvt h1, s2
+; CHECK-NOFP16-NEXT: fminnm s2, s4, s3
+; CHECK-NOFP16-NEXT: fminnm s3, s5, s6
+; CHECK-NOFP16-NEXT: mov v0.h[6], v1.h[0]
+; CHECK-NOFP16-NEXT: fcvt h1, s2
+; CHECK-NOFP16-NEXT: fcvt h2, s3
+; CHECK-NOFP16-NEXT: mov v0.h[7], v1.h[0]
+; CHECK-NOFP16-NEXT: str h2, [x8, #16]
+; CHECK-NOFP16-NEXT: str q0, [x8]
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: min_v9f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: ldr h16, [sp, #16]
-; NOFULLFP16-NEXT: ldr h17, [sp, #8]
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fcvt s0, h0
-; NOFULLFP16-NEXT: ldr h18, [sp, #24]
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s16, h16
-; NOFULLFP16-NEXT: fcvt s17, h17
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fcvt s18, h18
-; NOFULLFP16-NEXT: fcvt s4, h4
-; NOFULLFP16-NEXT: fcvt s5, h5
-; NOFULLFP16-NEXT: fminnm s1, s1, s16
-; NOFULLFP16-NEXT: fminnm s0, s0, s17
-; NOFULLFP16-NEXT: ldr h16, [sp, #32]
-; NOFULLFP16-NEXT: fminnm s2, s2, s18
-; NOFULLFP16-NEXT: ldr h17, [sp, #40]
-; NOFULLFP16-NEXT: fcvt s16, h16
-; NOFULLFP16-NEXT: fcvt s17, h17
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: fcvt h0, s0
-; NOFULLFP16-NEXT: fcvt h2, s2
-; NOFULLFP16-NEXT: fminnm s3, s3, s16
-; NOFULLFP16-NEXT: fminnm s4, s4, s17
-; NOFULLFP16-NEXT: mov v0.h[1], v1.h[0]
-; NOFULLFP16-NEXT: ldr h1, [sp, #48]
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: fcvt h3, s3
-; NOFULLFP16-NEXT: fcvt h4, s4
-; NOFULLFP16-NEXT: mov v0.h[2], v2.h[0]
-; NOFULLFP16-NEXT: ldr h2, [sp, #56]
-; NOFULLFP16-NEXT: fminnm s1, s5, s1
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: ldr h5, [sp, #64]
-; NOFULLFP16-NEXT: mov v0.h[3], v3.h[0]
-; NOFULLFP16-NEXT: fcvt s3, h6
-; NOFULLFP16-NEXT: ldr h6, [sp, #72]
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: fcvt s6, h6
-; NOFULLFP16-NEXT: mov v0.h[4], v4.h[0]
-; NOFULLFP16-NEXT: fminnm s2, s3, s2
-; NOFULLFP16-NEXT: fcvt s3, h5
-; NOFULLFP16-NEXT: fcvt s4, h7
-; NOFULLFP16-NEXT: ldr h5, [sp]
-; NOFULLFP16-NEXT: fcvt s5, h5
-; NOFULLFP16-NEXT: mov v0.h[5], v1.h[0]
-; NOFULLFP16-NEXT: fcvt h1, s2
-; NOFULLFP16-NEXT: fminnm s2, s4, s3
-; NOFULLFP16-NEXT: fminnm s3, s5, s6
-; NOFULLFP16-NEXT: mov v0.h[6], v1.h[0]
-; NOFULLFP16-NEXT: fcvt h1, s2
-; NOFULLFP16-NEXT: fcvt h2, s3
-; NOFULLFP16-NEXT: mov v0.h[7], v1.h[0]
-; NOFULLFP16-NEXT: str h2, [x8, #16]
-; NOFULLFP16-NEXT: str q0, [x8]
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: min_v9f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: // kill: def $h0 killed $h0 def $q0
+; CHECK-FP16-NEXT: // kill: def $h1 killed $h1 def $q1
+; CHECK-FP16-NEXT: // kill: def $h2 killed $h2 def $q2
+; CHECK-FP16-NEXT: add x9, sp, #16
+; CHECK-FP16-NEXT: // kill: def $h3 killed $h3 def $q3
+; CHECK-FP16-NEXT: // kill: def $h4 killed $h4 def $q4
+; CHECK-FP16-NEXT: add x10, sp, #40
+; CHECK-FP16-NEXT: // kill: def $h5 killed $h5 def $q5
+; CHECK-FP16-NEXT: // kill: def $h6 killed $h6 def $q6
+; CHECK-FP16-NEXT: // kill: def $h7 killed $h7 def $q7
+; CHECK-FP16-NEXT: mov v0.h[1], v1.h[0]
+; CHECK-FP16-NEXT: ldr h1, [sp, #8]
+; CHECK-FP16-NEXT: ld1 { v1.h }[1], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #24
+; CHECK-FP16-NEXT: mov v0.h[2], v2.h[0]
+; CHECK-FP16-NEXT: ld1 { v1.h }[2], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #32
+; CHECK-FP16-NEXT: mov v0.h[3], v3.h[0]
+; CHECK-FP16-NEXT: ld1 { v1.h }[3], [x9]
+; CHECK-FP16-NEXT: ldr h2, [x10]
+; CHECK-FP16-NEXT: add x9, sp, #48
+; CHECK-FP16-NEXT: ldr h3, [sp, #72]
+; CHECK-FP16-NEXT: ld1 { v2.h }[1], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #56
+; CHECK-FP16-NEXT: fminnm v3.8h, v3.8h, v3.8h
+; CHECK-FP16-NEXT: mov v0.h[4], v4.h[0]
+; CHECK-FP16-NEXT: ld1 { v2.h }[2], [x9]
+; CHECK-FP16-NEXT: add x9, sp, #64
+; CHECK-FP16-NEXT: mov v0.h[5], v5.h[0]
+; CHECK-FP16-NEXT: ld1 { v2.h }[3], [x9]
+; CHECK-FP16-NEXT: zip1 v1.2d, v1.2d, v2.2d
+; CHECK-FP16-NEXT: ldr h2, [sp]
+; CHECK-FP16-NEXT: mov v0.h[6], v6.h[0]
+; CHECK-FP16-NEXT: fminnm v2.8h, v2.8h, v2.8h
+; CHECK-FP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
+; CHECK-FP16-NEXT: mov v0.h[7], v7.h[0]
+; CHECK-FP16-NEXT: fminnm v2.8h, v2.8h, v3.8h
+; CHECK-FP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
+; CHECK-FP16-NEXT: str h2, [x8, #16]
+; CHECK-FP16-NEXT: fminnm v0.8h, v0.8h, v1.8h
+; CHECK-FP16-NEXT: str q0, [x8]
+; CHECK-FP16-NEXT: ret
entry:
%c = call <9 x half> @llvm.minimumnum.v9f16(<9 x half> %a, <9 x half> %b)
ret <9 x half> %c
}
define <16 x half> @min_v16f16(<16 x half> %a, <16 x half> %b) {
-; FULLFP16-LABEL: min_v16f16:
-; FULLFP16: // %bb.0: // %entry
-; FULLFP16-NEXT: fminnm v2.8h, v2.8h, v2.8h
-; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
-; FULLFP16-NEXT: fminnm v3.8h, v3.8h, v3.8h
-; FULLFP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
-; FULLFP16-NEXT: fminnm v0.8h, v0.8h, v2.8h
-; FULLFP16-NEXT: fminnm v1.8h, v1.8h, v3.8h
-; FULLFP16-NEXT: ret
+; CHECK-NOFP16-LABEL: min_v16f16:
+; CHECK-NOFP16: // %bb.0: // %entry
+; CHECK-NOFP16-NEXT: mov h6, v2.h[1]
+; CHECK-NOFP16-NEXT: mov h7, v0.h[1]
+; CHECK-NOFP16-NEXT: fcvt s4, h2
+; CHECK-NOFP16-NEXT: fcvt s5, h0
+; CHECK-NOFP16-NEXT: mov h16, v3.h[1]
+; CHECK-NOFP16-NEXT: mov h17, v1.h[1]
+; CHECK-NOFP16-NEXT: mov h18, v2.h[2]
+; CHECK-NOFP16-NEXT: mov h19, v0.h[2]
+; CHECK-NOFP16-NEXT: fcvt s20, h3
+; CHECK-NOFP16-NEXT: fcvt s21, h1
+; CHECK-NOFP16-NEXT: mov h22, v3.h[2]
+; CHECK-NOFP16-NEXT: mov h23, v1.h[2]
+; CHECK-NOFP16-NEXT: fcvt s6, h6
+; CHECK-NOFP16-NEXT: fcvt s7, h7
+; CHECK-NOFP16-NEXT: mov h24, v0.h[6]
+; CHECK-NOFP16-NEXT: fminnm s4, s5, s4
+; CHECK-NOFP16-NEXT: fcvt s5, h16
+; CHECK-NOFP16-NEXT: fcvt s16, h17
+; CHECK-NOFP16-NEXT: fcvt s17, h18
+; CHECK-NOFP16-NEXT: fcvt s18, h19
+; CHECK-NOFP16-NEXT: mov h19, v0.h[3]
+; CHECK-NOFP16-NEXT: fminnm s20, s21, s20
+; CHECK-NOFP16-NEXT: fcvt s21, h22
+; CHECK-NOFP16-NEXT: mov h22, v3.h[3]
+; CHECK-NOFP16-NEXT: fminnm s6, s7, s6
+; CHECK-NOFP16-NEXT: mov h7, v2.h[3]
+; CHECK-NOFP16-NEXT: mov h25, v1.h[6]
+; CHECK-NOFP16-NEXT: fcvt h4, s4
+; CHECK-NOFP16-NEXT: fminnm s5, s16, s5
+; CHECK-NOFP16-NEXT: fcvt s16, h23
+; CHECK-NOFP16-NEXT: mov h23, v1.h[3]
+; CHECK-NOFP16-NEXT: fminnm s17, s18, s17
+; CHECK-NOFP16-NEXT: fcvt s18, h19
+; CHECK-NOFP16-NEXT: fcvt h6, s6
+; CHECK-NOFP16-NEXT: fcvt s7, h7
+; CHECK-NOFP16-NEXT: fcvt h19, s5
+; CHECK-NOFP16-NEXT: fcvt h5, s20
+; CHECK-NOFP16-NEXT: fminnm s16, s16, s21
+; CHECK-NOFP16-NEXT: fcvt s20, h23
+; CHECK-NOFP16-NEXT: fcvt h17, s17
+; CHECK-NOFP16-NEXT: mov h21, v2.h[4]
+; CHECK-NOFP16-NEXT: mov h23, v1.h[4]
+; CHECK-NOFP16-NEXT: mov v4.h[1], v6.h[0]
+; CHECK-NOFP16-NEXT: fcvt s6, h22
+; CHECK-NOFP16-NEXT: mov h22, v0.h[4]
+; CHECK-NOFP16-NEXT: fminnm s7, s18, s7
+; CHECK-NOFP16-NEXT: mov h18, v3.h[4]
+; CHECK-NOFP16-NEXT: mov v5.h[1], v19.h[0]
+; CHECK-NOFP16-NEXT: fcvt h16, s16
+; CHECK-NOFP16-NEXT: fminnm s6, s20, s6
+; CHECK-NOFP16-NEXT: mov v4.h[2], v17.h[0]
+; CHECK-NOFP16-NEXT: fcvt s17, h21
+; CHECK-NOFP16-NEXT: fcvt s19, h22
+; CHECK-NOFP16-NEXT: fcvt h7, s7
+; CHECK-NOFP16-NEXT: fcvt s18, h18
+; CHECK-NOFP16-NEXT: fcvt s20, h23
+; CHECK-NOFP16-NEXT: mov h21, v2.h[5]
+; CHECK-NOFP16-NEXT: mov h22, v0.h[5]
+; CHECK-NOFP16-NEXT: mov v5.h[2], v16.h[0]
+; CHECK-NOFP16-NEXT: mov h16, v3.h[5]
+; CHECK-NOFP16-NEXT: mov h23, v1.h[5]
+; CHECK-NOFP16-NEXT: fcvt h6, s6
+; CHECK-NOFP16-NEXT: mov h0, v0.h[7]
+; CHECK-NOFP16-NEXT: mov h1, v1.h[7]
+; CHECK-NOFP16-NEXT: fminnm s17, s19, s17
+; CHECK-NOFP16-NEXT: mov h19, v2.h[6]
+; CHECK-NOFP16-NEXT: mov v4.h[3], v7.h[0]
+; CHECK-NOFP16-NEXT: fminnm s18, s20, s18
+; CHECK-NOFP16-NEXT: mov h20, v3.h[6]
+; CHECK-NOFP16-NEXT: fcvt s7, h21
+; CHECK-NOFP16-NEXT: fcvt s21, h22
+; CHECK-NOFP16-NEXT: fcvt s22, h24
+; CHECK-NOFP16-NEXT: mov h2, v2.h[7]
+; CHECK-NOFP16-NEXT: mov v5.h[3], v6.h[0]
+; CHECK-NOFP16-NEXT: fcvt s6, h16
+; CHECK-NOFP16-NEXT: fcvt s16, h23
+; CHECK-NOFP16-NEXT: fcvt h17, s17
+; CHECK-NOFP16-NEXT: fcvt s19, h19
+; CHECK-NOFP16-NEXT: fcvt s23, h25
+; CHECK-NOFP16-NEXT: fcvt h18, s18
+; CHECK-NOFP16-NEXT: fcvt s20, h20
+; CHECK-NOFP16-NEXT: mov h3, v3.h[7]
+; CHECK-NOFP16-NEXT: fminnm s7, s21, s7
+; CHECK-NOFP16-NEXT: fcvt s2, h2
+; CHECK-NOFP16-NEXT: fcvt s0, h0
+; CHECK-NOFP16-NEXT: fminnm s6, s16, s6
+; CHECK-NOFP16-NEXT: fcvt s1, h1
+; CHECK-NOFP16-NEXT: mov v4.h[4], v17.h[0]
+; CHECK-NOFP16-NEXT: fminnm s16, s22, s19
+; CHECK-NOFP16-NEXT: mov v5.h[4], v18.h[0]
+; CHECK-NOFP16-NEXT: fminnm s17, s23, s20
+; CHECK-NOFP16-NEXT: fcvt s3, h3
+; CHECK-NOFP16-NEXT: fcvt h7, s7
+; CHECK-NOFP16-NEXT: fminnm s0, s0, s2
+; CHECK-NOFP16-NEXT: fcvt h6, s6
+; CHECK-NOFP16-NEXT: fcvt h2, s16
+; CHECK-NOFP16-NEXT: fminnm s1, s1, s3
+; CHECK-NOFP16-NEXT: mov v4.h[5], v7.h[0]
+; CHECK-NOFP16-NEXT: fcvt h0, s0
+; CHECK-NOFP16-NEXT: mov v5.h[5], v6.h[0]
+; CHECK-NOFP16-NEXT: fcvt h6, s17
+; CHECK-NOFP16-NEXT: fcvt h1, s1
+; CHECK-NOFP16-NEXT: mov v4.h[6], v2.h[0]
+; CHECK-NOFP16-NEXT: mov v5.h[6], v6.h[0]
+; CHECK-NOFP16-NEXT: mov v4.h[7], v0.h[0]
+; CHECK-NOFP16-NEXT: mov v5.h[7], v1.h[0]
+; CHECK-NOFP16-NEXT: mov v0.16b, v4.16b
+; CHECK-NOFP16-NEXT: mov v1.16b, v5.16b
+; CHECK-NOFP16-NEXT: ret
;
-; NOFULLFP16-LABEL: min_v16f16:
-; NOFULLFP16: // %bb.0: // %entry
-; NOFULLFP16-NEXT: mov h6, v2.h[1]
-; NOFULLFP16-NEXT: mov h7, v0.h[1]
-; NOFULLFP16-NEXT: fcvt s4, h2
-; NOFULLFP16-NEXT: fcvt s5, h0
-; NOFULLFP16-NEXT: mov h16, v3.h[1]
-; NOFULLFP16-NEXT: mov h17, v1.h[1]
-; NOFULLFP16-NEXT: mov h18, v2.h[2]
-; NOFULLFP16-NEXT: mov h19, v0.h[2]
-; NOFULLFP16-NEXT: fcvt s20, h3
-; NOFULLFP16-NEXT: fcvt s21, h1
-; NOFULLFP16-NEXT: mov h22, v3.h[2]
-; NOFULLFP16-NEXT: mov h23, v1.h[2]
-; NOFULLFP16-NEXT: fcvt s6, h6
-; NOFULLFP16-NEXT: fcvt s7, h7
-; NOFULLFP16-NEXT: mov h24, v0.h[6]
-; NOFULLFP16-NEXT: fminnm s4, s5, s4
-; NOFULLFP16-NEXT: fcvt s5, h16
-; NOFULLFP16-NEXT: fcvt s16, h17
-; NOFULLFP16-NEXT: fcvt s17, h18
-; NOFULLFP16-NEXT: fcvt s18, h19
-; NOFULLFP16-NEXT: mov h19, v0.h[3]
-; NOFULLFP16-NEXT: fminnm s20, s21, s20
-; NOFULLFP16-NEXT: fcvt s21, h22
-; NOFULLFP16-NEXT: mov h22, v3.h[3]
-; NOFULLFP16-NEXT: fminnm s6, s7, s6
-; NOFULLFP16-NEXT: mov h7, v2.h[3]
-; NOFULLFP16-NEXT: mov h25, v1.h[6]
-; NOFULLFP16-NEXT: fcvt h4, s4
-; NOFULLFP16-NEXT: fminnm s5, s16, s5
-; NOFULLFP16-NEXT: fcvt s16, h23
-; NOFULLFP16-NEXT: mov h23, v1.h[3]
-; NOFULLFP16-NEXT: fminnm s17, s18, s17
-; NOFULLFP16-NEXT: fcvt s18, h19
-; NOFULLFP16-NEXT: fcvt h6, s6
-; NOFULLFP16-NEXT: fcvt s7, h7
-; NOFULLFP16-NEXT: fcvt h19, s5
-; NOFULLFP16-NEXT: fcvt h5, s20
-; NOFULLFP16-NEXT: fminnm s16, s16, s21
-; NOFULLFP16-NEXT: fcvt s20, h23
-; NOFULLFP16-NEXT: fcvt h17, s17
-; NOFULLFP16-NEXT: mov h21, v2.h[4]
-; NOFULLFP16-NEXT: mov h23, v1.h[4]
-; NOFULLFP16-NEXT: mov v4.h[1], v6.h[0]
-; NOFULLFP16-NEXT: fcvt s6, h22
-; NOFULLFP16-NEXT: mov h22, v0.h[4]
-; NOFULLFP16-NEXT: fminnm s7, s18, s7
-; NOFULLFP16-NEXT: mov h18, v3.h[4]
-; NOFULLFP16-NEXT: mov v5.h[1], v19.h[0]
-; NOFULLFP16-NEXT: fcvt h16, s16
-; NOFULLFP16-NEXT: fminnm s6, s20, s6
-; NOFULLFP16-NEXT: mov v4.h[2], v17.h[0]
-; NOFULLFP16-NEXT: fcvt s17, h21
-; NOFULLFP16-NEXT: fcvt s19, h22
-; NOFULLFP16-NEXT: fcvt h7, s7
-; NOFULLFP16-NEXT: fcvt s18, h18
-; NOFULLFP16-NEXT: fcvt s20, h23
-; NOFULLFP16-NEXT: mov h21, v2.h[5]
-; NOFULLFP16-NEXT: mov h22, v0.h[5]
-; NOFULLFP16-NEXT: mov v5.h[2], v16.h[0]
-; NOFULLFP16-NEXT: mov h16, v3.h[5]
-; NOFULLFP16-NEXT: mov h23, v1.h[5]
-; NOFULLFP16-NEXT: fcvt h6, s6
-; NOFULLFP16-NEXT: mov h0, v0.h[7]
-; NOFULLFP16-NEXT: mov h1, v1.h[7]
-; NOFULLFP16-NEXT: fminnm s17, s19, s17
-; NOFULLFP16-NEXT: mov h19, v2.h[6]
-; NOFULLFP16-NEXT: mov v4.h[3], v7.h[0]
-; NOFULLFP16-NEXT: fminnm s18, s20, s18
-; NOFULLFP16-NEXT: mov h20, v3.h[6]
-; NOFULLFP16-NEXT: fcvt s7, h21
-; NOFULLFP16-NEXT: fcvt s21, h22
-; NOFULLFP16-NEXT: fcvt s22, h24
-; NOFULLFP16-NEXT: mov h2, v2.h[7]
-; NOFULLFP16-NEXT: mov v5.h[3], v6.h[0]
-; NOFULLFP16-NEXT: fcvt s6, h16
-; NOFULLFP16-NEXT: fcvt s16, h23
-; NOFULLFP16-NEXT: fcvt h17, s17
-; NOFULLFP16-NEXT: fcvt s19, h19
-; NOFULLFP16-NEXT: fcvt s23, h25
-; NOFULLFP16-NEXT: fcvt h18, s18
-; NOFULLFP16-NEXT: fcvt s20, h20
-; NOFULLFP16-NEXT: mov h3, v3.h[7]
-; NOFULLFP16-NEXT: fminnm s7, s21, s7
-; NOFULLFP16-NEXT: fcvt s2, h2
-; NOFULLFP16-NEXT: fcvt s0, h0
-; NOFULLFP16-NEXT: fminnm s6, s16, s6
-; NOFULLFP16-NEXT: fcvt s1, h1
-; NOFULLFP16-NEXT: mov v4.h[4], v17.h[0]
-; NOFULLFP16-NEXT: fminnm s16, s22, s19
-; NOFULLFP16-NEXT: mov v5.h[4], v18.h[0]
-; NOFULLFP16-NEXT: fminnm s17, s23, s20
-; NOFULLFP16-NEXT: fcvt s3, h3
-; NOFULLFP16-NEXT: fcvt h7, s7
-; NOFULLFP16-NEXT: fminnm s0, s0, s2
-; NOFULLFP16-NEXT: fcvt h6, s6
-; NOFULLFP16-NEXT: fcvt h2, s16
-; NOFULLFP16-NEXT: fminnm s1, s1, s3
-; NOFULLFP16-NEXT: mov v4.h[5], v7.h[0]
-; NOFULLFP16-NEXT: fcvt h0, s0
-; NOFULLFP16-NEXT: mov v5.h[5], v6.h[0]
-; NOFULLFP16-NEXT: fcvt h6, s17
-; NOFULLFP16-NEXT: fcvt h1, s1
-; NOFULLFP16-NEXT: mov v4.h[6], v2.h[0]
-; NOFULLFP16-NEXT: mov v5.h[6], v6.h[0]
-; NOFULLFP16-NEXT: mov v4.h[7], v0.h[0]
-; NOFULLFP16-NEXT: mov v5.h[7], v1.h[0]
-; NOFULLFP16-NEXT: mov v0.16b, v4.16b
-; NOFULLFP16-NEXT: mov v1.16b, v5.16b
-; NOFULLFP16-NEXT: ret
+; CHECK-FP16-LABEL: min_v16f16:
+; CHECK-FP16: // %bb.0: // %entry
+; CHECK-FP16-NEXT: fminnm v2.8h, v2.8h, v2.8h
+; CHECK-FP16-NEXT: fminnm v0.8h, v0.8h, v0.8h
+; CHECK-FP16-NEXT: fminnm v3.8h, v3.8h, v3.8h
+; CHECK-FP16-NEXT: fminnm v1.8h, v1.8h, v1.8h
+; CHECK-FP16-NEXT: fminnm v0.8h, v0.8h, v2.8h
+; CHECK-FP16-NEXT: fminnm v1.8h, v1.8h, v3.8h
+; CHECK-FP16-NEXT: ret
entry:
%c = call <16 x half> @llvm.minimumnum.v16f16(<16 x half> %a, <16 x half> %b)
ret <16 x half> %c
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-FP16-GI: {{.*}}
+; CHECK-FP16-SD: {{.*}}
+; CHECK-NOFP16-GI: {{.*}}
+; CHECK-NOFP16-SD: {{.*}}
diff --git a/llvm/test/CodeGen/AArch64/half-precision-signof-no-assert.ll b/llvm/test/CodeGen/AArch64/half-precision-signof-no-assert.ll
index 92e15e78d8c41..4bf2b8c7e6a57 100644
--- a/llvm/test/CodeGen/AArch64/half-precision-signof-no-assert.ll
+++ b/llvm/test/CodeGen/AArch64/half-precision-signof-no-assert.ll
@@ -1,36 +1,66 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc --mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc --mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD
+; RUN: llc --mtriple=aarch64-unknown-linux-gnu < %s -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI
; Check that the following does not crash
; See https://github.com/llvm/llvm-project/issues/123029 for details
define ptr @fn(ptr %in, ptr %out) {
-; CHECK-LABEL: fn:
-; CHECK: // %bb.0: // %fn
-; CHECK-NEXT: ldr d1, [x0]
-; CHECK-NEXT: movi v0.4h, #60, lsl #8
-; CHECK-NEXT: adrp x8, .LCPI0_0
-; CHECK-NEXT: fcvtl v1.4s, v1.4h
-; CHECK-NEXT: fcmgt v2.4s, v1.4s, #0.0
-; CHECK-NEXT: fcmlt v1.4s, v1.4s, #0.0
-; CHECK-NEXT: orr v1.16b, v1.16b, v2.16b
-; CHECK-NEXT: ldr h2, [x8, :lo12:.LCPI0_0]
-; CHECK-NEXT: xtn v1.4h, v1.4s
-; CHECK-NEXT: and v0.8b, v1.8b, v0.8b
-; CHECK-NEXT: movi d1, #0000000000000000
-; CHECK-NEXT: str d0, [x1]
-; CHECK-NEXT: ldr h0, [x0, #8]
-; CHECK-NEXT: mov x0, xzr
-; CHECK-NEXT: fcvt s0, h0
-; CHECK-NEXT: fcmp s0, #0.0
-; CHECK-NEXT: fcsel s1, s2, s1, mi
-; CHECK-NEXT: fcsel s1, s2, s1, gt
-; CHECK-NEXT: mvni v2.4s, #128, lsl #24
-; CHECK-NEXT: fcvt s1, h1
-; CHECK-NEXT: bit v0.16b, v1.16b, v2.16b
-; CHECK-NEXT: fcvt h0, s0
-; CHECK-NEXT: str h0, [x1, #8]
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: fn:
+; CHECK-SD: // %bb.0: // %fn
+; CHECK-SD-NEXT: ldr d1, [x0]
+; CHECK-SD-NEXT: movi v0.4h, #60, lsl #8
+; CHECK-SD-NEXT: adrp x8, .LCPI0_0
+; CHECK-SD-NEXT: fcvtl v1.4s, v1.4h
+; CHECK-SD-NEXT: fcmgt v2.4s, v1.4s, #0.0
+; CHECK-SD-NEXT: fcmlt v1.4s, v1.4s, #0.0
+; CHECK-SD-NEXT: orr v1.16b, v1.16b, v2.16b
+; CHECK-SD-NEXT: ldr h2, [x8, :lo12:.LCPI0_0]
+; CHECK-SD-NEXT: xtn v1.4h, v1.4s
+; CHECK-SD-NEXT: and v0.8b, v1.8b, v0.8b
+; CHECK-SD-NEXT: movi d1, #0000000000000000
+; CHECK-SD-NEXT: str d0, [x1]
+; CHECK-SD-NEXT: ldr h0, [x0, #8]
+; CHECK-SD-NEXT: mov x0, xzr
+; CHECK-SD-NEXT: fcvt s0, h0
+; CHECK-SD-NEXT: fcmp s0, #0.0
+; CHECK-SD-NEXT: fcsel s1, s2, s1, mi
+; CHECK-SD-NEXT: fcsel s1, s2, s1, gt
+; CHECK-SD-NEXT: mvni v2.4s, #128, lsl #24
+; CHECK-SD-NEXT: fcvt s1, h1
+; CHECK-SD-NEXT: bit v0.16b, v1.16b, v2.16b
+; CHECK-SD-NEXT: fcvt h0, s0
+; CHECK-SD-NEXT: str h0, [x1, #8]
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: fn:
+; CHECK-GI: // %bb.0: // %fn
+; CHECK-GI-NEXT: movi v0.2d, #0000000000000000
+; CHECK-GI-NEXT: ldr d1, [x0]
+; CHECK-GI-NEXT: fcvtl v1.4s, v1.4h
+; CHECK-GI-NEXT: fcvtl v0.4s, v0.4h
+; CHECK-GI-NEXT: fcmgt v2.4s, v1.4s, v0.4s
+; CHECK-GI-NEXT: fcmgt v0.4s, v0.4s, v1.4s
+; CHECK-GI-NEXT: movi v1.4s, #1
+; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b
+; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b
+; CHECK-GI-NEXT: mvni v1.4h, #128, lsl #8
+; CHECK-GI-NEXT: ucvtf v0.4s, v0.4s
+; CHECK-GI-NEXT: fcvtn v0.4h, v0.4s
+; CHECK-GI-NEXT: str d0, [x1]
+; CHECK-GI-NEXT: ldr h0, [x0, #8]
+; CHECK-GI-NEXT: ldr h2, [x0, #8]
+; CHECK-GI-NEXT: mov x0, xzr
+; CHECK-GI-NEXT: fcvt s0, h0
+; CHECK-GI-NEXT: fcmp s0, #0.0
+; CHECK-GI-NEXT: cset w8, mi
+; CHECK-GI-NEXT: cset w9, gt
+; CHECK-GI-NEXT: orr w8, w8, w9
+; CHECK-GI-NEXT: ucvtf s0, w8
+; CHECK-GI-NEXT: fcvt h0, s0
+; CHECK-GI-NEXT: bif v0.8b, v2.8b, v1.8b
+; CHECK-GI-NEXT: str h0, [x1, #8]
+; CHECK-GI-NEXT: ret
fn:
%1 = load <4 x half>, ptr %in
%2 = fcmp one <4 x half> %1, zeroinitializer
@@ -46,3 +76,5 @@ fn:
store half %8, ptr %9
ret ptr null
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK: {{.*}}
diff --git a/llvm/test/CodeGen/AArch64/isinf.ll b/llvm/test/CodeGen/AArch64/isinf.ll
index e8bbaf96395f0..f3283d2cf7ec2 100644
--- a/llvm/test/CodeGen/AArch64/isinf.ll
+++ b/llvm/test/CodeGen/AArch64/isinf.ll
@@ -1,21 +1,27 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon,+fullfp16 < %s -o -| FileCheck %s
-
-declare half @llvm.fabs.f16(half)
-declare float @llvm.fabs.f32(float)
-declare double @llvm.fabs.f64(double)
-declare fp128 @llvm.fabs.f128(fp128)
+; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+fullfp16 < %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD
+; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+fullfp16 -global-isel < %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI
; Check if INFINITY for _Float16 is materialized
define i32 @replace_isinf_call_f16(half %x) {
-; CHECK-LABEL: replace_isinf_call_f16:
-; CHECK: // %bb.0:
-; CHECK-NEXT: mov w8, #31744 // =0x7c00
-; CHECK-NEXT: fabs h0, h0
-; CHECK-NEXT: fmov h1, w8
-; CHECK-NEXT: fcmp h0, h1
-; CHECK-NEXT: cset w0, eq
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: replace_isinf_call_f16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: mov w8, #31744 // =0x7c00
+; CHECK-SD-NEXT: fabs h0, h0
+; CHECK-SD-NEXT: fmov h1, w8
+; CHECK-SD-NEXT: fcmp h0, h1
+; CHECK-SD-NEXT: cset w0, eq
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: replace_isinf_call_f16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: // kill: def $h0 killed $h0 def $s0
+; CHECK-GI-NEXT: fmov w9, s0
+; CHECK-GI-NEXT: mov w8, #31744 // =0x7c00
+; CHECK-GI-NEXT: and w9, w9, #0x7fff
+; CHECK-GI-NEXT: cmp w9, w8
+; CHECK-GI-NEXT: cset w0, eq
+; CHECK-GI-NEXT: ret
%abs = tail call half @llvm.fabs.f16(half %x)
%cmpinf = fcmp oeq half %abs, 0xH7C00
%ret = zext i1 %cmpinf to i32
@@ -24,13 +30,22 @@ define i32 @replace_isinf_call_f16(half %x) {
; Check if INFINITY for float is materialized
define i32 @replace_isinf_call_f32(float %x) {
-; CHECK-LABEL: replace_isinf_call_f32:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fmov w9, s0
-; CHECK-NEXT: mov w8, #-16777216 // =0xff000000
-; CHECK-NEXT: cmp w8, w9, lsl #1
-; CHECK-NEXT: cset w0, eq
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: replace_isinf_call_f32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fmov w9, s0
+; CHECK-SD-NEXT: mov w8, #-16777216 // =0xff000000
+; CHECK-SD-NEXT: cmp w8, w9, lsl #1
+; CHECK-SD-NEXT: cset w0, eq
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: replace_isinf_call_f32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fmov w9, s0
+; CHECK-GI-NEXT: mov w8, #2139095040 // =0x7f800000
+; CHECK-GI-NEXT: and w9, w9, #0x7fffffff
+; CHECK-GI-NEXT: cmp w9, w8
+; CHECK-GI-NEXT: cset w0, eq
+; CHECK-GI-NEXT: ret
%abs = tail call float @llvm.fabs.f32(float %x)
%cmpinf = fcmp oeq float %abs, 0x7FF0000000000000
%ret = zext i1 %cmpinf to i32
@@ -39,13 +54,22 @@ define i32 @replace_isinf_call_f32(float %x) {
; Check if INFINITY for double is materialized
define i32 @replace_isinf_call_f64(double %x) {
-; CHECK-LABEL: replace_isinf_call_f64:
-; CHECK: // %bb.0:
-; CHECK-NEXT: fmov x9, d0
-; CHECK-NEXT: mov x8, #-9007199254740992 // =0xffe0000000000000
-; CHECK-NEXT: cmp x8, x9, lsl #1
-; CHECK-NEXT: cset w0, eq
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: replace_isinf_call_f64:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: fmov x9, d0
+; CHECK-SD-NEXT: mov x8, #-9007199254740992 // =0xffe0000000000000
+; CHECK-SD-NEXT: cmp x8, x9, lsl #1
+; CHECK-SD-NEXT: cset w0, eq
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: replace_isinf_call_f64:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: fmov x9, d0
+; CHECK-GI-NEXT: mov x8, #9218868437227405312 // =0x7ff0000000000000
+; CHECK-GI-NEXT: and x9, x9, #0x7fffffffffffffff
+; CHECK-GI-NEXT: cmp x9, x8
+; CHECK-GI-NEXT: cset w0, eq
+; CHECK-GI-NEXT: ret
%abs = tail call double @llvm.fabs.f64(double %x)
%cmpinf = fcmp oeq double %abs, 0x7FF0000000000000
%ret = zext i1 %cmpinf to i32
@@ -54,19 +78,32 @@ define i32 @replace_isinf_call_f64(double %x) {
; For long double it still requires loading the constant.
define i32 @replace_isinf_call_f128(fp128 %x) {
-; CHECK-LABEL: replace_isinf_call_f128:
-; CHECK: // %bb.0:
-; CHECK-NEXT: str q0, [sp, #-16]!
-; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: ldp x9, x8, [sp], #16
-; CHECK-NEXT: and x8, x8, #0x7fffffffffffffff
-; CHECK-NEXT: eor x8, x8, #0x7fff000000000000
-; CHECK-NEXT: orr x8, x9, x8
-; CHECK-NEXT: cmp x8, #0
-; CHECK-NEXT: cset w0, eq
-; CHECK-NEXT: ret
+; CHECK-SD-LABEL: replace_isinf_call_f128:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: str q0, [sp, #-16]!
+; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
+; CHECK-SD-NEXT: ldp x9, x8, [sp], #16
+; CHECK-SD-NEXT: and x8, x8, #0x7fffffffffffffff
+; CHECK-SD-NEXT: eor x8, x8, #0x7fff000000000000
+; CHECK-SD-NEXT: orr x8, x9, x8
+; CHECK-SD-NEXT: cmp x8, #0
+; CHECK-SD-NEXT: cset w0, eq
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: replace_isinf_call_f128:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov x8, v0.d[1]
+; CHECK-GI-NEXT: fmov x9, d0
+; CHECK-GI-NEXT: and x8, x8, #0x7fffffffffffffff
+; CHECK-GI-NEXT: eor x8, x8, #0x7fff000000000000
+; CHECK-GI-NEXT: orr x8, x9, x8
+; CHECK-GI-NEXT: cmp x8, #0
+; CHECK-GI-NEXT: cset w0, eq
+; CHECK-GI-NEXT: ret
%abs = tail call fp128 @llvm.fabs.f128(fp128 %x)
%cmpinf = fcmp oeq fp128 %abs, 0xL00000000000000007FFF000000000000
%ret = zext i1 %cmpinf to i32
ret i32 %ret
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK: {{.*}}
diff --git a/llvm/test/CodeGen/AArch64/known-never-nan.ll b/llvm/test/CodeGen/AArch64/known-never-nan.ll
index d024f713a86ca..bd080e29890e2 100644
--- a/llvm/test/CodeGen/AArch64/known-never-nan.ll
+++ b/llvm/test/CodeGen/AArch64/known-never-nan.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64 < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD
+; RUN: llc -mtriple=aarch64 < %s -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI
; This should codegen to fmaxnm with no-signed-zeros.
define float @fmaxnm(i32 %i1, i32 %i2) #0 {
@@ -48,3 +49,7 @@ define float @not_fmaxnm_maybe_nan(i32 %i1, i32 %i2) #0 {
}
attributes #0 = { "no-signed-zeros-fp-math"="true" }
+
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-GI: {{.*}}
+; CHECK-SD: {{.*}}
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