[llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)

[Matt Arsenault via llvm-commits]

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@@ -1032,6 +1032,15 @@ class LLVM_ABI TargetRegisterInfo : public MCRegisterInfo {
     // Do nothing.
   }
 
+  /// Apply anti-hints to the allocation order.
+  virtual void
+  applyRegAllocationAntiHints(Register VirtReg, ArrayRef<MCPhysReg> &Order,
+                              SmallVectorImpl<MCPhysReg> &OrderStorage,
+                              SmallVector<MCPhysReg, 16> &AntiHints,
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arsenm wrote:

```suggestion
                              SmallVectorImpl<MCPhysReg> &AntiHints,
```

https://github.com/llvm/llvm-project/pull/156943