[llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)

[via llvm-commits]

https://github.com/Lukacma updated https://github.com/llvm/llvm-project/pull/183549

>From 1967e1e91b9d93a2fc1292ea3fad48c100b33015 Mon Sep 17 00:00:00 2001
From: Marian Lukac <Marian.Lukac at arm.com>
Date: Thu, 26 Feb 2026 15:20:49 +0000
Subject: [PATCH 1/3] [AArch64] Fix type mismatch in bitconvert + vec_extract
 patterns

---
 llvm/lib/Target/AArch64/AArch64InstrInfo.td | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index ace85b04595b8..97bc1c16a02d7 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -8213,9 +8213,9 @@ defm : Neon_INS_elt_ext_pattern<v8i16, v4i16, v2i32, INSvi16lane, DUPi16, hsub,
 // bitcast of an extract
 // f32 bitcast(vector_extract(v4i32 src, 0)) -> EXTRACT_SUBREG(src)
 def : Pat<(f32 (bitconvert (i32 (vector_extract v16i8:$src, (i64 0))))),
-          (EXTRACT_SUBREG V128:$src, bsub)>;
+          (EXTRACT_SUBREG V128:$src, ssub)>;
 def : Pat<(f32 (bitconvert (i32 (vector_extract v8i16:$src, (i64 0))))),
-          (EXTRACT_SUBREG V128:$src, hsub)>;
+          (EXTRACT_SUBREG V128:$src, ssub)>;
 def : Pat<(f32 (bitconvert (i32 (vector_extract v4i32:$src, (i64 0))))),
           (EXTRACT_SUBREG V128:$src, ssub)>;
 def : Pat<(f64 (bitconvert (i64 (vector_extract v2i64:$src, (i64 0))))),

>From 84e79611883ba7e4dcad0f3cff4e7fa080ba3cc3 Mon Sep 17 00:00:00 2001
From: Marian Lukac <Marian.Lukac at arm.com>
Date: Fri, 27 Feb 2026 13:44:54 +0000
Subject: [PATCH 2/3] Add test and remove unused pattern

---
 llvm/lib/Target/AArch64/AArch64InstrInfo.td   |  2 --
 .../AArch64/neon-extractbitcast-mir.ll        | 19 +++++++++++++++++++
 2 files changed, 19 insertions(+), 2 deletions(-)
 create mode 100644 llvm/test/CodeGen/AArch64/neon-extractbitcast-mir.ll

diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index 97bc1c16a02d7..2ebdc29a6fb4e 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -8212,8 +8212,6 @@ defm : Neon_INS_elt_ext_pattern<v8i16, v4i16, v2i32, INSvi16lane, DUPi16, hsub,
 
 // bitcast of an extract
 // f32 bitcast(vector_extract(v4i32 src, 0)) -> EXTRACT_SUBREG(src)
-def : Pat<(f32 (bitconvert (i32 (vector_extract v16i8:$src, (i64 0))))),
-          (EXTRACT_SUBREG V128:$src, ssub)>;
 def : Pat<(f32 (bitconvert (i32 (vector_extract v8i16:$src, (i64 0))))),
           (EXTRACT_SUBREG V128:$src, ssub)>;
 def : Pat<(f32 (bitconvert (i32 (vector_extract v4i32:$src, (i64 0))))),
diff --git a/llvm/test/CodeGen/AArch64/neon-extractbitcast-mir.ll b/llvm/test/CodeGen/AArch64/neon-extractbitcast-mir.ll
new file mode 100644
index 0000000000000..d18ea001dd3e8
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/neon-extractbitcast-mir.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
+; RUN: llc < %s -mtriple aarch64-none-linux-gnu -stop-after=finalize-isel | FileCheck %s --check-prefix=CHECK
+
+define half @test_vext_v8i16_0(<8 x i16> %a) {
+  ; CHECK-LABEL: name: test_vext_v8i16_0
+  ; CHECK: bb.0.entry:
+  ; CHECK-NEXT:   liveins: $q0
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:fpr128 = COPY $q0
+  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:fpr32 = COPY [[COPY]].ssub
+  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:fpr16 = COPY [[COPY1]].hsub
+  ; CHECK-NEXT:   $h0 = COPY [[COPY2]]
+  ; CHECK-NEXT:   RET_ReallyLR implicit $h0
+entry:
+  %b = extractelement <8 x i16> %a, i32 0
+  %c = bitcast i16 %b to half
+  ret half %c
+
+}

>From 1e63d918d2e9ce9af208c9a7d905fc642806597a Mon Sep 17 00:00:00 2001
From: Marian Lukac <Marian.Lukac at arm.com>
Date: Tue, 3 Mar 2026 14:00:58 +0000
Subject: [PATCH 3/3] Fix removed pattern and add

---
 llvm/lib/Target/AArch64/AArch64InstrInfo.td          | 2 ++
 llvm/test/CodeGen/AArch64/neon-extractbitcast-mir.ll | 2 +-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index 68df20b141f32..e704ffe537ed7 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -8212,6 +8212,8 @@ defm : Neon_INS_elt_ext_pattern<v8i16, v4i16, v2i32, INSvi16lane, DUPi16, hsub,
 
 // bitcast of an extract
 // f32 bitcast(vector_extract(v4i32 src, 0)) -> EXTRACT_SUBREG(src)
+def : Pat<(f32 (bitconvert (i32 (vector_extract v16i8:$src, (i64 0))))),
+          (EXTRACT_SUBREG V128:$src, ssub)>;
 def : Pat<(f32 (bitconvert (i32 (vector_extract v8i16:$src, (i64 0))))),
           (EXTRACT_SUBREG V128:$src, ssub)>;
 def : Pat<(f32 (bitconvert (i32 (vector_extract v4i32:$src, (i64 0))))),
diff --git a/llvm/test/CodeGen/AArch64/neon-extractbitcast-mir.ll b/llvm/test/CodeGen/AArch64/neon-extractbitcast-mir.ll
index d18ea001dd3e8..d3cc83af1eddc 100644
--- a/llvm/test/CodeGen/AArch64/neon-extractbitcast-mir.ll
+++ b/llvm/test/CodeGen/AArch64/neon-extractbitcast-mir.ll
@@ -16,4 +16,4 @@ entry:
   %c = bitcast i16 %b to half
   ret half %c
 
-}
+}
\ No newline at end of file