[llvm] [InstCombine] Simplify conditional round-up to power-of-2 alignment (PR #184989)
Antonio Frighetto via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 6 03:12:12 PST 2026
================
@@ -0,0 +1,229 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt < %s -passes=instcombine -S | FileCheck %s
+
+; Simple round up to next multiple of power-of-2 pattern that may arise
+; from div_ceil(X, P) * P.
+
+define i32 @round_up_pow2_2(i32 %x) {
+; CHECK-LABEL: define i32 @round_up_pow2_2(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT: [[AND:%.*]] = shl i32 [[X]], 1
+; CHECK-NEXT: [[SEL:%.*]] = and i32 [[AND]], 2
+; CHECK-NEXT: [[ADD:%.*]] = add i32 [[SEL]], [[X]]
+; CHECK-NEXT: [[RES:%.*]] = and i32 [[ADD]], -2
+; CHECK-NEXT: ret i32 [[RES]]
----------------
antoniofrighetto wrote:
Should `foldSelectBitTest` be restrained when handling constant 2?
https://github.com/llvm/llvm-project/pull/184989
More information about the llvm-commits
mailing list