[llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)

[Tim Gymnich via llvm-commits]

https://github.com/tgymnich commented:

A few general points:

We need to decide, where and how striclty we want to enforce bitcasts (I see 2 options):
1. Stick to LLVM IR semantics e.g.: bitwise ops are operations on integers and require bitcasts. **Advantages**: Easily translates from LLVM IR, allows using `G_BITCAST` as a hint for RegBankSelect.
2. Treat integer as some kind of superclass of float. E.g. allow bitwise and integer operations like `G_ADD`, `G_OR`, `G_BITREVERSE` on floats without bitcasts. Disallow floating point operations like `G_FADD` on integer / scalar operands. **Advantages**: fewer MIR ops to visit (speed), fewer code changes in the backends.
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We might want to have stricter verification in MachineVerifier:
1. `G_INSERT` may only insert elements of the vector type
2. `G_PHI`, `G_SELECT` may only have operands of the same `LLT` kind and size

https://github.com/llvm/llvm-project/pull/177158