[llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)

[Stanislav Mekhanoshin via llvm-commits]

rampitec wrote:

> > Can't the adds be recomputed in such a way that we can always use a positive imm offset?
> 
> That is a good idea. Updated the PR.

Remember offset only uses 16 bits on the LDS side.

https://github.com/llvm/llvm-project/pull/185078