[llvm] 56cdd60 - [MC] Merge fixupNeedsRelaxation and fixupNeedsRelaxationAdvanced. NFC (#184832)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 5 09:29:35 PST 2026
Author: Fangrui Song
Date: 2026-03-05T09:29:29-08:00
New Revision: 56cdd60a2f94d715c188ce17507796996d880f0d
URL: https://github.com/llvm/llvm-project/commit/56cdd60a2f94d715c188ce17507796996d880f0d
DIFF: https://github.com/llvm/llvm-project/commit/56cdd60a2f94d715c188ce17507796996d880f0d.diff
LOG: [MC] Merge fixupNeedsRelaxation and fixupNeedsRelaxationAdvanced. NFC (#184832)
The two-tier relaxation hook design (fixupNeedsRelaxationAdvanced
delegating to fixupNeedsRelaxation) is confusing and unnecessary.
Only M68k and AMDGPU used fixupNeedsRelaxation (via the default
fixupNeedsRelaxationAdvanced). AArch64 and CSKY had dead overrides:
they don't override mayNeedRelaxation to ever return true.
Merge the two hooks: convert M68k and AMDGPU to override
fixupNeedsRelaxationAdvanced directly, remove dead overrides from
AArch64 and CSKY, and simplify the default implementation to
`return !Resolved`.
Added:
Modified:
llvm/include/llvm/MC/MCAsmBackend.h
llvm/lib/MC/MCAsmBackend.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
llvm/lib/Target/M68k/MCTargetDesc/M68kAsmBackend.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/MC/MCAsmBackend.h b/llvm/include/llvm/MC/MCAsmBackend.h
index e622eb8e6e271..c91cd772669f5 100644
--- a/llvm/include/llvm/MC/MCAsmBackend.h
+++ b/llvm/include/llvm/MC/MCAsmBackend.h
@@ -143,12 +143,6 @@ class LLVM_ABI MCAsmBackend {
const MCValue &, uint64_t,
bool Resolved) const;
- /// Simple predicate for targets where !Resolved implies requiring relaxation
- virtual bool fixupNeedsRelaxation(const MCFixup &Fixup,
- uint64_t Value) const {
- llvm_unreachable("Needed if mayNeedRelaxation may return true");
- }
-
/// Relax the instruction in the given fragment to the next wider instruction.
///
/// \param [out] Inst The instruction to relax, which is also the relaxed
@@ -156,9 +150,7 @@ class LLVM_ABI MCAsmBackend {
/// \param STI the subtarget information for the associated instruction.
virtual void relaxInstruction(MCInst &Inst,
const MCSubtargetInfo &STI) const {
- llvm_unreachable(
- "Needed if fixupNeedsRelaxation/fixupNeedsRelaxationAdvanced may "
- "return true");
+ llvm_unreachable("Needed if fixupNeedsRelaxationAdvanced may return true");
}
// Defined by linker relaxation targets.
diff --git a/llvm/lib/MC/MCAsmBackend.cpp b/llvm/lib/MC/MCAsmBackend.cpp
index 55ec4a6675010..d0856d25aee21 100644
--- a/llvm/lib/MC/MCAsmBackend.cpp
+++ b/llvm/lib/MC/MCAsmBackend.cpp
@@ -107,12 +107,10 @@ MCFixupKindInfo MCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
}
bool MCAsmBackend::fixupNeedsRelaxationAdvanced(const MCFragment &,
- const MCFixup &Fixup,
- const MCValue &, uint64_t Value,
+ const MCFixup &,
+ const MCValue &, uint64_t,
bool Resolved) const {
- if (!Resolved)
- return true;
- return fixupNeedsRelaxation(Fixup, Value);
+ return !Resolved;
}
void MCAsmBackend::maybeAddReloc(const MCFragment &F, const MCFixup &Fixup,
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
index 1f9694cf98fec..48213d4da5d9f 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
@@ -81,8 +81,6 @@ class AArch64AsmBackend : public MCAsmBackend {
void applyFixup(const MCFragment &, const MCFixup &, const MCValue &Target,
uint8_t *Data, uint64_t Value, bool IsResolved) override;
- bool fixupNeedsRelaxation(const MCFixup &Fixup,
- uint64_t Value) const override;
bool writeNopData(raw_ostream &OS, uint64_t Count,
const MCSubtargetInfo *STI) const override;
@@ -497,15 +495,6 @@ void AArch64AsmBackend::applyFixup(const MCFragment &F, const MCFixup &Fixup,
}
}
-bool AArch64AsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
- uint64_t Value) const {
- // FIXME: This isn't correct for AArch64. Just moving the "generic" logic
- // into the targets for now.
- //
- // Relax if the value is too big for a (signed) i8.
- return int64_t(Value) != int64_t(int8_t(Value));
-}
-
bool AArch64AsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
const MCSubtargetInfo *STI) const {
// If the count is not 4-byte aligned, we must be writing data into the text
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
index 4e4660c640058..393b0eba1390e 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
@@ -34,8 +34,9 @@ class AMDGPUAsmBackend : public MCAsmBackend {
void applyFixup(const MCFragment &, const MCFixup &, const MCValue &Target,
uint8_t *Data, uint64_t Value, bool IsResolved) override;
- bool fixupNeedsRelaxation(const MCFixup &Fixup,
- uint64_t Value) const override;
+ bool fixupNeedsRelaxationAdvanced(const MCFragment &, const MCFixup &,
+ const MCValue &, uint64_t,
+ bool) const override;
void relaxInstruction(MCInst &Inst,
const MCSubtargetInfo &STI) const override;
@@ -62,8 +63,13 @@ void AMDGPUAsmBackend::relaxInstruction(MCInst &Inst,
Inst = std::move(Res);
}
-bool AMDGPUAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
- uint64_t Value) const {
+bool AMDGPUAsmBackend::fixupNeedsRelaxationAdvanced(const MCFragment &,
+ const MCFixup &Fixup,
+ const MCValue &,
+ uint64_t Value,
+ bool Resolved) const {
+ if (!Resolved)
+ return true;
// if the branch target has an offset of x3f this needs to be relaxed to
// add a s_nop 0 immediately after branch to effectively increment offset
// for hardware workaround in gfx1010
diff --git a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
index 6964998809f46..d3bbe7306f2b2 100644
--- a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
+++ b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
@@ -276,11 +276,6 @@ bool CSKYAsmBackend::shouldForceRelocation(const MCFixup &Fixup,
return false;
}
-bool CSKYAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
- uint64_t Value) const {
- return false;
-}
-
void CSKYAsmBackend::relaxInstruction(MCInst &Inst,
const MCSubtargetInfo &STI) const {
MCInst Res;
diff --git a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
index 5d8826a4d7a25..c414ed689ed13 100644
--- a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
+++ b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
@@ -29,9 +29,6 @@ class CSKYAsmBackend : public MCAsmBackend {
MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override;
- bool fixupNeedsRelaxation(const MCFixup &Fixup,
- uint64_t Value) const override;
-
bool mayNeedRelaxation(unsigned Opcode, ArrayRef<MCOperand> Operands,
const MCSubtargetInfo &STI) const override;
void relaxInstruction(MCInst &Inst,
diff --git a/llvm/lib/Target/M68k/MCTargetDesc/M68kAsmBackend.cpp b/llvm/lib/Target/M68k/MCTargetDesc/M68kAsmBackend.cpp
index 51bafe4a4c56c..e4cd9e2d21fab 100644
--- a/llvm/lib/Target/M68k/MCTargetDesc/M68kAsmBackend.cpp
+++ b/llvm/lib/Target/M68k/MCTargetDesc/M68kAsmBackend.cpp
@@ -58,8 +58,9 @@ class M68kAsmBackend : public MCAsmBackend {
bool mayNeedRelaxation(unsigned Opcode, ArrayRef<MCOperand> Operands,
const MCSubtargetInfo &STI) const override;
- bool fixupNeedsRelaxation(const MCFixup &Fixup,
- uint64_t Value) const override;
+ bool fixupNeedsRelaxationAdvanced(const MCFragment &, const MCFixup &,
+ const MCValue &, uint64_t,
+ bool) const override;
void relaxInstruction(MCInst &Inst,
const MCSubtargetInfo &STI) const override;
@@ -188,8 +189,13 @@ bool M68kAsmBackend::mayNeedRelaxation(unsigned Opcode, ArrayRef<MCOperand>,
// NOTE will change for x20 mem
}
-bool M68kAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
- uint64_t UnsignedValue) const {
+bool M68kAsmBackend::fixupNeedsRelaxationAdvanced(const MCFragment &,
+ const MCFixup &Fixup,
+ const MCValue &,
+ uint64_t UnsignedValue,
+ bool Resolved) const {
+ if (!Resolved)
+ return true;
int64_t Value = static_cast<int64_t>(UnsignedValue);
if (!isInt<32>(Value) || (!Allows32BitBranch && !isInt<16>(Value)))
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