[llvm] 02b2a1e - Fix `assignValueToReg` function's argument (#184354)

via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 3 07:42:35 PST 2026


Author: Shoreshen
Date: 2026-03-03T23:42:29+08:00
New Revision: 02b2a1e8fe7f553e49b6dff9ee9b2ba160eea9cb

URL: https://github.com/llvm/llvm-project/commit/02b2a1e8fe7f553e49b6dff9ee9b2ba160eea9cb
DIFF: https://github.com/llvm/llvm-project/commit/02b2a1e8fe7f553e49b6dff9ee9b2ba160eea9cb.diff

LOG: Fix `assignValueToReg` function's argument (#184354)

Because of [PR#178198](https://github.com/llvm/llvm-project/pull/178198)
the argument changes for `assignValueToReg`.

This PR aiming at fixing M86k experimental target

Added: 
    

Modified: 
    llvm/lib/Target/M68k/GISel/M68kCallLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/M68k/GISel/M68kCallLowering.cpp b/llvm/lib/Target/M68k/GISel/M68kCallLowering.cpp
index c7cdbe398fec1..a6aebf5767bfa 100644
--- a/llvm/lib/Target/M68k/GISel/M68kCallLowering.cpp
+++ b/llvm/lib/Target/M68k/GISel/M68kCallLowering.cpp
@@ -150,7 +150,8 @@ bool M68kCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
 
 void M68kIncomingValueHandler::assignValueToReg(Register ValVReg,
                                                 Register PhysReg,
-                                                const CCValAssign &VA) {
+                                                const CCValAssign &VA,
+                                                ISD::ArgFlagsTy Flags) {
   MIRBuilder.getMRI()->addLiveIn(PhysReg);
   MIRBuilder.getMBB().addLiveIn(PhysReg);
   IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA);
@@ -183,7 +184,8 @@ Register M68kIncomingValueHandler::getStackAddress(uint64_t Size,
 }
 
 void CallReturnHandler::assignValueToReg(Register ValVReg, Register PhysReg,
-                                         const CCValAssign &VA) {
+                                         const CCValAssign &VA,
+                                         ISD::ArgFlagsTy Flags) {
   MIB.addDef(PhysReg, RegState::Implicit);
   MIRBuilder.buildCopy(ValVReg, PhysReg);
 }


        


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