[llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)

[Stanislav Mekhanoshin via llvm-commits]

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@@ -90,10 +90,10 @@ body:             |
     ; GFX1250-NEXT: renamable $vgpr0 = V_AND_B32_e32 1023, killed $vgpr0, implicit $exec
     ; GFX1250-NEXT: GLOBAL_LOAD_ASYNC_TO_LDS_B128_SADDR $vgpr1, $sgpr0_sgpr1, $vgpr0, 0, 0, implicit-def dead $asynccnt, implicit $exec, implicit $asynccnt :: (load store (s128), align 1, addrspace 3)
     ; GFX1250-NEXT: renamable $vgpr2_vgpr3 = V_ADD_U64_e32 killed $sgpr0_sgpr1, $vgpr0_vgpr1, implicit $exec
-    ; GFX1250-NEXT: renamable $vgpr0 = V_ADD_U32_e64 256, 0, 0, implicit $exec
-    ; GFX1250-NEXT: renamable $vgpr2_vgpr3 = V_ADD_U64_e32 512, killed $vgpr2_vgpr3, implicit $exec
-    ; GFX1250-NEXT: GLOBAL_LOAD_ASYNC_TO_LDS_B128 killed $vgpr0, $vgpr2_vgpr3, -256, 0, implicit-def dead $asynccnt, implicit $exec, implicit $asynccnt :: (load store (s128), align 1, addrspace 3)
-    ; GFX1250-NEXT: GLOBAL_LOAD_ASYNC_TO_LDS_B128 killed $vgpr1, killed $vgpr2_vgpr3, 0, 0, implicit-def dead $asynccnt, implicit $exec, implicit $asynccnt :: (load store (s128), align 1, addrspace 3)
+    ; GFX1250-NEXT: renamable $vgpr0 = V_ADD_U32_e64 -256, 0, 0, implicit $exec
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rampitec wrote:

Instruction is legal. Although this v_mov_b32 of course.

https://github.com/llvm/llvm-project/pull/185078