[llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)

[Jonas Paulsson via llvm-commits]

================
@@ -21,6 +13,188 @@ using namespace llvm;
 
 #define DEBUG_TYPE "machine-scheduler"
 
+/// Pre-RA scheduling ///
+
+static bool isRegDef(const MachineOperand &MO) {
+  return MO.isReg() && MO.isDef();
+}
+
+static bool isPhysRegDef(const MachineOperand &MO) {
+  return isRegDef(MO) && MO.getReg().isPhysical();
+}
+
+void SystemZPreRASchedStrategy::initializeLatencyReduction() {
+  // Enable latency reduction for a region that has a considerable amount of
+  // data sequences that should be interlaved. These are SUs that only have
+  // one data predecessor / successor edge(s) to their adjacent instruction(s)
+  // in the input order. Disable if region has many SUs relative to the
+  // overall height.
----------------
JonPsson1 wrote:

I checked the build of SPEC and compared between versions, first comparing main (GenericScheduler) with disabled (no pre-RA sched) and the new strategy. Then also with this current simplification without the data-sequences heuristic. This last step clearly degrades the statistics more than any other version, although only with a few percent - most notably the cmp0 eliminations. As this comes from the more aggressive use of the latency heuristic, I tried moving that down to make it active fewer times, but this did not help. Finally, I then compared with removing the cmp0 handling altogether, and it seems that this did not hurt much as it wasn't helping much with the increased latency scheduling. There doesn't seem to be any performance differences either between the last four versions in the summaries below:

```
* Statistics:

regalloc - Number of spilled live ranges
161454               genericscheduler
160099               disabled
161524               New strategy (simplified)
166553               Same, but without data-sequences heuristic. (+3%)
166552                 - Latency heuristic below weak edges (1 step down).
166600                 - Latency heuristic below cmp/0 elim (2 steps down).
166553                 - Cmp/0 elim removed (only change).

systemz-elim-compare - Number of eliminated comparisons:
191698               GenericScheduler
191843               disabled
193292               New strategy (simplified)
184567               Same, but without data-sequences heuristic. (-5% / -4%)
184567                 - Latency heuristic below weak edges (1 step down).
188133                 - Latency heuristic below cmp/0 elim (2 steps down).
184386                 - Cmp/0 elim removed (only change).

* Instruction mix:

Number of reg move insructions:
888610               GenericScheduler
907157               disabled
888621               New strategy (simplified)
893878               Same, but without data-sequences heuristic. (+1%)
893870                 - Latency heuristic below weak edges (1 step down).
894021                 - Latency heuristic below cmp/0 elim (2 steps down).
893880                 - Cmp/0 elim removed (only change).

Number of spill/restore instructions:
470795               GenericScheduler
467396               disabled
470418               New strategy (simplified)
476687               Same, but without data-sequences heuristic. (+1%)
476686                 - Latency heuristic below weak edges (1 step down).
476802                 - Latency heuristic below cmp/0 elim (2 steps down).
476697                 - Cmp/0 elim removed (only change).

```



https://github.com/llvm/llvm-project/pull/135076