[llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)

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Mon Mar 2 01:09:55 PST 2026


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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp,h -- llvm/include/llvm-c/Core.h llvm/include/llvm/Analysis/TargetTransformInfoImpl.h llvm/include/llvm/CodeGen/BasicTTIImpl.h llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h llvm/include/llvm/IR/InstVisitor.h llvm/include/llvm/IR/Instructions.h llvm/include/llvm/Transforms/InstCombine/InstCombiner.h llvm/lib/Analysis/ObjCARCInstKind.cpp llvm/lib/Analysis/ValueTracking.cpp llvm/lib/AsmParser/LLLexer.cpp llvm/lib/Bitcode/Writer/BitcodeWriter.cpp llvm/lib/CodeGen/CodeGenPrepare.cpp llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp llvm/lib/CodeGen/SelectionDAG/FastISel.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h llvm/lib/CodeGen/TargetLoweringBase.cpp llvm/lib/CodeGen/TypePromotion.cpp llvm/lib/FuzzMutate/RandomIRBuilder.cpp llvm/lib/IR/Instruction.cpp llvm/lib/IR/Instructions.cpp llvm/lib/IR/Metadata.cpp llvm/lib/IR/ProfDataUtils.cpp llvm/lib/SandboxIR/Context.cpp llvm/lib/Target/AArch64/AArch64FastISel.cpp llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp llvm/lib/Target/AMDGPU/R600TargetTransformInfo.cpp llvm/lib/Target/ARM/ARMFastISel.cpp llvm/lib/Target/Mips/MipsFastISel.cpp llvm/lib/Target/PowerPC/PPCFastISel.cpp llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp llvm/lib/Target/X86/X86FastISel.cpp llvm/lib/Target/X86/X86TargetTransformInfo.cpp llvm/lib/Transforms/IPO/Attributor.cpp llvm/lib/Transforms/IPO/AttributorAttributes.cpp llvm/lib/Transforms/IPO/IROutliner.cpp llvm/lib/Transforms/InstCombine/InstructionCombining.cpp llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp llvm/lib/Transforms/Utils/InlineFunction.cpp llvm/lib/Transforms/Utils/SimplifyCFG.cpp llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp llvm/lib/Transforms/Vectorize/LoopVectorize.cpp llvm/lib/Transforms/Vectorize/VPlan.cpp llvm/lib/Transforms/Vectorize/VPlan.h llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp llvm/tools/llvm-c-test/echo.cpp llvm/unittests/Analysis/IR2VecTest.cpp mlir/lib/Target/LLVMIR/ModuleImport.cpp --diff_from_common_commit
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``````````diff
diff --git a/llvm/include/llvm-c/Core.h b/llvm/include/llvm-c/Core.h
index de1b5aa09..f062af80e 100644
--- a/llvm/include/llvm-c/Core.h
+++ b/llvm/include/llvm-c/Core.h
@@ -60,93 +60,93 @@ LLVM_C_EXTERN_C_BEGIN
 /// to reorder them.
 typedef enum {
   /* Terminator Instructions */
-  LLVMRet            = 1,
+  LLVMRet = 1,
   /* removed 2 due to API changes */
-  LLVMUncondBr       = 70,
-  LLVMCondBr         = 71,
-  LLVMSwitch         = 3,
-  LLVMIndirectBr     = 4,
-  LLVMInvoke         = 5,
+  LLVMUncondBr = 70,
+  LLVMCondBr = 71,
+  LLVMSwitch = 3,
+  LLVMIndirectBr = 4,
+  LLVMInvoke = 5,
   /* removed 6 due to API changes */
-  LLVMUnreachable    = 7,
-  LLVMCallBr         = 67,
+  LLVMUnreachable = 7,
+  LLVMCallBr = 67,
 
   /* Standard Unary Operators */
-  LLVMFNeg           = 66,
+  LLVMFNeg = 66,
 
   /* Standard Binary Operators */
-  LLVMAdd            = 8,
-  LLVMFAdd           = 9,
-  LLVMSub            = 10,
-  LLVMFSub           = 11,
-  LLVMMul            = 12,
-  LLVMFMul           = 13,
-  LLVMUDiv           = 14,
-  LLVMSDiv           = 15,
-  LLVMFDiv           = 16,
-  LLVMURem           = 17,
-  LLVMSRem           = 18,
-  LLVMFRem           = 19,
+  LLVMAdd = 8,
+  LLVMFAdd = 9,
+  LLVMSub = 10,
+  LLVMFSub = 11,
+  LLVMMul = 12,
+  LLVMFMul = 13,
+  LLVMUDiv = 14,
+  LLVMSDiv = 15,
+  LLVMFDiv = 16,
+  LLVMURem = 17,
+  LLVMSRem = 18,
+  LLVMFRem = 19,
 
   /* Logical Operators */
-  LLVMShl            = 20,
-  LLVMLShr           = 21,
-  LLVMAShr           = 22,
-  LLVMAnd            = 23,
-  LLVMOr             = 24,
-  LLVMXor            = 25,
+  LLVMShl = 20,
+  LLVMLShr = 21,
+  LLVMAShr = 22,
+  LLVMAnd = 23,
+  LLVMOr = 24,
+  LLVMXor = 25,
 
   /* Memory Operators */
-  LLVMAlloca         = 26,
-  LLVMLoad           = 27,
-  LLVMStore          = 28,
-  LLVMGetElementPtr  = 29,
+  LLVMAlloca = 26,
+  LLVMLoad = 27,
+  LLVMStore = 28,
+  LLVMGetElementPtr = 29,
 
   /* Cast Operators */
-  LLVMTrunc          = 30,
-  LLVMZExt           = 31,
-  LLVMSExt           = 32,
-  LLVMFPToUI         = 33,
-  LLVMFPToSI         = 34,
-  LLVMUIToFP         = 35,
-  LLVMSIToFP         = 36,
-  LLVMFPTrunc        = 37,
-  LLVMFPExt          = 38,
-  LLVMPtrToInt       = 39,
-  LLVMPtrToAddr      = 69,
-  LLVMIntToPtr       = 40,
-  LLVMBitCast        = 41,
-  LLVMAddrSpaceCast  = 60,
+  LLVMTrunc = 30,
+  LLVMZExt = 31,
+  LLVMSExt = 32,
+  LLVMFPToUI = 33,
+  LLVMFPToSI = 34,
+  LLVMUIToFP = 35,
+  LLVMSIToFP = 36,
+  LLVMFPTrunc = 37,
+  LLVMFPExt = 38,
+  LLVMPtrToInt = 39,
+  LLVMPtrToAddr = 69,
+  LLVMIntToPtr = 40,
+  LLVMBitCast = 41,
+  LLVMAddrSpaceCast = 60,
 
   /* Other Operators */
-  LLVMICmp           = 42,
-  LLVMFCmp           = 43,
-  LLVMPHI            = 44,
-  LLVMCall           = 45,
-  LLVMSelect         = 46,
-  LLVMUserOp1        = 47,
-  LLVMUserOp2        = 48,
-  LLVMVAArg          = 49,
+  LLVMICmp = 42,
+  LLVMFCmp = 43,
+  LLVMPHI = 44,
+  LLVMCall = 45,
+  LLVMSelect = 46,
+  LLVMUserOp1 = 47,
+  LLVMUserOp2 = 48,
+  LLVMVAArg = 49,
   LLVMExtractElement = 50,
-  LLVMInsertElement  = 51,
-  LLVMShuffleVector  = 52,
-  LLVMExtractValue   = 53,
-  LLVMInsertValue    = 54,
-  LLVMFreeze         = 68,
+  LLVMInsertElement = 51,
+  LLVMShuffleVector = 52,
+  LLVMExtractValue = 53,
+  LLVMInsertValue = 54,
+  LLVMFreeze = 68,
 
   /* Atomic operators */
-  LLVMFence          = 55,
-  LLVMAtomicCmpXchg  = 56,
-  LLVMAtomicRMW      = 57,
+  LLVMFence = 55,
+  LLVMAtomicCmpXchg = 56,
+  LLVMAtomicRMW = 57,
 
   /* Exception Handling Operators */
-  LLVMResume         = 58,
-  LLVMLandingPad     = 59,
-  LLVMCleanupRet     = 61,
-  LLVMCatchRet       = 62,
-  LLVMCatchPad       = 63,
-  LLVMCleanupPad     = 64,
-  LLVMCatchSwitch    = 65
+  LLVMResume = 58,
+  LLVMLandingPad = 59,
+  LLVMCleanupRet = 61,
+  LLVMCatchRet = 62,
+  LLVMCatchPad = 63,
+  LLVMCleanupPad = 64,
+  LLVMCatchSwitch = 65
 } LLVMOpcode;
 
 typedef enum {
diff --git a/llvm/lib/AsmParser/LLLexer.cpp b/llvm/lib/AsmParser/LLLexer.cpp
index b3c7bf94f..f9e301f6e 100644
--- a/llvm/lib/AsmParser/LLLexer.cpp
+++ b/llvm/lib/AsmParser/LLLexer.cpp
@@ -951,7 +951,7 @@ lltok::Kind LLLexer::LexIdentifier() {
   INSTKEYWORD(addrspacecast, AddrSpaceCast);
   INSTKEYWORD(select,      Select);
   INSTKEYWORD(va_arg,      VAArg);
-  INSTKEYWORD(ret,         Ret);
+  INSTKEYWORD(ret, Ret);
   INSTKEYWORD(switch,      Switch);
   INSTKEYWORD(indirectbr,  IndirectBr);
   INSTKEYWORD(invoke,      Invoke);
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp
index 92fb0a1f6..9120695a1 100644
--- a/llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -2185,8 +2185,10 @@ int TargetLoweringBase::InstructionOpcodeToISD(unsigned Opcode) const {
   };
   switch (static_cast<InstructionOpcodes>(Opcode)) {
   case Ret:            return 0;
-  case UncondBr:       return 0;
-  case CondBr:         return 0;
+  case UncondBr:
+    return 0;
+  case CondBr:
+    return 0;
   case Switch:         return 0;
   case IndirectBr:     return 0;
   case Invoke:         return 0;
diff --git a/llvm/lib/IR/Instruction.cpp b/llvm/lib/IR/Instruction.cpp
index e32452829..1f781c73d 100644
--- a/llvm/lib/IR/Instruction.cpp
+++ b/llvm/lib/IR/Instruction.cpp
@@ -797,8 +797,10 @@ const char *Instruction::getOpcodeName(unsigned OpCode) {
   switch (OpCode) {
   // Terminators
   case Ret:    return "ret";
-  case UncondBr: return "br";
-  case CondBr: return "br";
+  case UncondBr:
+    return "br";
+  case CondBr:
+    return "br";
   case Switch: return "switch";
   case IndirectBr: return "indirectbr";
   case Invoke: return "invoke";
diff --git a/llvm/unittests/Analysis/IR2VecTest.cpp b/llvm/unittests/Analysis/IR2VecTest.cpp
index 694d04b22..04994bcdc 100644
--- a/llvm/unittests/Analysis/IR2VecTest.cpp
+++ b/llvm/unittests/Analysis/IR2VecTest.cpp
@@ -1040,75 +1040,29 @@ protected:
     std::string JSON = "{\n  \"Opcodes\": {\n";
 
     // Add all required opcodes
-    const char *Opcodes[] = {"Ret",
-                             "UncondBr",
-                             "CondBr",
-                             "Switch",
-                             "IndirectBr",
-                             "Invoke",
-                             "Resume",
-                             "Unreachable",
-                             "CleanupRet",
-                             "CatchRet",
-                             "CatchSwitch",
-                             "CallBr",
-                             "FNeg",
-                             "Add",
-                             "FAdd",
-                             "Sub",
-                             "FSub",
-                             "Mul",
-                             "FMul",
-                             "UDiv",
-                             "SDiv",
-                             "FDiv",
-                             "URem",
-                             "SRem",
-                             "FRem",
-                             "Shl",
-                             "LShr",
-                             "AShr",
-                             "And",
-                             "Or",
-                             "Xor",
-                             "Alloca",
-                             "Load",
-                             "Store",
-                             "GetElementPtr",
-                             "Fence",
-                             "AtomicCmpXchg",
-                             "AtomicRMW",
-                             "Trunc",
-                             "ZExt",
-                             "SExt",
-                             "FPToUI",
-                             "FPToSI",
-                             "UIToFP",
-                             "SIToFP",
-                             "FPTrunc",
-                             "FPExt",
-                             "PtrToInt",
-                             "IntToPtr",
-                             "BitCast",
-                             "AddrSpaceCast",
-                             "ICmp",
-                             "FCmp",
-                             "PHI",
-                             "Call",
-                             "Select",
-                             "UserOp1",
-                             "UserOp2",
-                             "VAArg",
-                             "ExtractElement",
-                             "InsertElement",
-                             "ShuffleVector",
-                             "ExtractValue",
-                             "InsertValue",
-                             "LandingPad",
-                             "Freeze",
-                             "PtrToAddr",
-                             "AddrToPtr",
-                             "CleanupPad",
+    const char *Opcodes[] = {"Ret",           "UncondBr",      "CondBr",
+                             "Switch",        "IndirectBr",    "Invoke",
+                             "Resume",        "Unreachable",   "CleanupRet",
+                             "CatchRet",      "CatchSwitch",   "CallBr",
+                             "FNeg",          "Add",           "FAdd",
+                             "Sub",           "FSub",          "Mul",
+                             "FMul",          "UDiv",          "SDiv",
+                             "FDiv",          "URem",          "SRem",
+                             "FRem",          "Shl",           "LShr",
+                             "AShr",          "And",           "Or",
+                             "Xor",           "Alloca",        "Load",
+                             "Store",         "GetElementPtr", "Fence",
+                             "AtomicCmpXchg", "AtomicRMW",     "Trunc",
+                             "ZExt",          "SExt",          "FPToUI",
+                             "FPToSI",        "UIToFP",        "SIToFP",
+                             "FPTrunc",       "FPExt",         "PtrToInt",
+                             "IntToPtr",      "BitCast",       "AddrSpaceCast",
+                             "ICmp",          "FCmp",          "PHI",
+                             "Call",          "Select",        "UserOp1",
+                             "UserOp2",       "VAArg",         "ExtractElement",
+                             "InsertElement", "ShuffleVector", "ExtractValue",
+                             "InsertValue",   "LandingPad",    "Freeze",
+                             "PtrToAddr",     "AddrToPtr",     "CleanupPad",
                              "CatchPad"};
 
     bool First = true;

``````````

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https://github.com/llvm/llvm-project/pull/184027


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