[llvm] [TableGen] Complete the support for artificial registers (PR #183371)

Mikael Holmen via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 5 00:15:13 PST 2026


mikaelholmen wrote:

> Hi,
> 
> When I try to build with EXPENSIVE_CHECKS on trunk now, I get this:
> 
> 
> I haven't bisected to a specific commit, I just looked through the commit range where this started happening and saw this PR. Do you think the above might be related to this patch?

My AI assistant says the following about the EXPENSIVE_CHECKS problem:
```The problem is in commit 21c1ba16edc0 [TableGen] Complete the support for artificial registers.

Issue: In inferMatchingSuperRegClass(), the SubRegs vector is built by iterating over RC->getMembers() 
and skipping artificial registers (line 2465-2466 adds if (Super->Artificial) continue;). However, when
later zipping SubRegs with RC->getMembers() at line 2484, the full member list (including artificial 
registers) is used. This causes a size mismatch - SubRegs has fewer elements than RC->getMembers() when
artificial registers are present, leading to a past-the-end iterator dereference in zip_equal().

The same filtering pattern that was correctly applied in inferSubClassWithSubReg() (lines 2510-2518 in 
the diff) was not applied to the corresponding code in inferMatchingSuperRegClass().
```
I have no idea if this makes sense or if it's hallucinating, so ignore if it looks like rubbish.

https://github.com/llvm/llvm-project/pull/183371


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