[llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)

[David Sherwood via llvm-commits]

================
@@ -67,6 +67,29 @@ define <vscale x 2 x double> @test_pow_nxv2f64_075(<vscale x 2 x double> %x) nou
 ; ARMPL-NEXT:    fsqrt z1.d, p0/m, z0.d
 ; ARMPL-NEXT:    fmul z0.d, z0.d, z1.d
 ; ARMPL-NEXT:    ret
-  %result = call fast <vscale x 2 x double> @llvm.pow.nxv2f64(<vscale x 2 x double> %x, <vscale x 2 x double> splat (double 7.5e-01))
+  %result = call ninf afn <vscale x 2 x double> @llvm.pow.nxv2f64(<vscale x 2 x double> %x, <vscale x 2 x double> splat (double 7.5e-01))
   ret <vscale x 2 x double> %result
 }
+
+define <4 x float> @test_pow_one_third_v4f32(<4 x float> %x) nounwind {
----------------
david-arm wrote:

Done

https://github.com/llvm/llvm-project/pull/183750