[llvm] 727ace5 - [AArch64][Thumb2] Add missing select FMF in tests
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 6 06:37:17 PST 2026
Author: Nikita Popov
Date: 2026-03-06T15:37:03+01:00
New Revision: 727ace51bc4227d112a8566072210cfe2593c404
URL: https://github.com/llvm/llvm-project/commit/727ace51bc4227d112a8566072210cfe2593c404
DIFF: https://github.com/llvm/llvm-project/commit/727ace51bc4227d112a8566072210cfe2593c404.diff
LOG: [AArch64][Thumb2] Add missing select FMF in tests
These currently have the "fast" flag on the fcmp, but not the
select. The transform actually needs it (or more specifically the
nsz flag) to be on the select for correctness, but due to an
implementation bug it's currently accepted on the fcmp as well.
I don't believe the intent of any of these tests is to test
specifically the "fast fcmp with non-fast select" situation,
so add the missing flag to the select instructions.
Added:
Modified:
llvm/test/CodeGen/AArch64/sve-pred-selectop.ll
llvm/test/CodeGen/Thumb2/mve-minmax.ll
llvm/test/CodeGen/Thumb2/mve-pred-selectop.ll
llvm/test/CodeGen/Thumb2/mve-pred-selectop2.ll
llvm/test/CodeGen/Thumb2/mve-pred-selectop3.ll
llvm/test/CodeGen/Thumb2/mve-vecreduce-fminmax.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/sve-pred-selectop.ll b/llvm/test/CodeGen/AArch64/sve-pred-selectop.ll
index 9a78726c450d1..2b869c386993d 100644
--- a/llvm/test/CodeGen/AArch64/sve-pred-selectop.ll
+++ b/llvm/test/CodeGen/AArch64/sve-pred-selectop.ll
@@ -660,7 +660,7 @@ define <vscale x 4 x float> @fcmp_fast_olt_v4f32(<vscale x 4 x float> %z, <vscal
entry:
%c = fcmp oeq <vscale x 4 x float> %z, zeroinitializer
%a1 = fcmp fast olt <vscale x 4 x float> %x, %y
- %a = select <vscale x 4 x i1> %a1, <vscale x 4 x float> %x, <vscale x 4 x float> %y
+ %a = select fast <vscale x 4 x i1> %a1, <vscale x 4 x float> %x, <vscale x 4 x float> %y
%b = select <vscale x 4 x i1> %c, <vscale x 4 x float> %a, <vscale x 4 x float> %z
ret <vscale x 4 x float> %b
}
@@ -676,7 +676,7 @@ define <vscale x 8 x half> @fcmp_fast_olt_v8f16(<vscale x 8 x half> %z, <vscale
entry:
%c = fcmp oeq <vscale x 8 x half> %z, zeroinitializer
%a1 = fcmp fast olt <vscale x 8 x half> %x, %y
- %a = select <vscale x 8 x i1> %a1, <vscale x 8 x half> %x, <vscale x 8 x half> %y
+ %a = select fast <vscale x 8 x i1> %a1, <vscale x 8 x half> %x, <vscale x 8 x half> %y
%b = select <vscale x 8 x i1> %c, <vscale x 8 x half> %a, <vscale x 8 x half> %z
ret <vscale x 8 x half> %b
}
@@ -692,7 +692,7 @@ define <vscale x 4 x float> @fcmp_fast_ogt_v4f32(<vscale x 4 x float> %z, <vscal
entry:
%c = fcmp oeq <vscale x 4 x float> %z, zeroinitializer
%a1 = fcmp fast ogt <vscale x 4 x float> %x, %y
- %a = select <vscale x 4 x i1> %a1, <vscale x 4 x float> %x, <vscale x 4 x float> %y
+ %a = select fast <vscale x 4 x i1> %a1, <vscale x 4 x float> %x, <vscale x 4 x float> %y
%b = select <vscale x 4 x i1> %c, <vscale x 4 x float> %a, <vscale x 4 x float> %z
ret <vscale x 4 x float> %b
}
@@ -708,7 +708,7 @@ define <vscale x 8 x half> @fcmp_fast_ogt_v8f16(<vscale x 8 x half> %z, <vscale
entry:
%c = fcmp oeq <vscale x 8 x half> %z, zeroinitializer
%a1 = fcmp fast ogt <vscale x 8 x half> %x, %y
- %a = select <vscale x 8 x i1> %a1, <vscale x 8 x half> %x, <vscale x 8 x half> %y
+ %a = select fast <vscale x 8 x i1> %a1, <vscale x 8 x half> %x, <vscale x 8 x half> %y
%b = select <vscale x 8 x i1> %c, <vscale x 8 x half> %a, <vscale x 8 x half> %z
ret <vscale x 8 x half> %b
}
diff --git a/llvm/test/CodeGen/Thumb2/mve-minmax.ll b/llvm/test/CodeGen/Thumb2/mve-minmax.ll
index d536e6b72ac9c..cb81fb583b0fc 100644
--- a/llvm/test/CodeGen/Thumb2/mve-minmax.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-minmax.ll
@@ -259,7 +259,7 @@ define arm_aapcs_vfpcc <4 x float> @maxnm_float32_t(<4 x float> %src1, <4 x floa
; CHECK-MVEFP-NEXT: bx lr
entry:
%cmp = fcmp fast ogt <4 x float> %src2, %src1
- %0 = select <4 x i1> %cmp, <4 x float> %src2, <4 x float> %src1
+ %0 = select fast <4 x i1> %cmp, <4 x float> %src2, <4 x float> %src1
ret <4 x float> %0
}
@@ -294,7 +294,7 @@ define arm_aapcs_vfpcc <8 x half> @minnm_float16_t(<8 x half> %src1, <8 x half>
; CHECK-MVEFP-NEXT: bx lr
entry:
%cmp = fcmp fast ogt <8 x half> %src2, %src1
- %0 = select <8 x i1> %cmp, <8 x half> %src1, <8 x half> %src2
+ %0 = select fast <8 x i1> %cmp, <8 x half> %src1, <8 x half> %src2
ret <8 x half> %0
}
@@ -327,6 +327,6 @@ define arm_aapcs_vfpcc <2 x double> @maxnm_float64_t(<2 x double> %src1, <2 x do
; CHECK-NEXT: pop {r4, pc}
entry:
%cmp = fcmp fast ogt <2 x double> %src2, %src1
- %0 = select <2 x i1> %cmp, <2 x double> %src2, <2 x double> %src1
+ %0 = select fast <2 x i1> %cmp, <2 x double> %src2, <2 x double> %src1
ret <2 x double> %0
}
diff --git a/llvm/test/CodeGen/Thumb2/mve-pred-selectop.ll b/llvm/test/CodeGen/Thumb2/mve-pred-selectop.ll
index eeb1d0d1e7dbc..84d3d8469a015 100644
--- a/llvm/test/CodeGen/Thumb2/mve-pred-selectop.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-pred-selectop.ll
@@ -747,7 +747,7 @@ define arm_aapcs_vfpcc <4 x float> @fcmp_fast_olt_v4f32(<4 x float> %z, <4 x flo
entry:
%c = fcmp oeq <4 x float> %z, zeroinitializer
%a1 = fcmp fast olt <4 x float> %x, %y
- %a = select <4 x i1> %a1, <4 x float> %x, <4 x float> %y
+ %a = select fast <4 x i1> %a1, <4 x float> %x, <4 x float> %y
%b = select <4 x i1> %c, <4 x float> %a, <4 x float> %z
ret <4 x float> %b
}
@@ -761,7 +761,7 @@ define arm_aapcs_vfpcc <8 x half> @fcmp_fast_olt_v8f16(<8 x half> %z, <8 x half>
entry:
%c = fcmp oeq <8 x half> %z, zeroinitializer
%a1 = fcmp fast olt <8 x half> %x, %y
- %a = select <8 x i1> %a1, <8 x half> %x, <8 x half> %y
+ %a = select fast <8 x i1> %a1, <8 x half> %x, <8 x half> %y
%b = select <8 x i1> %c, <8 x half> %a, <8 x half> %z
ret <8 x half> %b
}
@@ -775,7 +775,7 @@ define arm_aapcs_vfpcc <4 x float> @fcmp_fast_ogt_v4f32(<4 x float> %z, <4 x flo
entry:
%c = fcmp oeq <4 x float> %z, zeroinitializer
%a1 = fcmp fast ogt <4 x float> %x, %y
- %a = select <4 x i1> %a1, <4 x float> %x, <4 x float> %y
+ %a = select fast <4 x i1> %a1, <4 x float> %x, <4 x float> %y
%b = select <4 x i1> %c, <4 x float> %a, <4 x float> %z
ret <4 x float> %b
}
@@ -789,7 +789,7 @@ define arm_aapcs_vfpcc <8 x half> @fcmp_fast_ogt_v8f16(<8 x half> %z, <8 x half>
entry:
%c = fcmp oeq <8 x half> %z, zeroinitializer
%a1 = fcmp fast ogt <8 x half> %x, %y
- %a = select <8 x i1> %a1, <8 x half> %x, <8 x half> %y
+ %a = select fast <8 x i1> %a1, <8 x half> %x, <8 x half> %y
%b = select <8 x i1> %c, <8 x half> %a, <8 x half> %z
ret <8 x half> %b
}
diff --git a/llvm/test/CodeGen/Thumb2/mve-pred-selectop2.ll b/llvm/test/CodeGen/Thumb2/mve-pred-selectop2.ll
index de7af894bd4fb..d6440a97d6207 100644
--- a/llvm/test/CodeGen/Thumb2/mve-pred-selectop2.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-pred-selectop2.ll
@@ -859,7 +859,7 @@ define arm_aapcs_vfpcc <4 x float> @fcmp_fast_olt_v4f32_x(<4 x float> %x, <4 x f
entry:
%c = call <4 x i1> @llvm.arm.mve.vctp32(i32 %n)
%a1 = fcmp fast olt <4 x float> %x, %y
- %a = select <4 x i1> %a1, <4 x float> %x, <4 x float> %y
+ %a = select fast <4 x i1> %a1, <4 x float> %x, <4 x float> %y
%b = select <4 x i1> %c, <4 x float> %a, <4 x float> %x
ret <4 x float> %b
}
@@ -874,7 +874,7 @@ define arm_aapcs_vfpcc <8 x half> @fcmp_fast_olt_v8f16_x(<8 x half> %x, <8 x hal
entry:
%c = call <8 x i1> @llvm.arm.mve.vctp16(i32 %n)
%a1 = fcmp fast olt <8 x half> %x, %y
- %a = select <8 x i1> %a1, <8 x half> %x, <8 x half> %y
+ %a = select fast <8 x i1> %a1, <8 x half> %x, <8 x half> %y
%b = select <8 x i1> %c, <8 x half> %a, <8 x half> %x
ret <8 x half> %b
}
@@ -889,7 +889,7 @@ define arm_aapcs_vfpcc <4 x float> @fcmp_fast_ogt_v4f32_x(<4 x float> %x, <4 x f
entry:
%c = call <4 x i1> @llvm.arm.mve.vctp32(i32 %n)
%a1 = fcmp fast ogt <4 x float> %x, %y
- %a = select <4 x i1> %a1, <4 x float> %x, <4 x float> %y
+ %a = select fast <4 x i1> %a1, <4 x float> %x, <4 x float> %y
%b = select <4 x i1> %c, <4 x float> %a, <4 x float> %x
ret <4 x float> %b
}
@@ -904,7 +904,7 @@ define arm_aapcs_vfpcc <8 x half> @fcmp_fast_ogt_v8f16_x(<8 x half> %x, <8 x hal
entry:
%c = call <8 x i1> @llvm.arm.mve.vctp16(i32 %n)
%a1 = fcmp fast ogt <8 x half> %x, %y
- %a = select <8 x i1> %a1, <8 x half> %x, <8 x half> %y
+ %a = select fast <8 x i1> %a1, <8 x half> %x, <8 x half> %y
%b = select <8 x i1> %c, <8 x half> %a, <8 x half> %x
ret <8 x half> %b
}
@@ -2435,7 +2435,7 @@ define arm_aapcs_vfpcc <4 x float> @fcmp_fast_olt_v4f32_y(<4 x float> %x, <4 x f
entry:
%c = call <4 x i1> @llvm.arm.mve.vctp32(i32 %n)
%a1 = fcmp fast olt <4 x float> %x, %y
- %a = select <4 x i1> %a1, <4 x float> %x, <4 x float> %y
+ %a = select fast <4 x i1> %a1, <4 x float> %x, <4 x float> %y
%b = select <4 x i1> %c, <4 x float> %a, <4 x float> %y
ret <4 x float> %b
}
@@ -2451,7 +2451,7 @@ define arm_aapcs_vfpcc <8 x half> @fcmp_fast_olt_v8f16_y(<8 x half> %x, <8 x hal
entry:
%c = call <8 x i1> @llvm.arm.mve.vctp16(i32 %n)
%a1 = fcmp fast olt <8 x half> %x, %y
- %a = select <8 x i1> %a1, <8 x half> %x, <8 x half> %y
+ %a = select fast <8 x i1> %a1, <8 x half> %x, <8 x half> %y
%b = select <8 x i1> %c, <8 x half> %a, <8 x half> %y
ret <8 x half> %b
}
@@ -2467,7 +2467,7 @@ define arm_aapcs_vfpcc <4 x float> @fcmp_fast_ogt_v4f32_y(<4 x float> %x, <4 x f
entry:
%c = call <4 x i1> @llvm.arm.mve.vctp32(i32 %n)
%a1 = fcmp fast ogt <4 x float> %x, %y
- %a = select <4 x i1> %a1, <4 x float> %x, <4 x float> %y
+ %a = select fast <4 x i1> %a1, <4 x float> %x, <4 x float> %y
%b = select <4 x i1> %c, <4 x float> %a, <4 x float> %y
ret <4 x float> %b
}
@@ -2483,7 +2483,7 @@ define arm_aapcs_vfpcc <8 x half> @fcmp_fast_ogt_v8f16_y(<8 x half> %x, <8 x hal
entry:
%c = call <8 x i1> @llvm.arm.mve.vctp16(i32 %n)
%a1 = fcmp fast ogt <8 x half> %x, %y
- %a = select <8 x i1> %a1, <8 x half> %x, <8 x half> %y
+ %a = select fast <8 x i1> %a1, <8 x half> %x, <8 x half> %y
%b = select <8 x i1> %c, <8 x half> %a, <8 x half> %y
ret <8 x half> %b
}
diff --git a/llvm/test/CodeGen/Thumb2/mve-pred-selectop3.ll b/llvm/test/CodeGen/Thumb2/mve-pred-selectop3.ll
index 080c6c1a1efdc..fda6c3959a389 100644
--- a/llvm/test/CodeGen/Thumb2/mve-pred-selectop3.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-pred-selectop3.ll
@@ -913,7 +913,7 @@ define arm_aapcs_vfpcc <4 x float> @fcmp_fast_olt_v4f32_x(<4 x float> %x, <4 x f
entry:
%c = call <4 x i1> @llvm.arm.mve.vctp32(i32 %n)
%a1 = fcmp fast olt <4 x float> %x, %y
- %a = select <4 x i1> %a1, <4 x float> %x, <4 x float> %y
+ %a = select fast <4 x i1> %a1, <4 x float> %x, <4 x float> %y
%b = select <4 x i1> %c, <4 x float> %a, <4 x float> %x
ret <4 x float> %b
}
@@ -928,7 +928,7 @@ define arm_aapcs_vfpcc <8 x half> @fcmp_fast_olt_v8f16_x(<8 x half> %x, <8 x hal
entry:
%c = call <8 x i1> @llvm.arm.mve.vctp16(i32 %n)
%a1 = fcmp fast olt <8 x half> %x, %y
- %a = select <8 x i1> %a1, <8 x half> %x, <8 x half> %y
+ %a = select fast <8 x i1> %a1, <8 x half> %x, <8 x half> %y
%b = select <8 x i1> %c, <8 x half> %a, <8 x half> %x
ret <8 x half> %b
}
@@ -943,7 +943,7 @@ define arm_aapcs_vfpcc <4 x float> @fcmp_fast_ogt_v4f32_x(<4 x float> %x, <4 x f
entry:
%c = call <4 x i1> @llvm.arm.mve.vctp32(i32 %n)
%a1 = fcmp fast ogt <4 x float> %x, %y
- %a = select <4 x i1> %a1, <4 x float> %x, <4 x float> %y
+ %a = select fast <4 x i1> %a1, <4 x float> %x, <4 x float> %y
%b = select <4 x i1> %c, <4 x float> %a, <4 x float> %x
ret <4 x float> %b
}
@@ -958,7 +958,7 @@ define arm_aapcs_vfpcc <8 x half> @fcmp_fast_ogt_v8f16_x(<8 x half> %x, <8 x hal
entry:
%c = call <8 x i1> @llvm.arm.mve.vctp16(i32 %n)
%a1 = fcmp fast ogt <8 x half> %x, %y
- %a = select <8 x i1> %a1, <8 x half> %x, <8 x half> %y
+ %a = select fast <8 x i1> %a1, <8 x half> %x, <8 x half> %y
%b = select <8 x i1> %c, <8 x half> %a, <8 x half> %x
ret <8 x half> %b
}
diff --git a/llvm/test/CodeGen/Thumb2/mve-vecreduce-fminmax.ll b/llvm/test/CodeGen/Thumb2/mve-vecreduce-fminmax.ll
index be737961e3ae7..b8b9230f4c7fa 100644
--- a/llvm/test/CodeGen/Thumb2/mve-vecreduce-fminmax.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-vecreduce-fminmax.ll
@@ -372,7 +372,7 @@ define arm_aapcs_vfpcc float @fmin_v2f32_acc(<2 x float> %x, float %y) {
entry:
%z = call fast float @llvm.vector.reduce.fmin.v2f32(<2 x float> %x)
%c = fcmp fast olt float %y, %z
- %r = select i1 %c, float %y, float %z
+ %r = select fast i1 %c, float %y, float %z
ret float %r
}
@@ -395,7 +395,7 @@ define arm_aapcs_vfpcc float @fmin_v4f32_acc(<4 x float> %x, float %y) {
entry:
%z = call fast float @llvm.vector.reduce.fmin.v4f32(<4 x float> %x)
%c = fcmp fast olt float %y, %z
- %r = select i1 %c, float %y, float %z
+ %r = select fast i1 %c, float %y, float %z
ret float %r
}
@@ -423,7 +423,7 @@ define arm_aapcs_vfpcc float @fmin_v8f32_acc(<8 x float> %x, float %y) {
entry:
%z = call fast float @llvm.vector.reduce.fmin.v8f32(<8 x float> %x)
%c = fcmp fast olt float %y, %z
- %r = select i1 %c, float %y, float %z
+ %r = select fast i1 %c, float %y, float %z
ret float %r
}
@@ -450,7 +450,7 @@ define arm_aapcs_vfpcc half @fmin_v4f16_acc(<4 x half> %x, half %y) {
entry:
%z = call fast half @llvm.vector.reduce.fmin.v4f16(<4 x half> %x)
%c = fcmp fast olt half %y, %z
- %r = select i1 %c, half %y, half %z
+ %r = select fast i1 %c, half %y, half %z
ret half %r
}
@@ -464,7 +464,7 @@ define arm_aapcs_vfpcc half @fmin_v2f16_acc(<2 x half> %x, half %y) {
entry:
%z = call fast half @llvm.vector.reduce.fmin.v2f16(<2 x half> %x)
%c = fcmp fast olt half %y, %z
- %r = select i1 %c, half %y, half %z
+ %r = select fast i1 %c, half %y, half %z
ret half %r
}
@@ -497,7 +497,7 @@ define arm_aapcs_vfpcc half @fmin_v8f16_acc(<8 x half> %x, half %y) {
entry:
%z = call fast half @llvm.vector.reduce.fmin.v8f16(<8 x half> %x)
%c = fcmp fast olt half %y, %z
- %r = select i1 %c, half %y, half %z
+ %r = select fast i1 %c, half %y, half %z
ret half %r
}
@@ -543,7 +543,7 @@ define arm_aapcs_vfpcc half @fmin_v16f16_acc(<16 x half> %x, half %y) {
entry:
%z = call fast half @llvm.vector.reduce.fmin.v16f16(<16 x half> %x)
%c = fcmp fast olt half %y, %z
- %r = select i1 %c, half %y, half %z
+ %r = select fast i1 %c, half %y, half %z
ret half %r
}
@@ -555,7 +555,7 @@ define arm_aapcs_vfpcc double @fmin_v1f64_acc(<1 x double> %x, double %y) {
entry:
%z = call fast double @llvm.vector.reduce.fmin.v1f64(<1 x double> %x)
%c = fcmp fast olt double %y, %z
- %r = select i1 %c, double %y, double %z
+ %r = select fast i1 %c, double %y, double %z
ret double %r
}
@@ -568,7 +568,7 @@ define arm_aapcs_vfpcc double @fmin_v2f64_acc(<2 x double> %x, double %y) {
entry:
%z = call fast double @llvm.vector.reduce.fmin.v2f64(<2 x double> %x)
%c = fcmp fast olt double %y, %z
- %r = select i1 %c, double %y, double %z
+ %r = select fast i1 %c, double %y, double %z
ret double %r
}
@@ -587,7 +587,7 @@ define arm_aapcs_vfpcc double @fmin_v4f64_acc(<4 x double> %x, double %y) {
entry:
%z = call fast double @llvm.vector.reduce.fmin.v4f64(<4 x double> %x)
%c = fcmp fast olt double %y, %z
- %r = select i1 %c, double %y, double %z
+ %r = select fast i1 %c, double %y, double %z
ret double %r
}
@@ -1198,7 +1198,7 @@ define arm_aapcs_vfpcc float @fmax_v2f32_acc(<2 x float> %x, float %y) {
entry:
%z = call fast float @llvm.vector.reduce.fmax.v2f32(<2 x float> %x)
%c = fcmp fast ogt float %y, %z
- %r = select i1 %c, float %y, float %z
+ %r = select fast i1 %c, float %y, float %z
ret float %r
}
@@ -1221,7 +1221,7 @@ define arm_aapcs_vfpcc float @fmax_v4f32_acc(<4 x float> %x, float %y) {
entry:
%z = call fast float @llvm.vector.reduce.fmax.v4f32(<4 x float> %x)
%c = fcmp fast ogt float %y, %z
- %r = select i1 %c, float %y, float %z
+ %r = select fast i1 %c, float %y, float %z
ret float %r
}
@@ -1249,7 +1249,7 @@ define arm_aapcs_vfpcc float @fmax_v8f32_acc(<8 x float> %x, float %y) {
entry:
%z = call fast float @llvm.vector.reduce.fmax.v8f32(<8 x float> %x)
%c = fcmp fast ogt float %y, %z
- %r = select i1 %c, float %y, float %z
+ %r = select fast i1 %c, float %y, float %z
ret float %r
}
@@ -1263,7 +1263,7 @@ define arm_aapcs_vfpcc half @fmax_v2f16_acc(<2 x half> %x, half %y) {
entry:
%z = call fast half @llvm.vector.reduce.fmax.v2f16(<2 x half> %x)
%c = fcmp fast ogt half %y, %z
- %r = select i1 %c, half %y, half %z
+ %r = select fast i1 %c, half %y, half %z
ret half %r
}
@@ -1290,7 +1290,7 @@ define arm_aapcs_vfpcc half @fmax_v4f16_acc(<4 x half> %x, half %y) {
entry:
%z = call fast half @llvm.vector.reduce.fmax.v4f16(<4 x half> %x)
%c = fcmp fast ogt half %y, %z
- %r = select i1 %c, half %y, half %z
+ %r = select fast i1 %c, half %y, half %z
ret half %r
}
@@ -1323,7 +1323,7 @@ define arm_aapcs_vfpcc half @fmax_v8f16_acc(<8 x half> %x, half %y) {
entry:
%z = call fast half @llvm.vector.reduce.fmax.v8f16(<8 x half> %x)
%c = fcmp fast ogt half %y, %z
- %r = select i1 %c, half %y, half %z
+ %r = select fast i1 %c, half %y, half %z
ret half %r
}
@@ -1369,7 +1369,7 @@ define arm_aapcs_vfpcc half @fmax_v16f16_acc(<16 x half> %x, half %y) {
entry:
%z = call fast half @llvm.vector.reduce.fmax.v16f16(<16 x half> %x)
%c = fcmp fast ogt half %y, %z
- %r = select i1 %c, half %y, half %z
+ %r = select fast i1 %c, half %y, half %z
ret half %r
}
@@ -1381,7 +1381,7 @@ define arm_aapcs_vfpcc double @fmax_v1f64_acc(<1 x double> %x, double %y) {
entry:
%z = call fast double @llvm.vector.reduce.fmax.v1f64(<1 x double> %x)
%c = fcmp fast ogt double %y, %z
- %r = select i1 %c, double %y, double %z
+ %r = select fast i1 %c, double %y, double %z
ret double %r
}
@@ -1394,7 +1394,7 @@ define arm_aapcs_vfpcc double @fmax_v2f64_acc(<2 x double> %x, double %y) {
entry:
%z = call fast double @llvm.vector.reduce.fmax.v2f64(<2 x double> %x)
%c = fcmp fast ogt double %y, %z
- %r = select i1 %c, double %y, double %z
+ %r = select fast i1 %c, double %y, double %z
ret double %r
}
@@ -1413,7 +1413,7 @@ define arm_aapcs_vfpcc double @fmax_v4f64_acc(<4 x double> %x, double %y) {
entry:
%z = call fast double @llvm.vector.reduce.fmax.v4f64(<4 x double> %x)
%c = fcmp fast ogt double %y, %z
- %r = select i1 %c, double %y, double %z
+ %r = select fast i1 %c, double %y, double %z
ret double %r
}
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