[llvm] [AMDGPU] Shrink S_MOV_B64 to S_MOV_B32 during rematerialization (PR #184333)

[Matt Arsenault via llvm-commits]

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@@ -2617,6 +2617,78 @@ void SIInstrInfo::reMaterialize(MachineBasicBlock &MBB,
   // TODO: Handle more cases.
   unsigned Opcode = Orig.getOpcode();
   switch (Opcode) {
+  case AMDGPU::S_MOV_B64:
+  case AMDGPU::S_MOV_B64_IMM_PSEUDO: {
+    if (SubIdx != 0)
+      break;
+
+    if (I == MBB.end())
+      break;
+
+    if (I->isBundled())
+      break;
+
+    if (!Orig.getOperand(1).isImm())
+      break;
+
+    // Shrink S_MOV_B64 to S_MOV_B32 when the use at the insertion point
+    // only needs a single 32-bit subreg of the defined value.
+
+    // Scan all uses of the original register from the insertion point
+    // and verify that all uses in the same live range read the same lane.
+    // Stop at a def of RegToFind since that starts a new live
+    // range whose uses won't be rewritten to our DestReg.
+    Register RegToFind = Orig.getOperand(0).getReg();
+    unsigned UseSubReg = AMDGPU::NoSubRegister;
+
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arsenm wrote:

This code shouldn't really need to scan the use context 

https://github.com/llvm/llvm-project/pull/184333