[llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)

[Jay Foad via llvm-commits]

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@@ -17,11 +17,11 @@ define arm_aapcscc void @g() {
 ; CHECK-NEXT:    ldr r0, [r1, r0, lsl #3]!
 ; CHECK-NEXT:    moveq r0, #0
 ; CHECK-NEXT:    cmp r2, #0
+; CHECK-NEXT:    ldr r1, [r1, #4]
----------------
jayfoad wrote:

After this patch machine-sink refuses to sink this LDR past the Bcc because the Bcc has side effects:
```
  %1:gpr = LDRi12 killed %6:gpr, 4, 14, $noreg :: (invariant load (s32) from %ir.d)
  %7:gpr = MOVi 0, 14, $noreg, $noreg
  CMPri %7:gpr, 0, 14, $noreg, implicit-def $cpsr
  Bcc %bb.2, 1, $cpsr
```

https://github.com/llvm/llvm-project/pull/182000