[llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)

[via llvm-commits]

https://github.com/joshua-arch1 updated https://github.com/llvm/llvm-project/pull/184569

>From 892a94e0321647a2de33a0790cd21bc5abd49c5d Mon Sep 17 00:00:00 2001
From: joshua-arch1 <cooper.joshua at linux.alibaba.com>
Date: Wed, 4 Mar 2026 19:28:38 +0800
Subject: [PATCH] [RISCV] Add register overlap checks to the assembler for
 vector indexed segment load

---
 llvm/lib/Target/RISCV/RISCVInstrInfoV.td |  2 +
 llvm/test/MC/RISCV/rvv/zvlsseg-invalid.s | 66 ++++++++++++++++++++++++
 2 files changed, 68 insertions(+)
 create mode 100644 llvm/test/MC/RISCV/rvv/zvlsseg-invalid.s

diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoV.td b/llvm/lib/Target/RISCV/RISCVInstrInfoV.td
index bb8d26662ae4e..2426a3858d154 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoV.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoV.td
@@ -409,6 +409,7 @@ class VStridedSegmentLoad<int nfields, RISCVWidth width, string opcodestr>
 }
 
 // indexed segment load vd, (rs1), vs2, vm
+let VS1VS2Constraint = VS1Constraint in {
 class VIndexedSegmentLoad<int nfields, RISCVMOP mop, RISCVWidth width,
                           string opcodestr>
     : RVInstVLX<!sub(nfields, 1), width, mop, (outs VR:$vd),
@@ -416,6 +417,7 @@ class VIndexedSegmentLoad<int nfields, RISCVMOP mop, RISCVWidth width,
                 "$vd, $rs1, $vs2$vm"> {
   assert !and(!ge(nfields, 2), !le(nfields, 8)), "nfields must be 2-8";
 }
+} // VS1VS2Constraint = VS1Constraint 
 } // hasSideEffects = 0, mayLoad = 1, mayStore = 0
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 1 in {
diff --git a/llvm/test/MC/RISCV/rvv/zvlsseg-invalid.s b/llvm/test/MC/RISCV/rvv/zvlsseg-invalid.s
new file mode 100644
index 0000000000000..eceeb12875a7f
--- /dev/null
+++ b/llvm/test/MC/RISCV/rvv/zvlsseg-invalid.s
@@ -0,0 +1,66 @@
+# RUN: not llvm-mc -triple=riscv64 --mattr=+v %s 2>&1 \
+# RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+ 
+vluxseg2ei8.v v8, (a0), v8, v0.t
+# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR-LABEL: vluxseg2ei8.v v8, (a0), v8, v0.t
+ 
+vluxseg2ei8.v v8, (a0), v8
+# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR-LABEL: vluxseg2ei8.v v8, (a0), v8
+ 
+vluxseg2ei16.v v8, (a0), v8, v0.t
+# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR-LABEL: vluxseg2ei16.v v8, (a0), v8, v0.t
+ 
+vluxseg2ei16.v v8, (a0), v8
+# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR-LABEL: vluxseg2ei16.v v8, (a0), v8
+ 
+vluxseg2ei32.v v8, (a0), v8, v0.t
+# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR-LABEL: vluxseg2ei32.v v8, (a0), v8, v0.t
+ 
+vluxseg2ei32.v v8, (a0), v8
+# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR-LABEL: vluxseg2ei32.v v8, (a0), v8
+ 
+vluxseg2ei64.v v8, (a0), v8, v0.t
+# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR-LABEL: vluxseg2ei64.v v8, (a0), v8, v0.t
+ 
+vluxseg2ei64.v v8, (a0), v8
+# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR-LABEL: vluxseg2ei64.v v8, (a0), v8
+ 
+vloxseg2ei8.v v8, (a0), v8, v0.t
+# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR-LABEL: vloxseg2ei8.v v8, (a0), v8, v0.t
+ 
+vloxseg2ei8.v v8, (a0), v8
+# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR-LABEL: vloxseg2ei8.v v8, (a0), v8
+ 
+vloxseg2ei16.v v8, (a0), v8, v0.t
+# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR-LABEL: vloxseg2ei16.v v8, (a0), v8, v0.t
+ 
+vloxseg2ei16.v v8, (a0), v8
+# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR-LABEL: vloxseg2ei16.v v8, (a0), v8
+ 
+vloxseg2ei32.v v8, (a0), v8, v0.t
+# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR-LABEL: vloxseg2ei32.v v8, (a0), v8, v0.t
+ 
+vloxseg2ei32.v v8, (a0), v8
+# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR-LABEL: vloxseg2ei32.v v8, (a0), v8
+ 
+vloxseg2ei64.v v8, (a0), v8, v0.t
+# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR-LABEL: vloxseg2ei64.v v8, (a0), v8, v0.t
+ 
+vloxseg2ei64.v v8, (a0), v8
+# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.
+# CHECK-ERROR-LABEL: vloxseg2ei64.v v8, (a0), v8