[llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)

[Simon Pilgrim via llvm-commits]

================
@@ -1006,3 +1006,75 @@ define i32 @pow2_blsi_sub(i32 %x, i32 %a) {
   %r = and i32 %x_sub_y, %y
   ret i32 %r
 }
+
+define i1 @pow2_rotl_extract_vec(<2 x i32> %a0, i32 %rotamt, i32 %x) {
+; CHECK-LABEL: pow2_rotl_extract_vec:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %edi, %ecx
+; CHECK-NEXT:    pxor %xmm1, %xmm1
+; CHECK-NEXT:    pcmpgtd %xmm0, %xmm1
+; CHECK-NEXT:    movdqa %xmm1, %xmm0
+; CHECK-NEXT:    pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; CHECK-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; CHECK-NEXT:    por %xmm0, %xmm1
+; CHECK-NEXT:    movd %xmm1, %eax
+; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
+; CHECK-NEXT:    roll %cl, %eax
+; CHECK-NEXT:    notl %esi
+; CHECK-NEXT:    testl %esi, %eax
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    retq
+entry:
+  %cmp = icmp sgt <2 x i32> zeroinitializer, %a0
+
+  %powvec = select <2 x i1> %cmp,
+                     <2 x i32> <i32 1024, i32 1024>,
+                     <2 x i32> <i32 4096, i32 4096>
+
+  %base = extractelement <2 x i32> %powvec, i32 0
+
+  %d = call i32 @llvm.fshl.i32(i32 %base,
----------------
RKSimon wrote:

we need to test DemandedElts for the rot - so it has to be performed as a vector:

%d = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %powvec, <4 x i32> %powvec, <4 x i32>%rotamt) 
%elt = extractelement <2 x i32> %d, i32 0
...


same for other test

https://github.com/llvm/llvm-project/pull/182744