[llvm] [Instcombine] Write Instcombine pass to strength reduce lock xadd to lock sub (PR #184715)

Nikita Popov via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 5 06:33:03 PST 2026


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@@ -118,6 +119,17 @@ Instruction *InstCombinerImpl::visitAtomicRMWInst(AtomicRMWInst &RMWI) {
          RMWI.getOrdering() != AtomicOrdering::Unordered &&
          "AtomicRMWs don't make sense with Unordered or NotAtomic");
 
+  // Canonicalize atomicrmw add(ptr, neg(X)) -> atomicrmw sub(ptr, X).
+  // old + (-X) == old - X; the returned old value is identical.
+  // This allows strength reduction on targets where atomic sub is cheaper,
+  // e.g. lock sub instead of lock xadd on x86.
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nikic wrote:

```suggestion
```


https://github.com/llvm/llvm-project/pull/184715


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