[llvm] cd0eb16 - [AArch64] Add maybe_unused to DstTy in assert. NFC

[David Green via llvm-commits]

Author: David Green
Date: 2026-03-02T12:57:49Z
New Revision: cd0eb16a11f8c3102d1fe0d8d135b9f592515ff9

URL: https://github.com/llvm/llvm-project/commit/cd0eb16a11f8c3102d1fe0d8d135b9f592515ff9
DIFF: https://github.com/llvm/llvm-project/commit/cd0eb16a11f8c3102d1fe0d8d135b9f592515ff9.diff

LOG: [AArch64] Add maybe_unused to DstTy in assert. NFC

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
index 4389c9ab55256..03f714cddec83 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
@@ -441,7 +441,7 @@ void AArch64RegisterBankInfo::applyMappingImpl(
   switch (MI.getOpcode()) {
   case TargetOpcode::G_CONSTANT: {
     Register Dst = MI.getOperand(0).getReg();
-    LLT DstTy = MRI.getType(Dst);
+    [[maybe_unused]] LLT DstTy = MRI.getType(Dst);
     assert(MRI.getRegBank(Dst) == &AArch64::GPRRegBank && DstTy.isScalar() &&
            DstTy.getSizeInBits() < 32 &&
            "Expected a scalar smaller than 32 bits on a GPR.");