The Week Of Monday 21 March 2022 Archives by date
Starting: Mon Mar 21 00:17:30 PDT 2022
Ending: Sun Mar 27 23:57:01 PDT 2022
Messages: 2127
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
LiqinWeng via Phabricator via llvm-commits
- [llvm] 9ada761 - [PowerPC][NFC] rename file for PPCCTRLoopsVerify pass.
Chen Zheng via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
Craig Topper via Phabricator via llvm-commits
- [llvm] 819419f - [gn build] Port 9ada761be3b9
LLVM GN Syncbot via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
Ben Shi via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
Ben Shi via Phabricator via llvm-commits
- [PATCH] D121017: [AArch64] Fallback to DWARF when trying to emit compact unwind info with multiple CFA offset adjustments
Dave Green via Phabricator via llvm-commits
- [PATCH] D122042: [VP] Preserve address space of pointer for strided load/store intrinsics.
Simon Moll via Phabricator via llvm-commits
- [PATCH] D121913: [VP] Fix VPintrinsic::getStaticVectorLength for vp.merge|select
Simon Moll via Phabricator via llvm-commits
- [PATCH] D119696: [AMDGPU] Improve v_cmpx usage on GFX10.3.
Thomas Symalla via Phabricator via llvm-commits
- [PATCH] D119696: [AMDGPU] Improve v_cmpx usage on GFX10.3.
Thomas Symalla via Phabricator via llvm-commits
- [llvm] 011c641 - [AMDGPU] Improve v_cmpx usage on GFX10.3.
Thomas Symalla via llvm-commits
- [PATCH] D119696: [AMDGPU] Improve v_cmpx usage on GFX10.3.
Thomas Symalla via Phabricator via llvm-commits
- [llvm] e725e2a - [AMDGPU] [NFC] Fix missing include.
via llvm-commits
- [PATCH] D122082: Add DXIL Bitcode Writer and DXIL testing
Thorsten via Phabricator via llvm-commits
- [llvm] df4da5f - [ADT] Add drop_end.
Marek Kurdej via llvm-commits
- [PATCH] D105207: [debuginfo][lsr] SCEV-based salvaging for LoopStrengthReduction
Chris Jackson via Phabricator via llvm-commits
- [PATCH] D122009: [ADT] Add drop_end.
Marek Kurdej via Phabricator via llvm-commits
- [PATCH] D121785: The [3/3] Fix mangle problem when variable used in inline asm (Support ARR[BaseReg+IndexReg+..] in PIC model)
Xiang Zhang via Phabricator via llvm-commits
- [PATCH] D122082: Add DXIL Bitcode Writer and DXIL testing
Dávid Bolvanský via Phabricator via llvm-commits
- [PATCH] D105207: [debuginfo][lsr] SCEV-based salvaging for LoopStrengthReduction
Chris Jackson via Phabricator via llvm-commits
- [PATCH] D122117: Revert "[AMDGPU] Improve v_cmpx usage on GFX10.3."
Thomas Symalla via Phabricator via llvm-commits
- [PATCH] D120169: [Debuginfo][LSR} Add support for salvaging variadic dbg.value intrinsics [2/2]
Chris Jackson via Phabricator via llvm-commits
- [llvm] 7de6107 - Revert "[AMDGPU] Improve v_cmpx usage on GFX10.3."
Thomas Symalla via llvm-commits
- [PATCH] D122117: Revert "[AMDGPU] Improve v_cmpx usage on GFX10.3."
Thomas Symalla via Phabricator via llvm-commits
- [llvm] d41d798 - [Docs] Fix reference (NFC)
Nikita Popov via llvm-commits
- [llvm] d04d2d4 - [Docs] Update opaque pointers docs (NFC)
Nikita Popov via llvm-commits
- [PATCH] D121707: [llvm][AArch64] Insert "bti j" after call to setjmp
Daniel Kiss via Phabricator via llvm-commits
- [PATCH] D122118: [MachineCopyPropagaion][WIP] Eliminate spillage copies that might caused by eviction chain
Kai Luo via Phabricator via llvm-commits
- [PATCH] D121554: [mlir][OpenMP] Added translation from `omp.atomic.capture` to LLVM IR
Alex Zinenko via Phabricator via llvm-commits
- [PATCH] D122120: [RISCV][NFC] Add common check prefix to reduce duplicate check lines.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D122020: [WebAssembly][WIP] Add tests for the Asm type checker
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D122122: [Docs] Add documentation for ongoing major changes
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D122082: Add DXIL Bitcode Writer and DXIL testing
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D122123: [WebAssembly][NFC] Delete type checking logic for removed ref.null instruction
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D122122: [Docs] Add documentation for ongoing major changes
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D121881: [RISCV][RVV] Select unmasked TU RVV pseudos in a DAG post-process
Fraser Cormack via Phabricator via llvm-commits
- [llvm] 0ebac76 - [LV] Remove unneeded Loop argument from completeLoopSkeleton. (NFCI)
Florian Hahn via llvm-commits
- [PATCH] D109584: [VP] Implementing expansion pass for VP load and store.
Fraser Cormack via Phabricator via llvm-commits
- [PATCH] D121376: [RISCV][RVV] Introduce roundmode operand to PseudoVAADD instruction
ShihPo Hung via Phabricator via llvm-commits
- [PATCH] D122123: [WebAssembly][NFC] Delete type checking logic for removed ref.null instruction
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D122013: [InstCombine] Fold abs of known negative operand when source is sub
Peter Waller via Phabricator via llvm-commits
- [PATCH] D122086: [mlir:PDL] Expand how native constraint/rewrite functions can be defined
Nicolas Vasilache via Phabricator via llvm-commits
- [PATCH] D122122: [Docs] Add documentation for ongoing major changes
Dávid Bolvanský via Phabricator via llvm-commits
- [PATCH] D122042: [VP] Preserve address space of pointer for strided load/store intrinsics.
Simon Moll via Phabricator via llvm-commits
- [PATCH] D118538: [SLP] Schedule only sub-graph of vectorizable instructions
Mikael Holmén via Phabricator via llvm-commits
- [llvm] d8e0a6d - [LowerConstantIntrinsics] Support phi operand in __builtin_object_size folder
via llvm-commits
- [llvm] 39b02d4 - [instcombine] Support and test __builtin_object_size interaction with __strdup and __strndup
via llvm-commits
- [PATCH] D121897: Support phi operand in __builtin_object_size folder
serge via Phabricator via llvm-commits
- [PATCH] D122005: [instcombine] Support and test __builtin_object_size interaction with __strdup and __strndup
serge via Phabricator via llvm-commits
- [PATCH] D122125: [PowerPC] generate CTR loops instructions after ISEL
ChenZheng via Phabricator via llvm-commits
- [PATCH] D121995: [AMDGPU][MC][NFC] Refactored sendmsg(...) handling
Jay Foad via Phabricator via llvm-commits
- [llvm] 65cf643 - [X86] Add (x - y - ((z & m) >> s)) sub -> sbb test case for D122084
Simon Pilgrim via llvm-commits
- [PATCH] D116462: [SPIRV 3/6] Add MC layer, object file support and InstPrinter
Ilia Diachkov via Phabricator via llvm-commits
- [PATCH] D122122: [Docs] Add documentation for ongoing major changes
Dávid Bolvanský via Phabricator via llvm-commits
- [llvm] 423e3ed - [OpenMP][IRBuilder] Fix emitAtomicUpdate conditions
Shraiysh Vaishay via llvm-commits
- [PATCH] D121546: [OpenMP][IRBuilder] Fix emitAtomicUpdate conditions
Shraiysh via Phabricator via llvm-commits
- [llvm] 81569f5 - [X86] combineAddOrSubToADCOrSBB - Fold ADD/SUB + (AND(SRL(X,Y),1) -> ADC/SBB+BT(X,Y)
Simon Pilgrim via llvm-commits
- [PATCH] D122084: [X86] combineAddOrSubToADCOrSBB - Fold ADD/SUB + (AND(SRL(X,Y),1) -> ADC/SBB+BT(X,Y)
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D121554: [mlir][OpenMP] Added translation from `omp.atomic.capture` to LLVM IR
Shraiysh via Phabricator via llvm-commits
- [PATCH] D121707: [llvm][AArch64] Insert "bti j" after call to setjmp
David Spickett via Phabricator via llvm-commits
- [PATCH] D122013: [InstCombine] Fold abs of known negative operand when source is sub
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D118534: [X86] Introduce more common modern tunings into `generic`
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D122013: [InstCombine] Fold abs of known negative operand when source is sub
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D122125: [PowerPC] generate CTR loops instructions after ISEL
ChenZheng via Phabricator via llvm-commits
- [llvm] 31486a9 - [mlir][OpenMP] Added translation from `omp.atomic.capture` to LLVM IR
Shraiysh Vaishay via llvm-commits
- [PATCH] D121554: [mlir][OpenMP] Added translation from `omp.atomic.capture` to LLVM IR
Shraiysh via Phabricator via llvm-commits
- [PATCH] D122013: [InstCombine] Fold abs of known negative operand when source is sub
Peter Waller via Phabricator via llvm-commits
- [llvm] 321d3aa - [AMDGPU] SIInstrInfo::verifyInstruction tweaks. NFCI.
Jay Foad via llvm-commits
- [lld] 1c0234d - [lld-macho][nfc] Have findContainingSubsection take a Section
Jez Ng via llvm-commits
- [lld] a993d60 - [lld-macho][nfc] Add comment explaining why a cast<> is safe
Jez Ng via llvm-commits
- [PATCH] D122118: [MachineCopyPropagation][WIP] Eliminate spillage copies that might caused by eviction chain
Kai Luo via Phabricator via llvm-commits
- [PATCH] D121995: [AMDGPU][MC][NFC] Refactored sendmsg(...) handling
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D70401: [RISCV] Complete RV32E/ilp32e implementation
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D122118: [MachineCopyPropagation][WIP] Eliminate spillage copies that might caused by eviction chain
Kai Luo via Phabricator via llvm-commits
- [PATCH] D122126: [LoopVectorize] Don't interleave when the number of runtime checks exceeds the threshold
Tiehu Zhang via Phabricator via llvm-commits
- [llvm] 692341e - [AMDGPU] Update checks in agpr-copy-propagation.mir
Jay Foad via llvm-commits
- [llvm] 321c8ab - [AMDGPU] Add an agpr copy propagation test
Jay Foad via llvm-commits
- [llvm] 76cbfd9 - [X86] Add nounwind to adc/sbb tests to prevent cfi noise
Simon Pilgrim via llvm-commits
- [PATCH] D121903: [MachineCopyPropagation] More robust isForwardableRegClassCopy
Jay Foad via Phabricator via llvm-commits
- [PATCH] D121903: [MachineCopyPropagation] More robust isForwardableRegClassCopy
Jay Foad via Phabricator via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D121292: [VP] Add vp.fcmp comparison intrinsic and docs
Fraser Cormack via Phabricator via llvm-commits
- [PATCH] D122127: [WebAssembly] Use location of operand for operand-based type check errors
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D121972: Add cmake/ to release tarballs via concatenation
Konrad Wilhelm Kleine via Phabricator via llvm-commits
- [PATCH] D122128: [WebAssembly] Fix error location for parsed symbol/label operands
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D121972: Add cmake/ to release tarballs via concatenation
Konrad Wilhelm Kleine via Phabricator via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
LuoYuanke via Phabricator via llvm-commits
- [llvm] 8ee1ef2 - [Utils] Fix %S substitution
Nikita Popov via llvm-commits
- [PATCH] D122130: Verify parameter alignment attribute
LuoYuanke via Phabricator via llvm-commits
- [llvm] 72bde60 - [LV] Fix typo in comment
via llvm-commits
- [PATCH] D102342: [SPARC] Fix register reuse in leaf function remapping step
Koakuma via Phabricator via llvm-commits
- [PATCH] D101694: [SPARC] Fix type for i64 inline asm operands
Koakuma via Phabricator via llvm-commits
- [llvm] 1d817a1 - [AMDGPU][MC][NFC] Refactored sendmsg(...) handling
Dmitry Preobrazhensky via llvm-commits
- [PATCH] D121995: [AMDGPU][MC][NFC] Refactored sendmsg(...) handling
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D116462: [SPIRV 3/6] Add MC layer, object file support and InstPrinter
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D122130: Verify parameter alignment attribute
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D122091: [amdgpu] Elide module lds allocation in kernels with no callees
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 35a7be6 - [SDAG] enable binop identity constant folds for shifts
Simon Pilgrim via llvm-commits
- [PATCH] D122070: [SDAG] enable binop identity constant folds for shifts
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D120953: [AArch64][SelectionDAG] Supports unpklo/hi instructions to reduce the number of loads
Paul Walker via Phabricator via llvm-commits
- [PATCH] D122130: Verify parameter alignment attribute
Phoebe Wang via Phabricator via llvm-commits
- [llvm] 79a1823 - [SLP]Make stricter check for instructions that do not require
Alexey Bataev via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D121292: [VP] Add vp.fcmp comparison intrinsic and docs
Fraser Cormack via Phabricator via llvm-commits
- [PATCH] D122091: [amdgpu] Elide module lds allocation in kernels with no callees
Jon Chesterfield via Phabricator via llvm-commits
- [llvm] 7af5fc1 - Revert "[Utils] Fix %S substitution"
Nikita Popov via llvm-commits
- [PATCH] D122133: [LTO] Add configuartion option to use default optimization pipeline
Joseph Huber via Phabricator via llvm-commits
- [llvm] 5e9365c - [X86] combineAddOrSubToADCOrSBB - bail for illegal types
Simon Pilgrim via llvm-commits
- [PATCH] D122130: Verify parameter alignment attribute
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D122079: [ADT] Add Enum matcher
Jakub Kuderski via Phabricator via llvm-commits
- [PATCH] D121921: [LoopInversionPass] Avoid pointless loop rotation
Amir Ayupov via Phabricator via llvm-commits
- [compiler-rt] 4a6fab7 - [compiler-rt] Expand comment about Exynos 9810 workaround.
James Y Knight via llvm-commits
- [PATCH] D122130: Verify parameter alignment attribute
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D122039: [BOLT] Fix plt relocations symbol match
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D114174: [ARM][CodeGen] Add support for complex addition and multiplication
Nicholas Guy via Phabricator via llvm-commits
- [llvm] ed51e26 - [X86] combineAddOrSubToADCOrSBB - commute + neg subtraction patterns
Simon Pilgrim via llvm-commits
- [PATCH] D122134: [WebAssembly] Always emit functype directives for defined functions
Alex Bradbury via Phabricator via llvm-commits
- [llvm] da9ba89 - [WebAssembly][NFC] Add test case for functype emission
Alex Bradbury via llvm-commits
- [PATCH] D122134: [WebAssembly] Always emit functype directives for defined functions
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D121571: [TableGen] X86 mnemonic tables backend
Markus Böck via Phabricator via llvm-commits
- [PATCH] D121822: [bootstrap] Allow passing options to sub-builds for all targets
Louis Dionne via Phabricator via llvm-commits
- [llvm] 062b1ae - Reapply [Utils] Fix %S substitution
Nikita Popov via llvm-commits
- [PATCH] D121572: [X86][NFC] Generate mnemonic tables
Mikael Holmén via Phabricator via llvm-commits
- [llvm] 315896d - [X86] Fold SUB(X,SBB(Y,Z,W)) -> SUB(ADC(X,Z,W),Y)
Simon Pilgrim via llvm-commits
- [PATCH] D122065: [BOLT] Align constant islands to 8 bytes
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D121572: [X86][NFC] Generate mnemonic tables
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D121571: [TableGen] X86 mnemonic tables backend
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D121572: [X86][NFC] Generate mnemonic tables
Mikael Holmén via Phabricator via llvm-commits
- [llvm] 3a33664 - Add cmake/ to release tarballs via concatenation
Aaron Puchert via llvm-commits
- [PATCH] D122138: [mlir][bazel] filegroups for Python CF, PDL, Tensor dialects
Alex Zinenko via Phabricator via llvm-commits
- [PATCH] D121972: Add cmake/ to release tarballs via concatenation
Aaron Puchert via Phabricator via llvm-commits
- [PATCH] D120327: compiler-rt: Add udivmodei5 to builtins and add bitint library
Erich Keane via Phabricator via llvm-commits
- [PATCH] D121430: [PowerPC] Fix lowering of byval parameters for sizes greater than 8 bytes.
Quinn Pham via Phabricator via llvm-commits
- [PATCH] D121972: Add cmake/ to release tarballs via concatenation
Aaron Puchert via Phabricator via llvm-commits
- [PATCH] D122138: [mlir][bazel] filegroups for Python CF, PDL, Tensor dialects
Alex Zinenko via Phabricator via llvm-commits
- [PATCH] D121647: [runtimes] Detect changes to Tests.cmake
Joel E. Denny via Phabricator via llvm-commits
- [PATCH] D120136: [ConstantRange] Construct constant range from xor operation
Joseph Faulls via Phabricator via llvm-commits
- [PATCH] D122140: [X86][NFC] MnemonicTables: only access RI fields if they're initialized
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D121921: [BOLT] Avoid pointless loop rotation
Sergey Pupyrev via Phabricator via llvm-commits
- [PATCH] D122138: [mlir][bazel] filegroups for Python CF, PDL, Tensor dialects
Alex Zinenko via Phabricator via llvm-commits
- [PATCH] D115274: [IR][RFC] Memory region declaration intrinsic
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D114988: [IR] `GetElementPtrInst`: per-index `inrange` support
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D121993: Mark derived destructors as `override`
David Blaikie via Phabricator via llvm-commits
- [PATCH] D122013: [InstCombine] Fold abs of known negative operand when source is sub
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D122033: [DebugInfo][NFC] Add a comment on the ordering of DILineInfo frames.
David Blaikie via Phabricator via llvm-commits
- [PATCH] D121921: [BOLT] Avoid pointless loop rotation
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D120908: [FuncSpec] Enable function specialize for a constant range of arguments
Joseph Faulls via Phabricator via llvm-commits
- [PATCH] D122044: [AMDGPU] New gfx940 mfma instructions
Jay Foad via Phabricator via llvm-commits
- [PATCH] D120953: [AArch64][SelectionDAG] Supports unpklo/hi instructions to reduce the number of loads
Allen zhong via Phabricator via llvm-commits
- [PATCH] D121627: [IROutliner][NFC] Fix typo in doc of findOrCreatePHIInBlock
Hirochika Matsumoto via Phabricator via llvm-commits
- [PATCH] D115622: [Debugify] Optimize debugify original mode
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D122077: [InstCombine] Fold (ctpop(X) == 1) | (X == 0) into ctpop(X) < 2
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D122065: [BOLT] Align constant islands to 8 bytes
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D122145: [SLP] Cluster ordering for loads
Dave Green via Phabricator via llvm-commits
- [PATCH] D121921: [BOLT] Avoid pointless loop rotation
Sergey Pupyrev via Phabricator via llvm-commits
- [PATCH] D121571: [TableGen] X86 mnemonic tables backend
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D121572: [X86][NFC] Generate mnemonic tables
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D115623: [Debugify] Use DebugifyLevel in Debugify original mode
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D122013: [InstCombine] Fold abs of known negative operand when source is sub
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D121921: [BOLT] Avoid pointless loop rotation
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D121617: [LV] Move code to place induction increment to VPlan post-processing.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D121921: [BOLT] Avoid pointless loop rotation
Sergey Pupyrev via Phabricator via llvm-commits
- [PATCH] D121921: [BOLT] Avoid pointless loop rotation
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D122146: [test-release] Added -silent-log flag to test-release.sh
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D121903: [MachineCopyPropagation] More robust isForwardableRegClassCopy
Jay Foad via Phabricator via llvm-commits
- [PATCH] D122148: [SLP] Peak into loads when hitting the RecursionMaxDepth
Dave Green via Phabricator via llvm-commits
- [PATCH] D122148: [SLP] Peak into loads when hitting the RecursionMaxDepth
Dave Green via Phabricator via llvm-commits
- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
Yaxun Liu via Phabricator via llvm-commits
- [PATCH] D122145: [SLP] Cluster ordering for loads
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D121355: [SelectionDAG] Fold shift constants into cmp
Allen zhong via Phabricator via llvm-commits
- [PATCH] D120327: compiler-rt: Add udivmodei5 to builtins and add bitint library
Matthias Gehre via Phabricator via llvm-commits
- [PATCH] D120327: compiler-rt: Add udivmodei5 to builtins and add bitint library
Erich Keane via Phabricator via llvm-commits
- [PATCH] D121617: [LV] Move code to place induction increment to VPlan post-processing.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D120953: [AArch64][SelectionDAG] Supports unpklo/hi instructions to reduce the number of loads
Paul Walker via Phabricator via llvm-commits
- [PATCH] D122134: [WebAssembly] Always emit functype directives for defined functions
Sam Clegg via Phabricator via llvm-commits
- [PATCH] D122152: [InstCombine] Fold two select patterns into and-or
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D122033: [DebugInfo][NFC] Add a comment on the ordering of DILineInfo frames.
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D122020: [WebAssembly][WIP] Add tests for the Asm type checker
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- [llvm] a0ea7ec - [AMDGPU] divergence patterns for the BUILD_VECTOR i16, undef expansion.
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- [llvm] 0d362c9 - [memprof] Store callsite metadata with memprof records.
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- [PATCH] D122069: [Clang] Add binary format for bundling offloading metadata
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- [llvm] d4aeb50 - [RISCV] Simplify some code. NFC
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- [PATCH] D122186: [RISCV] Special case sign extended scalars when type legalizing nxvXi64 .vx instrinsics on RV32.
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- [PATCH] D122190: [AMDGPU][LLD] Adding support for ABI version 5 option
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Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D121047: Add missing template keywords
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D114342: ConvertUTF, new wrapper API
Marcus Johnson via Phabricator via llvm-commits
- [PATCH] D121973: Recommit "[SLP] Fix lookahead operand reordering for splat loads."
Vasileios Porpodas via Phabricator via llvm-commits
- [PATCH] D122183: Cleanup includes: Transforms/IPO
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D119973: RegAllocGreedy: Fix last chance recolor assert in impossible case
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D119933: [demangler] Add support for C++20 modules
David Blaikie via Phabricator via llvm-commits
- [PATCH] D121047: Add missing template keywords
Christoph Grüninger via Phabricator via llvm-commits
- [PATCH] D121973: Recommit "[SLP] Fix lookahead operand reordering for splat loads."
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D121047: Add missing template keywords
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D115274: [IR][RFC] Memory region declaration intrinsic
Alexander Richardson via Phabricator via llvm-commits
- [PATCH] D122190: [AMDGPU][LLD] Adding support for ABI version 5 option
Brian Sumner via Phabricator via llvm-commits
- [PATCH] D121047: Add missing template keywords
Christoph Grüninger via Phabricator via llvm-commits
- [PATCH] D122069: [Clang] Add binary format for bundling offloading metadata
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D122191: [AMDGPU] Support gfx940 smfmac instructions
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D115274: [IR][RFC] Memory region declaration intrinsic
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D121047: Add missing template keywords
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D120490: lld: Enable new passmanager plugin support for LTO
Jakob via Phabricator via llvm-commits
- [PATCH] D121179: [memprof] Store callsite metadata with memprof records.
Mitch Phillips via Phabricator via llvm-commits
- [llvm] 7961318 - Recommit "[SLP] Fix lookahead operand reordering for splat loads."
Vasileios Porpodas via llvm-commits
- [PATCH] D121973: Recommit "[SLP] Fix lookahead operand reordering for splat loads."
Vasileios Porpodas via Phabricator via llvm-commits
- [llvm] f4b7944 - Revert "[memprof] Store callsite metadata with memprof records."
Mitch Phillips via llvm-commits
- [PATCH] D119482: [OpaquePtr][LLParser] Automatically detect opaque pointers in .ll files
Mitch Phillips via Phabricator via llvm-commits
- [llvm] 9c96a6b - Revert "[OpaquePtr][LLParser] Automatically detect opaque pointers in .ll files"
Mitch Phillips via llvm-commits
- [PATCH] D115274: [IR][RFC] Memory region declaration intrinsic
Alexander Richardson via Phabricator via llvm-commits
- [PATCH] D122069: [Clang] Add binary format for bundling offloading metadata
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D122182: Cleanup includes: Linker
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D115274: [IR][RFC] Memory region declaration intrinsic
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D121862: [ProfSampleLoader] When disable-sample-loader-inlining is true, merge profiles of inlined instances to outlining versions.
Mingming Liu via Phabricator via llvm-commits
- [llvm] 80ec0eb - Revert "[OpaquePointers][BitcodeReader] Enable -opaque-pointers if we see an opaque pointer type"
Mitch Phillips via llvm-commits
- [PATCH] D121862: [ProfSampleLoader] When disable-sample-loader-inlining is true, merge profiles of inlined instances to outlining versions.
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D115274: [IR][RFC] Memory region declaration intrinsic
Alexander Richardson via Phabricator via llvm-commits
- [PATCH] D121862: [ProfSampleLoader] When disable-sample-loader-inlining is true, merge profiles of inlined instances to outlining versions.
David Li via Phabricator via llvm-commits
- [PATCH] D115274: [IR][RFC] Memory region declaration intrinsic
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D122090: [PPCISelLowering] Avoid emitting calls to __multi3, __muloti4
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D121862: [ProfSampleLoader] When disable-sample-loader-inlining is true, merge profiles of inlined instances to outlining versions.
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D121862: [ProfSampleLoader] When disable-sample-loader-inlining is true, merge profiles of inlined instances to outlining versions.
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D121862: [ProfSampleLoader] When disable-sample-loader-inlining is true, merge profiles of inlined instances to outlining versions.
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D119482: [OpaquePtr][LLParser] Automatically detect opaque pointers in .ll files
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D122194: [SelectionDAG] Store LeadingZero count in LiveOutInfo instead of KnownBits.
Craig Topper via Phabricator via llvm-commits
- [llvm] 10ffe80 - Revert "Revert "[OpaquePointers][BitcodeReader] Enable -opaque-pointers if we see an opaque pointer type""
Arthur Eubanks via llvm-commits
- [llvm] 2362c4e - Revert "Revert "[OpaquePtr][LLParser] Automatically detect opaque pointers in .ll files""
Arthur Eubanks via llvm-commits
- [PATCH] D114342: ConvertUTF, new wrapper API
Marcus Johnson via Phabricator via llvm-commits
- [PATCH] D122195: [polly] Remove last instances of -analyze
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D122196: [gn build] Port a36c2dd6d54c
Cynthia Shen via Phabricator via llvm-commits
- [PATCH] D122140: [X86][NFC] MnemonicTables: only access RI fields if they're initialized
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D120980: [PowerPC] make splat struct like an array for function arguments
ChenZheng via Phabricator via llvm-commits
- [PATCH] D122198: [PowerPC] Add .ref in backend for AIX XCOFF to support `-bcdtors:csect` linker option
Ting Wang via Phabricator via llvm-commits
- [PATCH] D121822: [bootstrap] Allow passing options to sub-builds for all targets
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D122186: [RISCV] Special case sign extended scalars when type legalizing nxvXi64 .vx instrinsics on RV32.
Zakk Chen via Phabricator via llvm-commits
- [PATCH] D121984: [RISCV][NFC] Moving RVV intrinsic type related util to llvm/Support
Zakk Chen via Phabricator via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122200: [AMDGPU] Split waterfall loop exec manipulation
Carl Ritson via Phabricator via llvm-commits
- [PATCH] D122200: [AMDGPU] Split waterfall loop exec manipulation
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D122161: [cmake] Handle iOS, watchOS and tvOS when finding compiler-rt on Apple
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D122156: [lld][Macho][NFC] Encapsulate priorities map in a priority class
Jez Ng via Phabricator via llvm-commits
- [PATCH] D122133: [LTO] Add configuartion option to use default optimization pipeline
Shilei Tian via Phabricator via llvm-commits
- [PATCH] D122200: [AMDGPU] Split waterfall loop exec manipulation
Carl Ritson via Phabricator via llvm-commits
- [llvm] 8e64d84 - [MachineSink] Check block prologue interference
Carl Ritson via llvm-commits
- [PATCH] D121277: [MachineSink] Check block prologue interference
Carl Ritson via Phabricator via llvm-commits
- [PATCH] D120226: [RISCV] Support mask policy for RVV IR intrinsics.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122203: [IR] Allow skipping vector pointer type.
Hendrik Greving via Phabricator via llvm-commits
- [PATCH] D114342: ConvertUTF, new wrapper API
Marcus Johnson via Phabricator via llvm-commits
- [llvm] f863df9 - [RISCV][NFC] Add common check prefix to reduce duplicate check lines.
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- [PATCH] D122120: [RISCV][NFC] Add common check prefix to reduce duplicate check lines.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D122204: [RISCV][NFC] Remove redundant check and rename functions in some IR tests
WangLian via Phabricator via llvm-commits
- [PATCH] D122205: [LoopIdiom] Merge TBAA of adjacent stores when creating memset
Stephen Long via Phabricator via llvm-commits
- [PATCH] D121785: The [3/3] Fix mangle problem when variable used in inline asm (Support ARR[BaseReg+IndexReg+..] in PIC model)
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D120226: [RISCV] Support mask policy for RVV IR intrinsics.
Zakk Chen via Phabricator via llvm-commits
- [PATCH] D122206: [IROutliner] Ensure that phi values that are passed in as arguments are remapped as arguments
Andrew Litteken via Phabricator via llvm-commits
- [PATCH] D122207: [IROutliner][IRSim] Add all outlined region basic blocks to canonical numbering to add basic blocks to generated PHINode numbering generation.
Andrew Litteken via Phabricator via llvm-commits
- [PATCH] D122084: [X86] combineAddOrSubToADCOrSBB - Fold ADD/SUB + (AND(SRL(X,Y),1) -> ADC/SBB+BT(X,Y)
Gulfem Savrun Yeniceri via Phabricator via llvm-commits
- [PATCH] D121785: The [3/3] Fix mangle problem when variable used in inline asm (Support ARR[BaseReg+IndexReg+..] in PIC model)
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D121496: [TableGen][RISCV] Add InstAliases with zero_reg to cover unmasked vnot.v, vncvt.x.x.w, vneg.v, etc.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122001: [NVPTX] Avoid a crash when 'llc' is called with '-filetype=null'
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122208: [RISCV] Optimize (select Cond, X, 0) --> and (sext Cond), X
luxufan via Phabricator via llvm-commits
- [PATCH] D121881: [RISCV][RVV] Select unmasked TU RVV pseudos in a DAG post-process
Zakk Chen via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
Zakk Chen via Phabricator via llvm-commits
- [PATCH] D121785: The [3/3] Fix mangle problem when variable used in inline asm (Support ARR[BaseReg+IndexReg+..] in PIC model)
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D120226: [RISCV] Support mask policy for RVV IR intrinsics.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D120714: [CodeGen] Use SDNode debug ID declaration in release builds
Daniil Kovalev via Phabricator via llvm-commits
- [PATCH] D122013: [InstCombine] Fold abs of known negative operand when source is sub
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D121881: [RISCV][RVV] Select unmasked TU RVV pseudos in a DAG post-process
Craig Topper via Phabricator via llvm-commits
- [PATCH] D121862: [ProfSampleLoader] When disable-sample-loader-inlining is true, merge profiles of inlined instances to outlining versions.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D122208: [RISCV] Optimize (select Cond, X, 0) --> and (sext Cond), X
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D122208: [RISCV] Optimize (select Cond, X, 0) --> and (sext Cond), X
Craig Topper via Phabricator via llvm-commits
- [PATCH] D121881: [RISCV][RVV] Select unmasked TU RVV pseudos in a DAG post-process
ShihPo Hung via Phabricator via llvm-commits
- [PATCH] D122152: [InstCombine] Fold two select patterns into and-or
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D121355: [SelectionDAG] Fold shift constants into cmp
Craig Topper via Phabricator via llvm-commits
- [PATCH] D121881: [RISCV][RVV] Select unmasked TU RVV pseudos in a DAG post-process
ShihPo Hung via Phabricator via llvm-commits
- [PATCH] D121881: [RISCV][RVV] Select unmasked TU RVV pseudos in a DAG post-process
ShihPo Hung via Phabricator via llvm-commits
- [PATCH] D121785: The [3/3] Fix mangle problem when variable used in inline asm (Support ARR[BaseReg+IndexReg+..] in PIC model)
Xiang Zhang via Phabricator via llvm-commits
- [PATCH] D122130: Verify parameter alignment attribute
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
LuoYuanke via Phabricator via llvm-commits
- [llvm] e4e281e - Revert "[bootstrap] Allow passing options to sub-builds for all targets"
Petr Hosek via llvm-commits
- [PATCH] D121771: [RISCV] Add basic cost model for vector casting
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D122130: Verify parameter alignment attribute
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D121785: The [3/3] Fix mangle problem when variable used in inline asm (Support ARR[BaseReg+IndexReg+..] in PIC model)
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122130: Verify parameter alignment attribute
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D122209: [RISCV] Allocate argument floating-point registers first
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D122130: Verify parameter alignment attribute
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D118020: [RISCV] Set CostPerUse for floating point registers
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D122209: [RISCV] Allocate argument floating-point registers first
Wang Pengcheng via Phabricator via llvm-commits
- [llvm] 23423c0 - [TableGen] Fix a misuse of getValueAsBitsInit
via llvm-commits
- [PATCH] D121785: The [3/3] Fix mangle problem when variable used in inline asm (Support ARR[BaseReg+IndexReg+..] in PIC model)
Xiang Zhang via Phabricator via llvm-commits
- [PATCH] D122203: [IR] Allow skipping vector pointer type.
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D121785: The [3/3] Fix mangle problem when variable used in inline asm (Support ARR[BaseReg+IndexReg+..] in PIC model)
Xiang Zhang via Phabricator via llvm-commits
- [PATCH] D121785: The [3/3] Fix mangle problem when variable used in inline asm (Support ARR[BaseReg+IndexReg+..] in PIC model)
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
Phoebe Wang via Phabricator via llvm-commits
- [llvm] ecd7a01 - [RISCV] Add basic cost model for vector casting
Yeting Kuo via llvm-commits
- [PATCH] D121771: [RISCV] Add basic cost model for vector casting
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D118538: [SLP] Schedule only sub-graph of vectorizable instructions
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D122130: Verify parameter alignment attribute
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
Kan Shengchen via Phabricator via llvm-commits
- [llvm] 902f470 - [NFC] [Coroutines] Remove unnecessary check and constraints on SmallVector
Chuanqi Xu via llvm-commits
- [PATCH] D122210: [llvm-profdata] Unify default cutoffs for detailed summary printing
Wenlei He via Phabricator via llvm-commits
- [PATCH] D121785: The [3/3] Fix mangle problem when variable used in inline asm (Support ARR[BaseReg+IndexReg+..] in PIC model)
Xiang Zhang via Phabricator via llvm-commits
- [PATCH] D118538: [SLP] Schedule only sub-graph of vectorizable instructions
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D120327: compiler-rt: Add udivmodei5 to builtins and add bitint library
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D122118: [MachineCopyPropagation][WIP] Eliminate spillage copies that might caused by eviction chain
Kai Luo via Phabricator via llvm-commits
- [PATCH] D122211: [RISCV][NFC] Add some check prefixes to remove redundant code in some IR tests
WangLian via Phabricator via llvm-commits
- [PATCH] D115747: [AMDGPU] Flush the vmcnt counter in loop preheader when necessary
Piotr Sobczak via Phabricator via llvm-commits
- [PATCH] D121496: [TableGen][RISCV] Add InstAliases with zero_reg to cover unmasked vnot.v, vncvt.x.x.w, vneg.v, etc.
Fraser Cormack via Phabricator via llvm-commits
- [PATCH] D122211: [RISCV][NFC] Add some check prefixes to remove redundant code in some IR tests
Fraser Cormack via Phabricator via llvm-commits
- [llvm] 6902734 - [X86] Simplify attributes of the generated memory folding table (NFCI)
Shengchen Kan via llvm-commits
- [PATCH] D121934: [NFC][llvm][StringMap]Extract createTable and getHashTable functions and add the inline attribute to the getMinBucketToReserveForEntries function.
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122084: [X86] combineAddOrSubToADCOrSBB - Fold ADD/SUB + (AND(SRL(X,Y),1) -> ADC/SBB+BT(X,Y)
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D122123: [WebAssembly][NFC] Delete type checking logic for removed ref.null instruction
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D122212: [RISCV] Add alias to pack/packw
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D121934: [NFC][llvm][StringMap]Extract createTable and getHashTable functions and add the inline attribute to the getMinBucketToReserveForEntries function.
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
LiqinWeng via Phabricator via llvm-commits
- [llvm] 0ff19b1 - [RISCV][NFC] Add some check prefixes to remove redundant checks in some IR tests
Lian Wang via llvm-commits
- [PATCH] D122211: [RISCV][NFC] Add some check prefixes to remove redundant code in some IR tests
WangLian via Phabricator via llvm-commits
- [PATCH] D122213: [RISCV] Enable MachineOutliner by default under -Oz for RISCV
Wang Pengcheng via Phabricator via llvm-commits
- [llvm] abb5a98 - [RISCV] Support mask policy for RVV IR intrinsics.
Zakk Chen via llvm-commits
- [PATCH] D120226: [RISCV] Support mask policy for RVV IR intrinsics.
Zakk Chen via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D121671: [InferAddressSpaces][NFC] Small code improvements for the InferAddressSpaces pass
Pavel Samolysov via Phabricator via llvm-commits
- [PATCH] D122042: [VP] Preserve address space of pointer for strided load/store intrinsics.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D122163: [StripDeadDebugInfo] Drop dead CUs
Mikhail Lychkov via Phabricator via llvm-commits
- [PATCH] D122215: [WebAssembly] Initial support for reference types in clang
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D122215: [WebAssembly] Initial support for reference types in clang
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D122216: [X86] Rename MMX_MOVD64from64rm to MMX_MOVD64from64mr b/c it stores sth, NFC
Kan Shengchen via Phabricator via llvm-commits
- [llvm] 8b295d1 - Cleanup includes: Linker
via llvm-commits
- [PATCH] D122182: Cleanup includes: Linker
serge via Phabricator via llvm-commits
- [PATCH] D121913: [VP] Fix VPintrinsic::getStaticVectorLength for vp.merge|select
Kazushi Marukawa via Phabricator via llvm-commits
- [PATCH] D120215: [LV] Invalidate widening decisions after maximizing vector bandwidth
Dave Green via Phabricator via llvm-commits
- [PATCH] D120215: [LV] Invalidate widening decisions after maximizing vector bandwidth
Dave Green via Phabricator via llvm-commits
- [PATCH] D122216: [X86] Rename MMX_MOVD64from64rm to MMX_MOVD64from64mr b/c it stores sth, NFC
Xiang Zhang via Phabricator via llvm-commits
- [PATCH] D122216: [X86] Rename MMX_MOVD64from64rm to MMX_MOVD64from64mr b/c it stores sth, NFC
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D121137: [AArch64] Lower 3 and 4 sources buildvectors to TBL
Dave Green via Phabricator via llvm-commits
- [PATCH] D76878: Implement DW_{OP,AT}_LLVM_* for Heterogeneous Debugging
Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
- [llvm] f1985a3 - Cleanup includes: Transforms/IPO
via llvm-commits
- [PATCH] D122183: Cleanup includes: Transforms/IPO
serge via Phabricator via llvm-commits
- [PATCH] D122122: [Docs] Add documentation for ongoing major changes
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D76878: Implement DW_{OP,AT}_LLVM_* for Heterogeneous Debugging
Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
- [PATCH] D122020: [WebAssembly] Add tests for the Asm type checker
Alex Bradbury via Phabricator via llvm-commits
- [llvm] 86cc731 - [WebAssembly] Always emit functype directives for defined functions
Alex Bradbury via llvm-commits
- [PATCH] D122134: [WebAssembly] Always emit functype directives for defined functions
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D120880: [AArch64] Insert subvector costs
Dave Green via Phabricator via llvm-commits
- [PATCH] D120880: [AArch64] Insert subvector costs
Dave Green via Phabricator via llvm-commits
- [PATCH] D122217: [X86] Remove TB_NO_REVERSE for 2 memory folding entries
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D76878: Implement DW_{OP,AT}_LLVM_* for Heterogeneous Debugging
Djordje Todorovic via Phabricator via llvm-commits
- [PATCH] D122217: [X86] Remove TB_NO_REVERSE for 2 memory folding entries
Kan Shengchen via Phabricator via llvm-commits
- [llvm] 9ab18cc - [RISCV] Add policy operand for masked vid and viota IR intrinsics.
Zakk Chen via llvm-commits
- [PATCH] D120227: [RISCV] Add policy operand for masked vid and viota IR intrinsics.
Zakk Chen via Phabricator via llvm-commits
- [PATCH] D120169: [Debuginfo][LSR} Add support for salvaging variadic dbg.value intrinsics [2/2]
Chris Jackson via Phabricator via llvm-commits
- [llvm] a53b689 - Fix missing include under -DEXPENSIVE_CHECK
via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D120169: [Debuginfo][LSR} Add support for salvaging variadic dbg.value intrinsics [2/2]
Djordje Todorovic via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D122216: [X86] Rename MMX_MOVD64from64rm to MMX_MOVD64from64mr b/c it stores sth, NFC
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D122216: [X86] Rename MMX_MOVD64from64rm to MMX_MOVD64from64mr b/c it stores sth, NFC
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122216: [X86] Rename MMX_MOVD64from64rm to MMX_MOVD64from64mr b/c it stores sth, NFC
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] 021b423 - [X86] Rename MMX_MOVD64from64rm to MMX_MOVD64from64mr b/c it stores sth, NFC
Shengchen Kan via llvm-commits
- [PATCH] D122216: [X86] Rename MMX_MOVD64from64rm to MMX_MOVD64from64mr b/c it stores sth, NFC
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D121934: [NFC][llvm][StringMap]Extract createTable and getHashTable functions and add the inline attribute to the getMinBucketToReserveForEntries function.
Wang Yihan via Phabricator via llvm-commits
- [PATCH] D122219: [AMDGPU] [NFC]: Organize the code around reserving registers.
Mahesha S via Phabricator via llvm-commits
- [PATCH] D122217: [X86] Remove TB_NO_REVERSE for 2 memory folding entries
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D121934: [NFC][llvm][StringMap]Extract createTable and getHashTable functions and add the inline attribute to the getMinBucketToReserveForEntries function.
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
Ben Shi via Phabricator via llvm-commits
- [PATCH] D122003: [Triple] Add support for more archs in `getArchTypeForLLVMName`
Renato Golin via Phabricator via llvm-commits
- [PATCH] D122215: [WebAssembly] Initial support for reference types in clang
Alex Bradbury via Phabricator via llvm-commits
- [llvm] 7de383c - [VP] Fix VPintrinsic::getStaticVectorLength for vp.merge|select
Simon Moll via llvm-commits
- [PATCH] D121913: [VP] Fix VPintrinsic::getStaticVectorLength for vp.merge|select
Simon Moll via Phabricator via llvm-commits
- [llvm] 0a488cb - [AMDGPU] use scalar shift for SALU users in frame index elimination
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- [PATCH] D121524: [AMDGPU] use scalar shift for SALU users in frame index elimination
Alexander via Phabricator via llvm-commits
- [PATCH] D122220: [InlineAsm] Add support for address operands ("p").
Jonas Paulsson via Phabricator via llvm-commits
- [llvm] 5a65f0b - [X86][SandyBridge] Remove superfluous mmx store from vector load schedule model group
Simon Pilgrim via llvm-commits
- [PATCH] D122084: [X86] combineAddOrSubToADCOrSBB - Fold ADD/SUB + (AND(SRL(X,Y),1) -> ADC/SBB+BT(X,Y)
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D110267: [InlineAsm, SystemZ] Handle inline assembly address operands.
Jonas Paulsson via Phabricator via llvm-commits
- [PATCH] D122003: Add support for more archs in `Triple::getArchTypeForLLVMName`
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D122003: Add support for more archs in `Triple::getArchTypeForLLVMName`
Antonio Frighetto via Phabricator via llvm-commits
- [PATCH] D121600: [Codegen][tablgen][NFC] Allow meta instruction to be target dependent
Bjorn Pettersson via Phabricator via llvm-commits
- [llvm] 73777b4 - [Debugify] Optimize debugify original mode
Djordje Todorovic via llvm-commits
- [PATCH] D115622: [Debugify] Optimize debugify original mode
Djordje Todorovic via Phabricator via llvm-commits
- [PATCH] D121788: [AArch64] Increase MaxInterleaveFactor to 4
Dave Green via Phabricator via llvm-commits
- [PATCH] D122221: [Bundle][Codegen] Ignore bundle for meta-instruction
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D118387: [NFC][IPSCCP] Switch away from Instruction::isSafeToRemove()
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D114342: ConvertUTF, new wrapper API
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D121600: [Codegen][tablgen][NFC] Allow meta instruction to be target dependent
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122194: [SelectionDAG] Store LeadingZero count in LiveOutInfo instead of KnownBits.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D121768: [X86][tablgen] Auto-generate trivial fields and trivial interfaces for target features
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D116462: [SPIRV 3/6] Add MC layer, object file support and InstPrinter
Ilia Diachkov via Phabricator via llvm-commits
- [PATCH] D122003: Add support for more archs in `Triple::getArchTypeForLLVMName`
Renato Golin via Phabricator via llvm-commits
- [PATCH] D116465: [SPIRV 6/6] Add the module analysis pass and the simplest tests
Ilia Diachkov via Phabricator via llvm-commits
- [PATCH] D120169: [Debuginfo][LSR} Add support for salvaging variadic dbg.value intrinsics [2/2]
Chris Jackson via Phabricator via llvm-commits
- [llvm] 7636c9a - [AMDGPU] use scalar shift for SALU users in frame index elimination
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- [llvm] c56dd20 - [AArch64] Add extra insert subvector cost model tests. NFC
David Green via llvm-commits
- [PATCH] D121934: [NFC][llvm][StringMap]Extract createTable and getHashTable functions and add the inline attribute to the getMinBucketToReserveForEntries function.
Serge Pavlov via Phabricator via llvm-commits
- [llvm] c4f31d1 - [InstCombine] add tests for shift-of-bswap; NFC
Sanjay Patel via llvm-commits
- [llvm] 9e9bda2 - [InstCombine] try to narrow shifted bswap-of-zext
Sanjay Patel via llvm-commits
- [PATCH] D122166: [InstCombine] try to narrow shifted bswap-of-zext
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D115274: [IR][RFC] Memory region declaration intrinsic
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D122221: [Bundle][Codegen] Ignore bundle for meta-instruction
Bjorn Pettersson via Phabricator via llvm-commits
- [llvm] 5269dd7 - [ThinLTO] Work around buggy FileCheck pattern; NFC
Bryan Chan via llvm-commits
- [PATCH] D122219: [AMDGPU] [NFC]: Organize the code around reserving registers.
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 2881696 - [tests] Force (some) X86-specific tests to use an explicit triple
Igor Kudrin via llvm-commits
- [llvm] d7681d9 - [NVPTX] Avoid a crash when 'llc' is called with '-filetype=null'
Igor Kudrin via llvm-commits
- [llvm] 568404e - [tests] Make 'object-emission' imply 'default_triple'
Igor Kudrin via llvm-commits
- [llvm] c344d97 - [NVPTX][tests] Do not run tests that require direct object generation
Igor Kudrin via llvm-commits
- [PATCH] D121998: [tests] Force (some) X86-specific tests to use that target
Igor Kudrin via Phabricator via llvm-commits
- [PATCH] D122001: [NVPTX] Avoid a crash when 'llc' is called with '-filetype=null'
Igor Kudrin via Phabricator via llvm-commits
- [PATCH] D121994: [tests] Make 'object-emission' imply 'default_triple'
Igor Kudrin via Phabricator via llvm-commits
- [PATCH] D121996: [NVPTX][tests] Do not run tests that require direct object generation
Igor Kudrin via Phabricator via llvm-commits
- [PATCH] D120327: compiler-rt: Add udivmodei5 to builtins and add bitint library
Erich Keane via Phabricator via llvm-commits
- [PATCH] D122010: [InstCombine] try to canonicalize logical shift after bswap
Sanjay Patel via Phabricator via llvm-commits
- [llvm] afb526b - [LICM] Handle store of pointer to itself (PR54495)
Nikita Popov via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
Nikita Popov via Phabricator via llvm-commits
- [llvm] 91ea247 - [Debugify] Use DebugifyLevel in Debugify original mode
Djordje Todorovic via llvm-commits
- [PATCH] D115623: [Debugify] Use DebugifyLevel in Debugify original mode
Djordje Todorovic via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
Daniil Kovalev via Phabricator via llvm-commits
- [PATCH] D115653: [DAG]Introduce llvm::processShuffleMasks and use it for shuffles in DAG Type Legalizer.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D122219: [AMDGPU] [NFC]: Organize the code around reserving registers.
Mahesha S via Phabricator via llvm-commits
- [llvm] 60820e5 - [InstCombine] try to canonicalize logical shift after bswap
Sanjay Patel via llvm-commits
- [PATCH] D122010: [InstCombine] try to canonicalize logical shift after bswap
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
Daniil Kovalev via Phabricator via llvm-commits
- [PATCH] D122219: [AMDGPU] [NFC]: Organize the code around reserving registers.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D120826: [Dockerfile] Upgrade debian base image to version 11
Sam McCall via Phabricator via llvm-commits
- [PATCH] D122219: [AMDGPU] [NFC]: Organize the code around reserving registers.
Mahesha S via Phabricator via llvm-commits
- [PATCH] D122205: [LoopIdiom] Merge TBAA of adjacent stores when creating memset
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D122226: [llmv-pdbutil] Move InputFile/FormatUtil/LinePrinter to the PDB library.
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D122152: [InstCombine] Fold two select patterns into and-or
Sanjay Patel via Phabricator via llvm-commits
- [llvm] 5856f30 - [LTO] Add configuartion option to use default optimization pipeline
Joseph Huber via llvm-commits
- [PATCH] D122133: [LTO] Add configuartion option to use default optimization pipeline
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D122226: [llmv-pdbutil] Move InputFile/FormatUtil/LinePrinter to the PDB library.
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D122205: [LoopIdiom] Merge TBAA of adjacent stores when creating memset
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D115274: [IR][RFC] Memory region declaration intrinsic
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D122205: [LoopIdiom] Merge TBAA of adjacent stores when creating memset
Stephen Long via Phabricator via llvm-commits
- [PATCH] D122152: [InstCombine] Fold two select patterns into and-or
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D76878: Implement DW_{OP,AT}_LLVM_* for Heterogeneous Debugging
Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
- [PATCH] D122205: [LoopIdiom] Merge TBAA of adjacent stores when creating memset
Jeroen Dobbelaere via Phabricator via llvm-commits
- [PATCH] D115274: [IR][RFC] Memory region declaration intrinsic
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D122212: [RISCV] Add alias to pack/packw
Ben Shi via Phabricator via llvm-commits
- [PATCH] D115274: [IR][RFC] Memory region declaration intrinsic
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D122205: [LoopIdiom] Merge TBAA of adjacent stores when creating memset
Stephen Long via Phabricator via llvm-commits
- [PATCH] D122152: [InstCombine] Fold two select patterns into and-or
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D122226: [llmv-pdbutil] Move InputFile/FormatUtil/LinePrinter to the PDB library.
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D76878: Implement DW_{OP,AT}_LLVM_* for Heterogeneous Debugging
Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
- [PATCH] D122212: [RISCV] Add alias to pack/packw
Ben Shi via Phabricator via llvm-commits
- [PATCH] D122039: [BOLT] Fix plt relocations symbol match
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D122039: [BOLT] Fix plt relocations symbol match
Vladislav Khmelevsky via Phabricator via llvm-commits
- [llvm] 50c8588 - [LV] Remove Loop argument from createInductionResumeValues (NFCI).
Florian Hahn via llvm-commits
- [PATCH] D122226: [llmv-pdbutil] Move InputFile/FormatUtil/LinePrinter to the PDB library.
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D122203: [IR] Allow matching vector pointer with opaque pointers.
Hendrik Greving via Phabricator via llvm-commits
- [PATCH] D122203: [IR] Allow matching vector pointer with opaque pointers.
Hendrik Greving via Phabricator via llvm-commits
- [llvm] 01a2ba5 - [InstCombine] add tests for abs with dominating condition; NFC
Sanjay Patel via llvm-commits
- [PATCH] D120169: [Debuginfo][LSR} Add support for salvaging variadic dbg.value intrinsics [2/2]
Chris Jackson via Phabricator via llvm-commits
- [llvm] c4d74a9 - [InstCombine] add test for abs with dominating condition; NFC
Sanjay Patel via llvm-commits
- [PATCH] D119933: [demangler] Add support for C++20 modules
Nathan Sidwell via Phabricator via llvm-commits
- [PATCH] D120026: [ARM] Fix ARM backend to correctly use atomic expansion routines.
Ayke via Phabricator via llvm-commits
- [PATCH] D122013: [InstCombine] Fold abs of known negative operand when source is sub
Sanjay Patel via Phabricator via llvm-commits
- [llvm] 10fd282 - [RISCV] Add policy operand for masked compare and vmsbf/vmsif/vmsof IR
Zakk Chen via llvm-commits
- [PATCH] D120228: [RISCV] Add policy operand for masked compare and vmsbf/vmsif/vmsof IR intrinsics.
Zakk Chen via Phabricator via llvm-commits
- [PATCH] D122148: [SLP] Peak into loads when hitting the RecursionMaxDepth
Dave Green via Phabricator via llvm-commits
- [PATCH] D109817: [AggressiveInstCombine] Add `phi` nodes support to `TruncInstCombine`
Anton Afanasyev via Phabricator via llvm-commits
- [PATCH] D122152: [InstCombine] Fold two select patterns into and-or
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D122233: [AggressiveInstCombine] Add `shufflevector` instr support to `TruncInstCombine`
Anton Afanasyev via Phabricator via llvm-commits
- [PATCH] D122233: [AggressiveInstCombine] Add `shufflevector` instr support to `TruncInstCombine`
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D122203: [IR] Allow matching vector pointer with opaque pointers.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D122203: [IR] Allow matching pointer to vector with opaque pointers.
Hendrik Greving via Phabricator via llvm-commits
- [PATCH] D120327: compiler-rt: Add udivmodei5 to builtins and add bitint library
Matthias Gehre via Phabricator via llvm-commits
- [PATCH] D122013: [InstCombine] Fold abs of known negative operand when source is sub
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D122156: [lld][Macho][NFC] Encapsulate priorities map in a priority class
Roger Kim via Phabricator via llvm-commits
- [PATCH] D122013: [InstCombine] Fold abs of known negative operand when source is sub
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D122065: [BOLT] Align constant islands to 8 bytes
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D122065: [BOLT] Align constant islands to 8 bytes
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D122020: [WebAssembly] Add tests for the Asm type checker
Sam Clegg via Phabricator via llvm-commits
- [PATCH] D122084: [X86] combineAddOrSubToADCOrSBB - Fold ADD/SUB + (AND(SRL(X,Y),1) -> ADC/SBB+BT(X,Y)
Gulfem Savrun Yeniceri via Phabricator via llvm-commits
- [PATCH] D122212: [RISCV] Add alias to pack/packw
luxufan via Phabricator via llvm-commits
- [PATCH] D122065: [BOLT] Align constant islands to 8 bytes
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D122233: [AggressiveInstCombine] Add `shufflevector` instr support to `TruncInstCombine`
Anton Afanasyev via Phabricator via llvm-commits
- [PATCH] D121788: [AArch64] Increase MaxInterleaveFactor to 4
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D122156: [lld][Macho][NFC] Encapsulate priorities map in a priority class
Vincent Lee via Phabricator via llvm-commits
- [PATCH] D121560: [clang][Opt] Add NoArgUnusedWith to not warn for unused redundant options
Alex Brachet via Phabricator via llvm-commits
- [PATCH] D122020: [WebAssembly] Add tests for the Asm type checker
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D122013: [InstCombine] Fold abs of known negative operand when source is sub
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D122156: [lld][Macho][NFC] Encapsulate priorities map in a priority class
Roger Kim via Phabricator via llvm-commits
- [PATCH] D122156: [lld][Macho][NFC] Encapsulate priorities map in a priority class
Jez Ng via Phabricator via llvm-commits
- [PATCH] D122156: [lld][Macho][NFC] Encapsulate priorities map in a priority class
Roger Kim via Phabricator via llvm-commits
- [PATCH] D122156: [lld][Macho][NFC] Encapsulate priorities map in a priority class
Jez Ng via Phabricator via llvm-commits
- [PATCH] D122236: [RISCV] Fix crash for initial section alignment with .option norvc
Luís Marques via Phabricator via llvm-commits
- [PATCH] D122236: [RISCV] Fix crash for initial section alignment with .option norvc
Luís Marques via Phabricator via llvm-commits
- [PATCH] D122156: [lld][Macho][NFC] Encapsulate priorities map in a priority class
Roger Kim via Phabricator via llvm-commits
- [PATCH] D122152: [InstCombine] Fold two select patterns into and-or
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D122156: [lld][Macho][NFC] Encapsulate priorities map in a priority class
Roger Kim via Phabricator via llvm-commits
- [PATCH] D121822: [bootstrap] Allow passing options to sub-builds for all targets
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D120327: compiler-rt: Add udivmodei5 to builtins and add bitint library
Jacob Lifshay via Phabricator via llvm-commits
- [PATCH] D114342: ConvertUTF, new wrapper API
Marcus Johnson via Phabricator via llvm-commits
- [llvm] 9001168 - [WebAssembly] Add tests for the Asm type checker
Alex Bradbury via llvm-commits
- [PATCH] D122020: [WebAssembly] Add tests for the Asm type checker
Alex Bradbury via Phabricator via llvm-commits
- [llvm] ef9cf86 - [WebAssembly][NFC] Delete type checking logic for removed ref.null instruction
Alex Bradbury via llvm-commits
- [PATCH] D122123: [WebAssembly][NFC] Delete type checking logic for removed ref.null instruction
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D122156: [lld][Macho][NFC] Encapsulate priorities map in a priority class
Jez Ng via Phabricator via llvm-commits
- [PATCH] D119078: [LAA, LV] Add initial support for pointer-diff memory checks.
Dave Green via Phabricator via llvm-commits
- [PATCH] D120327: compiler-rt: Add udivmodei5 to builtins and add bitint library
Erich Keane via Phabricator via llvm-commits
- [PATCH] D122217: [X86] Remove TB_NO_REVERSE for 2 memory folding entries
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122233: [AggressiveInstCombine] Add `shufflevector` instr support to `TruncInstCombine`
Roman Lebedev via Phabricator via llvm-commits
- [llvm] 510a2bb - [IR] Allow matching pointer to vector with opaque pointers.
Hendrik Greving via llvm-commits
- [PATCH] D122203: [IR] Allow matching pointer to vector with opaque pointers.
Hendrik Greving via Phabricator via llvm-commits
- [PATCH] D122212: [RISCV] Add alias to pack/packw
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122212: [RISCV] Add alias to pack/packw
Craig Topper via Phabricator via llvm-commits
- [llvm] c354167 - [demangler] Add support for C++20 modules
Nathan Sidwell via llvm-commits
- [PATCH] D119933: [demangler] Add support for C++20 modules
Nathan Sidwell via Phabricator via llvm-commits
- [PATCH] D122152: [InstCombine] Fold two select patterns into and-or
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D122233: [AggressiveInstCombine] Add `shufflevector` instr support to `TruncInstCombine`
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D122152: [InstCombine] Fold two select patterns into and-or
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D122152: [InstCombine] Fold two select patterns into and-or
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D121862: [ProfSampleLoader] When disable-sample-loader-inlining is true, merge profiles of inlined instances to outlining versions.
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D122194: [SelectionDAG] Store LeadingZero count in LiveOutInfo instead of KnownBits.
Craig Topper via Phabricator via llvm-commits
- [llvm] 49c2206 - [VP] Preserve address space of pointer for strided load/store intrinsics.
Craig Topper via llvm-commits
- [PATCH] D122042: [VP] Preserve address space of pointer for strided load/store intrinsics.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D121862: [ProfSampleLoader] When disable-sample-loader-inlining is true, merge profiles of inlined instances to outlining versions.
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D122148: [SLP] Peak into loads when hitting the RecursionMaxDepth
Dave Green via Phabricator via llvm-commits
- [PATCH] D120327: compiler-rt: Add udivmodei5 to builtins and add bitint library
Matthias Gehre via Phabricator via llvm-commits
- [PATCH] D115352: [AArch64] Add mayRaiseFPException to appropriate instructions
Dave Green via Phabricator via llvm-commits
- [llvm] 23d60ce - [RISCV][NFC] Refine and refactor RISCVVEmitter and riscv_vector.td.
Zakk Chen via llvm-commits
- [PATCH] D120870: [RISCV][NFC] Refine and refactor RISCVVEmitter and riscv_vector.td.
Zakk Chen via Phabricator via llvm-commits
- [PATCH] D122194: [SelectionDAG] Store LeadingZero count in LiveOutInfo instead of KnownBits.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D120327: compiler-rt: Add udivmodei5 to builtins and add bitint library
Jacob Lifshay via Phabricator via llvm-commits
- [llvm] 9b0f227 - [TableGen][RISCV] Add InstAliases with zero_reg to cover unmasked vnot.v, vncvt.x.x.w, vneg.v, etc.
Craig Topper via llvm-commits
- [PATCH] D121496: [TableGen][RISCV] Add InstAliases with zero_reg to cover unmasked vnot.v, vncvt.x.x.w, vneg.v, etc.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122239: [dsymutil] Update vector of section starts with size of current section
Augusto Noronha via Phabricator via llvm-commits
- [PATCH] D122194: [SelectionDAG] Store LeadingZero count in LiveOutInfo instead of KnownBits.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122194: [SelectionDAG] Store LeadingZero count in LiveOutInfo instead of KnownBits.
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] 51940d6 - [RISCV] Special case sign extended scalars when type legalizing nxvXi64 .vx instrinsics on RV32.
Craig Topper via llvm-commits
- [PATCH] D122186: [RISCV] Special case sign extended scalars when type legalizing nxvXi64 .vx instrinsics on RV32.
Craig Topper via Phabricator via llvm-commits
- [llvm] 7f8572b - [ARM] select_xform.ll - re-add and fix missing CHECK prefixes
Simon Pilgrim via llvm-commits
- [PATCH] D115747: [AMDGPU] Flush the vmcnt counter in loop preheader when necessary
Baptiste Saleil via Phabricator via llvm-commits
- [llvm] c346068 - Add UTF32 to/from UTF8 conversion functions
Aaron Ballman via llvm-commits
- [PATCH] D122241: [X86] Fold MMX_MOVD64from64rr + store to MMX_MOVQ64mr instead of MMX_MOVD64from64mr.
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- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
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- [PATCH] D122241: [X86] Fold MMX_MOVD64from64rr + store to MMX_MOVQ64mr instead of MMX_MOVD64from64mr.
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- [PATCH] D114342: ConvertUTF, new wrapper API
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- [PATCH] D120026: [ARM] Fix ARM backend to correctly use atomic expansion routines.
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- [PATCH] D122039: [BOLT] Fix plt relocations symbol match
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- [PATCH] D122013: [InstCombine] Fold abs of known negative operand when source is sub
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- [PATCH] D114342: ConvertUTF, new wrapper API
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- [PATCH] D121376: [RISCV][RVV] Introduce roundmode operand to PseudoVAADD instruction
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- [PATCH] D121376: [RISCV][RVV] Introduce roundmode operand to PseudoVAADD instruction
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- [PATCH] D120714: [CodeGen] Use SDNode debug ID declaration in release builds
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- [llvm] a6beb18 - Revert "Add UTF32 to/from UTF8 conversion functions"
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- [PATCH] D114342: ConvertUTF, new wrapper API
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- [PATCH] D122251: [lit] Use sharding for GoogleTest format
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- [PATCH] D122039: [BOLT] Fix plt relocations symbol match
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- [PATCH] D122252: [AMDGPU] Allow v_accvgpr_write to use SGPR on gfx90a
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- [PATCH] D122252: [AMDGPU] Allow v_accvgpr_write to use SGPR on gfx90a
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- [PATCH] D122252: [AMDGPU] Allow v_accvgpr_write to use SGPR on gfx90a
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- [PATCH] D122252: [AMDGPU] Allow v_accvgpr_write to use SGPR on gfx90a
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- [llvm] a3095a2 - DebugInfo: Simplify const/volatile printing for function types
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- [llvm] 4841dab - llvm-dwarfdump: Including calling convention attribute in pretty printed type names
David Blaikie via llvm-commits
- [PATCH] D122247: [OpenMP] Initial parsing/sema for the 'omp parallel loop' construct
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- [PATCH] D122039: [BOLT] Fix plt relocations symbol match
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- [PATCH] D122039: [BOLT] Fix plt relocations symbol match
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- [PATCH] D122003: Add support for more archs in `Triple::getArchTypeForLLVMName`
Paul Robinson via Phabricator via llvm-commits
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Philip Reames via llvm-commits
- [PATCH] D121921: [BOLT] Avoid pointless loop rotation
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- [llvm] 631a643 - [AMDGPU] Update mfma test to run gfx940 checks. NFC.
Stanislav Mekhanoshin via llvm-commits
- [PATCH] D122255: Meta directive runtime support
Abid via Phabricator via llvm-commits
- [PATCH] D121376: [RISCV][RVV] Introduce roundmode operand to PseudoVAADD instruction
ShihPo Hung via Phabricator via llvm-commits
- [PATCH] D114342: ConvertUTF, new wrapper API
Marcus Johnson via Phabricator via llvm-commits
- [PATCH] D122252: [AMDGPU] Allow v_accvgpr_write to use SGPR on gfx90a
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- [PATCH] D122190: [AMDGPU][LLD] Adding support for ABI version 5 option
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- [llvm] 57d0290 - [test, instcombine] Precommit test for upcoming transform
Philip Reames via llvm-commits
- [PATCH] D122255: Meta directive runtime support
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- [PATCH] D121996: [NVPTX][tests] Do not run tests that require direct object generation
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- [PATCH] D121973: Recommit "[SLP] Fix lookahead operand reordering for splat loads."
Arthur Eubanks via Phabricator via llvm-commits
- [llvm] ccf8c96 - [InstCombine] reorder code, fix formatting; NFC
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- [llvm] f7d7d2a - Revert "Recommit "[SLP] Fix lookahead operand reordering for splat loads.""
Arthur Eubanks via llvm-commits
- [PATCH] D121376: [RISCV][RVV] Introduce roundmode operand to PseudoVAADD instruction
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122181: Cleanup includes: Transforms/Instrumentation & Transforms/Vectorize
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122156: [lld][Macho][NFC] Encapsulate priorities map in a priority class
Jez Ng via Phabricator via llvm-commits
- [PATCH] D122180: Cleanup include: codegen second round
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- [PATCH] D116465: [SPIRV 6/6] Add the module analysis pass and the simplest tests
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- [PATCH] D122258: [MC][RFC] Omit DWARF unwind info if compact unwind is present for all archs
Jez Ng via Phabricator via llvm-commits
- [llvm] 7abefc4 - [instcombine] Fold away memset/memmove from otherwise unused alloca
Philip Reames via llvm-commits
- [PATCH] D120573: [OpenMP] Support runtime user conditions in metadirective
Abid via Phabricator via llvm-commits
- [PATCH] D122259: [SelectOpti][2/5] Select-to-branch base transformation
Sotiris Apostolakis via Phabricator via llvm-commits
- [llvm] 72c1a0d - [AMDGPU] Allow v_accvgpr_write to use SGPR on gfx90a
Stanislav Mekhanoshin via llvm-commits
- [PATCH] D122252: [AMDGPU] Allow v_accvgpr_write to use SGPR on gfx90a
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D122255: Meta directive runtime support
Abid via Phabricator via llvm-commits
- [llvm] 2cedaee - [OpenMP] Initial parsing/sema for the 'omp parallel loop' construct
Mike Rice via llvm-commits
- [PATCH] D122190: [AMDGPU][LLD] Adding support for ABI version 5 option
Jacob Lambert via Phabricator via llvm-commits
- [PATCH] D122258: [MC][RFC] Omit DWARF unwind info if compact unwind is present for all archs
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122258: [MC][RFC] Omit DWARF unwind info if compact unwind is present for all archs
Jez Ng via Phabricator via llvm-commits
- [PATCH] D122260: [memprof] Initialize MemInfoBlock data.
Snehasish Kumar via Phabricator via llvm-commits
- [PATCH] D122190: [AMDGPU][LLD] Adding support for ABI version 5 option
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D120231: [SelectOpti][2/4] Base Heuristics
Sotiris Apostolakis via Phabricator via llvm-commits
- [PATCH] D122260: [memprof] Initialize MemInfoBlock data.
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D122255: Meta directive runtime support
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D122262: [SelectionDAG] Add printing support for the Align value of AssertAlign nodes.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122262: [SelectionDAG] Add printing support for the Align value of AssertAlign nodes.
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 73f0af1 - [SelectionDAG] Add printing support for the Align value of AssertAlign nodes.
Craig Topper via llvm-commits
- [PATCH] D122262: [SelectionDAG] Add printing support for the Align value of AssertAlign nodes.
Craig Topper via Phabricator via llvm-commits
- [llvm] 9933015 - [X86] Fold MMX_MOVD64from64rr + store to MMX_MOVQ64mr instead of MMX_MOVD64from64mr.
Craig Topper via llvm-commits
- [PATCH] D122241: [X86] Fold MMX_MOVD64from64rr + store to MMX_MOVQ64mr instead of MMX_MOVD64from64mr.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122217: [X86] Remove TB_NO_REVERSE for 2 memory folding entries
Craig Topper via Phabricator via llvm-commits
- [PATCH] D121575: [RISCV] Add computeKnownBits support for RISCVISD::GORC.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122259: [SelectOpti][2/5] Select-to-branch base transformation
David Li via Phabricator via llvm-commits
- [PATCH] D122260: [memprof] Initialize MemInfoBlock data.
Snehasish Kumar via Phabricator via llvm-commits
- [PATCH] D122260: [memprof] Initialize MemInfoBlock data.
Snehasish Kumar via Phabricator via llvm-commits
- [PATCH] D120232: [SelectOpti][3/4] Loop Heuristics
Sotiris Apostolakis via Phabricator via llvm-commits
- [PATCH] D122260: [memprof] Initialize MemInfoBlock data.
Teresa Johnson via Phabricator via llvm-commits
- [llvm] 61c75eb - [memprof] Initialize MemInfoBlock data.
Snehasish Kumar via llvm-commits
- [PATCH] D122260: [memprof] Initialize MemInfoBlock data.
Snehasish Kumar via Phabricator via llvm-commits
- [llvm] 27a4f25 - Reland "[memprof] Store callsite metadata with memprof records."
Snehasish Kumar via llvm-commits
- [llvm] 7abefc4 - [instcombine] Fold away memset/memmove from otherwise unused alloca
Philip Reames via llvm-commits
- [PATCH] D120233: [SelectOpti][4/4] Select-to-branch transformation
Sotiris Apostolakis via Phabricator via llvm-commits
- [PATCH] D122004: [lld] Add generic helloworld test program
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D121510: [Support] Introduce the BLAKE3 hashing function implementation
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122152: [InstCombine] Fold two select patterns into and-or
Sanjay Patel via Phabricator via llvm-commits
- [lld] c9c2363 - [lld-macho][nfc] Don't mix file sizes with addresses
Jez Ng via llvm-commits
- [PATCH] D122004: [lld] Add generic helloworld test program
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D122239: [dsymutil] Update vector of section starts with size of current section
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D121987: [EarlyCSE] Don't eagerly optimize MemoryUses
Alina Sbirlea via Phabricator via llvm-commits
- [PATCH] D122263: [AMDGPU] gfx940 MAI hazard recognizer
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D121078: Replace links to archived mailing lists by links to Discourse forums
Danny Mösch via Phabricator via llvm-commits
- [PATCH] D121510: [Support] Introduce the BLAKE3 hashing function implementation
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- [PATCH] D122251: [lit] Use sharding for GoogleTest format
Yuanfang Chen via Phabricator via llvm-commits
- [PATCH] D120573: [OpenMP] Support runtime user conditions in metadirective
Abid via Phabricator via llvm-commits
- [PATCH] D121951: [AMDGPU] Only warn when mixing printf and hostcall
Scott Linder via Phabricator via llvm-commits
- [PATCH] D120573: [OpenMP] Support runtime user conditions in metadirective
Abid via Phabricator via llvm-commits
- [PATCH] D122263: [AMDGPU] gfx940 MAI hazard recognizer
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D116787: [llvm-readobj][MachO] Add option to sort the symbol table before dumping (MachO only, for now).
Vy Nguyen via Phabricator via llvm-commits
- [PATCH] D116787: [llvm-readobj][MachO] Add option to sort the symbol table before dumping (MachO only, for now).
Vy Nguyen via Phabricator via llvm-commits
- [PATCH] D119916: Add a machine function pass to convert binop(phi(constants), v) to phi(binop)
Guozhi Wei via Phabricator via llvm-commits
- [PATCH] D122268: Add PointerType analysis for DirectX backend
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- [PATCH] D122269: Modify DXILPrepare to emit no-op bitcasts
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- [PATCH] D122090: [PPCISelLowering] Avoid emitting calls to __multi3, __muloti4
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- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
Wenlei He via Phabricator via llvm-commits
- [PATCH] D122270: Support converting pointers from opaque to typed
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- [PATCH] D115653: [DAG]Introduce llvm::processShuffleMasks and use it for shuffles in DAG Type Legalizer.
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- [llvm] e22b78d - [gn build] Manually port 89f6b26
Arthur Eubanks via llvm-commits
- [PATCH] D121862: [ProfSampleLoader] When disable-sample-loader-inlining is true, merge profiles of inlined instances to outlining versions.
Wenlei He via Phabricator via llvm-commits
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- [PATCH] D122251: [lit] Use sharding for GoogleTest format
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- [PATCH] D122190: [AMDGPU][LLD] Adding support for ABI version 5 option
Jacob Lambert via Phabricator via llvm-commits
- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D122013: [InstCombine] Fold abs of known negative operand when source is sub
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- [PATCH] D122274: [AArch64] Fix AArch64TargetParser.def to match AArch64.td.
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D121539: [AVR] Generate 'rcall' instead of 'call' on avr2 and avr25
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- [llvm] 27bd8f9 - Recommit "[SLP] Fix lookahead operand reordering for splat loads." attempt 2, fixed assertion crash.
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- [PATCH] D122275: [PassManager][Coroutine] Run passes under -O0 conditionally and run GlobalDCE
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D122190: [AMDGPU][LLD] Adding support for ABI version 5 option
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122275: [PassManager][Coroutine] Run passes under -O0 conditionally and run GlobalDCE
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- [PATCH] D122275: [PassManager][Coroutine] Run passes under -O0 conditionally and run GlobalDCE
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- [PATCH] D121973: Recommit "[SLP] Fix lookahead operand reordering for splat loads."
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- [PATCH] D121672: [AVR] Reject/Reserve R0~R15 on AVRTiny
Ayke via Phabricator via llvm-commits
- [PATCH] D122166: [InstCombine] try to narrow shifted bswap-of-zext
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- [PATCH] D122148: [SLP] Peak into loads when hitting the RecursionMaxDepth
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- [PATCH] D119807: [AVR][MC] Emit some aliases for GPRs and IO registers
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- [PATCH] D121672: [AVR] Reject/Reserve R0~R15 on AVRTiny
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- [PATCH] D121767: [AVR] Fix incorrect calling convention for varargs functions
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- [llvm] 4e0008d - Revert "[InstCombine] try to narrow shifted bswap-of-zext"
Nathan Chancellor via llvm-commits
- [PATCH] D122166: [InstCombine] try to narrow shifted bswap-of-zext
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- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
Wenlei He via Phabricator via llvm-commits
- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D122081: Add DXILPrepare CodeGen pass
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- [PATCH] D121655: [llvm-profgen] Read symbolized profiles for post-processing.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
Lei Wang via Phabricator via llvm-commits
- [PATCH] D121785: The [3/3] Fix mangle problem when variable used in inline asm (Support ARR[BaseReg+IndexReg+..] in PIC model)
Xiang Zhang via Phabricator via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
Lei Wang via Phabricator via llvm-commits
- [PATCH] D122219: [AMDGPU] [NFC]: Organize the code around reserving registers.
Mahesha S via Phabricator via llvm-commits
- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D122212: [RISCV] Add alias to pack/packw
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- [llvm] f014303 - [AMDGPU] [NFC]: Organize the code around reserving registers.
via llvm-commits
- [PATCH] D122219: [AMDGPU] [NFC]: Organize the code around reserving registers.
Mahesha S via Phabricator via llvm-commits
- [PATCH] D121767: [AVR] Fix incorrect calling convention for varargs functions
Ben Shi via Phabricator via llvm-commits
- [llvm] 3fd9a32 - [AVR] Fix incorrect calling convention for varargs functions
Ben Shi via llvm-commits
- [llvm] 6edfe45 - [AVR] Add more devices
Ben Shi via llvm-commits
- [llvm] 4563893 - [AVR] Generate 'rcall' instead of 'call' on avr2 and avr25
Ben Shi via llvm-commits
- [PATCH] D121767: [AVR] Fix incorrect calling convention for varargs functions
Ben Shi via Phabricator via llvm-commits
- [PATCH] D121359: [AVR] Add more devices
Ben Shi via Phabricator via llvm-commits
- [PATCH] D121539: [AVR] Generate 'rcall' instead of 'call' on avr2 and avr25
Ben Shi via Phabricator via llvm-commits
- [PATCH] D122081: Add DXILPrepare CodeGen pass
Reid Kleckner via Phabricator via llvm-commits
- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
Lei Wang via Phabricator via llvm-commits
- [llvm] ff22501 - [NFC][llvm][StringMap]Extract createTable and getHashTable functions and add the inline attribute to the getMinBucketToReserveForEntries function.
Shengchen Kan via llvm-commits
- [PATCH] D121934: [NFC][llvm][StringMap]Extract createTable and getHashTable functions and add the inline attribute to the getMinBucketToReserveForEntries function.
Kan Shengchen via Phabricator via llvm-commits
- [llvm] b7a4b67 - [Bundle][Codegen] Ignore bundle for meta-instruction
Shengchen Kan via llvm-commits
- [PATCH] D122221: [Bundle][Codegen] Ignore bundle for meta-instruction
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122275: [PassManager][Coroutine] Run passes under -O0 conditionally and run GlobalDCE
Chuanqi Xu via Phabricator via llvm-commits
- [PATCH] D122081: Add DXILPrepare CodeGen pass
Chris Bieneman via Phabricator via llvm-commits
- [PATCH] D121898: [Verifier] Verify parameter alignment.
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122081: Add DXILPrepare CodeGen pass
Chris Bieneman via Phabricator via llvm-commits
- [PATCH] D121539: [AVR] Generate 'rcall' instead of 'call' on avr2 and avr25
Ben Shi via Phabricator via llvm-commits
- [PATCH] D122279: [SelectionDAG] Add AssertAlign to AddNodeIDCustom so that it will CSE properly.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122281: [AArch64][SelectionDAG] Refactor to support more scalable vector extending loads
Allen zhong via Phabricator via llvm-commits
- [PATCH] D122241: [X86] Fold MMX_MOVD64from64rr + store to MMX_MOVQ64mr instead of MMX_MOVD64from64mr.
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D121785: The [3/3] Fix mangle problem when variable used in inline asm (Support ARR[BaseReg+IndexReg+..] in PIC model)
Xiang Zhang via Phabricator via llvm-commits
- [PATCH] D122282: [RISCV] Remove invalid tests for zbb
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D119807: [AVR][MC] Emit some aliases for GPRs and IO registers
Ben Shi via Phabricator via llvm-commits
- [PATCH] D119807: [AVR][MC] Emit some aliases for GPRs and IO registers
Ben Shi via Phabricator via llvm-commits
- [PATCH] D121785: The [3/3] Fix mangle problem when variable used in inline asm (Support ARR[BaseReg+IndexReg+..] in PIC model)
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D120490: lld: Enable new passmanager plugin support for LTO
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- [PATCH] D119880: [FuncSpec] Support function specialization across multiple arguments.
Chuanqi Xu via Phabricator via llvm-commits
- [PATCH] D122079: [ADT] Add Enum matcher
Fangrui Song via Phabricator via llvm-commits
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- [PATCH] D121898: [Verifier] Verify parameter alignment.
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- [llvm] 0126375 - [WebAssembly] Use location of operand for operand-based type check errors
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- [PATCH] D122286: [AMDGPU] VGPR need to be reserved for AGPR copy *only* on subtarget GFX908
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- [PATCH] D122286: [AMDGPU] VGPR need to be reserved for AGPR copy *only* on subtarget GFX908
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- [PATCH] D122200: [AMDGPU] Split waterfall loop exec manipulation
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- [llvm] eb5ecbb - [llvm][AArch64] Insert "bti j" after call to setjmp
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- [PATCH] D121707: [llvm][AArch64] Insert "bti j" after call to setjmp
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- [PATCH] D122180: Cleanup include: codegen second round
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David Spickett via llvm-commits
- [PATCH] D122180: Cleanup include: codegen second round
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- [PATCH] D122299: [InstCombine] Fix missing nsw flag when fold -(x-y) to y-x
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- [PATCH] D122166: [InstCombine] try to narrow shifted bswap-of-zext
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- [PATCH] D122299: [InstCombine] Fix missing nsw flag when fold -(x-y) to y-x
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- [PATCH] D119916: Add a machine function pass to convert binop(phi(constants), v) to phi(binop)
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- [PATCH] D115653: [DAG]Introduce llvm::processShuffleMasks and use it for shuffles in DAG Type Legalizer.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D122299: [InstCombine] Fix missing nsw flag when fold -(x-y) to y-x
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- [PATCH] D122299: [InstCombine] Fix missing nsw flag when fold -(x-y) to y-x
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- [llvm] c3b9819 - Reland "[llvm][AArch64] Insert "bti j" after call to setjmp"
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- [llvm] af5dfc1 - [InstCombine] add tests for shuffle of mismatched binops; NFC
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- [PATCH] D122226: [llmv-pdbutil] Move InputFile/FormatUtil/LinePrinter to the PDB library.
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Ben Shi via llvm-commits
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- [PATCH] D121183: [RISCV] Generate correct ELF EFlags when .ll file has target-abi attribute
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- [PATCH] D122290: [RISCV] Remove check and update test file in D121183
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- [llvm] cac9773 - [SelectionDAG] Don't create entries in ValueMap in ComputePHILiveOutRegInfo
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- [PATCH] D121862: [ProfSampleLoader] When disable-sample-loader-inlining is true, merge profiles of inlined instances to outlining versions.
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- [PATCH] D122082: Add DXIL Bitcode Writer and DXIL testing
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- [llvm] 7abefc4 - [instcombine] Fold away memset/memmove from otherwise unused alloca
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- [PATCH] D122082: Add DXIL Bitcode Writer and DXIL testing
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- [PATCH] D118214: [ObjCARC] Require the function argument in the clang.arc.attachedcall bundle.
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- [PATCH] D121655: [llvm-profgen] Read symbolized profiles for post-processing.
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- [PATCH] D121862: [ProfSampleLoader] When disable-sample-loader-inlining is true, merge profiles of inlined instances to outlining versions.
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- [PATCH] D121862: [ProfSampleLoader] When disable-sample-loader-inlining is true, merge profiles of inlined instances to outlining versions.
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- [PATCH] D122069: [Clang] Add binary format for bundling offloading metadata
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- [PATCH] D121655: [llvm-profgen] Read symbolized profiles for post-processing.
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- [PATCH] D121973: Recommit "[SLP] Fix lookahead operand reordering for splat loads."
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- [PATCH] D122245: [Disassember][NFCI] Use strong type for instruction decoder
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- [lld] f858fba - [lld][Macho][NFC] Encapsulate priorities map in a priority class
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- [PATCH] D122156: [lld][Macho][NFC] Encapsulate priorities map in a priority class
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- [llvm] e6ead19 - Revert "Recommit "[SLP] Fix lookahead operand reordering for splat loads." attempt 2, fixed assertion crash."
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- [PATCH] D122263: [AMDGPU] gfx940 MAI hazard recognizer
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- [llvm] 7abefc4 - [instcombine] Fold away memset/memmove from otherwise unused alloca
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- [llvm] df1a216 - [test] Set -verify-cfg-preserved=0 in new-pm-defaults.ll
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- [PATCH] D122251: [lit] Use sharding for GoogleTest format
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- [PATCH] D122332: [AMDGPU] Improve v_cmpx usage on GFX10.3.
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- [PATCH] D122251: [lit] Use sharding for GoogleTest format
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- [PATCH] D122226: [llmv-pdbutil] Move InputFile/FormatUtil/LinePrinter to the PDB library.
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- [PATCH] D115274: [IR][RFC] Memory region declaration intrinsic
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- [llvm] d051c56 - [test] Remove the last couple uses of -analyze in llvm/test
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- [PATCH] D122337: [AMDGPU] Use GenericTable to classify DGEMM
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- [PATCH] D122263: [AMDGPU] gfx940 MAI hazard recognizer
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- [PATCH] D121437: [AMDGPU] Add s_nop WaitStates between neighboring mfma
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- [PATCH] D121973: Recommit "[SLP] Fix lookahead operand reordering for splat loads."
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- [PATCH] D122251: [lit] Use sharding for GoogleTest format
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- [PATCH] D121437: [AMDGPU] Add s_nop WaitStates between neighboring mfma
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- [PATCH] D122258: [MC][RFC] Omit DWARF unwind info if compact unwind is present for all archs
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- [PATCH] D118214: [ObjCARC] Require the function argument in the clang.arc.attachedcall bundle.
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- [PATCH] D121510: [Support] Introduce the BLAKE3 hashing function implementation
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- [PATCH] D122268: Add PointerType analysis for DirectX backend
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- [PATCH] D118214: [ObjCARC] Require the function argument in the clang.arc.attachedcall bundle.
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- [PATCH] D122251: [lit] Use sharding for GoogleTest format
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- [llvm] b75399a - [InstCombine] Add some initial SimplifyDemandedBits tests for removal of ashr with sufficient signbits
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- [PATCH] D122077: [InstCombine] Fold (ctpop(X) == 1) | (X == 0) into ctpop(X) < 2
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- [PATCH] D122339: [AMDGPU] gfx940 VALU hazard recognizer
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- [llvm] 6c90a65 - [RISCV] Simplify some code in lowering vector int<->fp conversions. NFC
Craig Topper via llvm-commits
- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
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- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
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- [PATCH] D122340: [InstCombine] SimplifyDemandedUseBits - remove ashr node if we only demand known sign bits
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- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
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- [llvm] 52f323d - [InstCombine] Fold abs of known negative operand when source is sub
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- [PATCH] D122013: [InstCombine] Fold abs of known negative operand when source is sub
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- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
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- [llvm] b6efd25 - [InstCombine] add tests for nsw propagation; NFC
Sanjay Patel via llvm-commits
- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
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- [PATCH] D122191: [AMDGPU] Support gfx940 smfmac instructions
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- [PATCH] D122345: [gn build] Change python run lines to python3
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- [llvm] e85aee0 - [gn build] (manually) port b0fd9497af6d
Nico Weber via llvm-commits
- [llvm] b6efd25 - [InstCombine] add tests for nsw propagation; NFC
Roman Lebedev via llvm-commits
- [PATCH] D121366: Allow ImproveChain to get past relaxed atomics
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- [PATCH] D122191: [AMDGPU] Support gfx940 smfmac instructions
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- [PATCH] D122274: [AArch64] Fix AArch64TargetParser.def to match AArch64.td.
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- [llvm] e2074de - [ProfSampleLoader] When disable-sample-loader-inlining is true, merge profiles of inlined instances to outlining versions.
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- [PATCH] D121862: [ProfSampleLoader] When disable-sample-loader-inlining is true, merge profiles of inlined instances to outlining versions.
Mingming Liu via Phabricator via llvm-commits
- [PATCH] D119788: [AArch64] Add support for -march=native for Apple M1 CPU
Ahmed Bougacha via Phabricator via llvm-commits
- [llvm] f9889dd - [gn build] (manually) port b0fd9497af6
Nico Weber via llvm-commits
- [PATCH] D122077: [InstCombine] Fold (ctpop(X) == 1) | (X == 0) into ctpop(X) < 2
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- [llvm] 69cde91 - [gn build] add llvm_install_cctools_symlinks arg
Nico Weber via llvm-commits
- [PATCH] D122312: [gn build] add llvm_install_cctools_symlinks arg
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- [llvm] 890fc21 - [LV] Extend checks in debugloc.ll.
Florian Hahn via llvm-commits
- [llvm] 88da78d - Install symlink "otool" if LLVM_INSTALL_CCTOOLS_SYMLINKS is set
Nico Weber via llvm-commits
- [PATCH] D122313: Install symlink "otool" if LLVM_INSTALL_CCTOOLS_SYMLINKS is set
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- [PATCH] D122312: [gn build] add llvm_install_cctools_symlinks arg
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- [PATCH] D121510: [Support] Introduce the BLAKE3 hashing function implementation
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- [PATCH] D115274: [IR][RFC] Memory region declaration intrinsic
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- [PATCH] D118214: [ObjCARC] Require the function argument in the clang.arc.attachedcall bundle.
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- [llvm] 0ff3cc2 - [gn build] Change python run lines to python3
Nico Weber via llvm-commits
- [PATCH] D122345: [gn build] Change python run lines to python3
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- [PATCH] D122348: [x86][scheduler] Add MIR test for 41914
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D115274: [IR][RFC] Memory region declaration intrinsic
Alexander Richardson via Phabricator via llvm-commits
- [PATCH] D121643: [llvm-profgen] On-demand pseudo probe decoding
Wenlei He via Phabricator via llvm-commits
- [llvm] ee94a4a - [Attributor][FIX] Avoid endless recursion, simple case
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- [llvm] 1e15adb - [AMDGPU] Add s_nop WaitStates between neighboring mfma
Austin Kerbow via llvm-commits
- [PATCH] D121437: [AMDGPU] Add s_nop WaitStates between neighboring mfma
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- [PATCH] D122328: [IRMover] Do not drop names of struct types that are used
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- [PATCH] D122328: [IRMover] Do not drop names of struct types that are used
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- [PATCH] D122350: [WIP][X86SchedSandyBridge] update cost of COPY to 1 cycle from 0
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- [llvm] fcca10c - [AArch64] Add support for -march=native for Apple M1 CPU
Keith Smiley via llvm-commits
- [PATCH] D119788: [AArch64] Add support for -march=native for Apple M1 CPU
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- [PATCH] D122350: [WIP][X86SchedSandyBridge] update cost of COPY to 1 cycle from 0
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- [llvm] 3f97016 - [llvm-profgen] Decoding pseudo probe for profiled function only.
Hongtao Yu via llvm-commits
- [PATCH] D121643: [llvm-profgen] Decoding pseudo probe for profiled function only.
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- [PATCH] D121296: [GlobalIsel][X86] Legalization of G_IS_FPCLASS
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- [llvm] fc3cdd0 - Revert "[AArch64] Add support for -march=native for Apple M1 CPU"
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- [PATCH] D122210: [llvm-profdata] Unify default cutoffs for detailed summary printing
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- [PATCH] D122328: [IRMover] Do not drop names of struct types that are used
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- [PATCH] D118680: [Intrinsics] Add `nocallback` to the default intrinsic attributes
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- [llvm] 0ca8ff4 - [llvm-profdata] Unify default cutoffs for detailed summary printing
Wenlei He via llvm-commits
- [PATCH] D122210: [llvm-profdata] Unify default cutoffs for detailed summary printing
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- [PATCH] D122205: [LoopIdiom] Merge TBAA of adjacent stores when creating memset
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- [PATCH] D122205: [LoopIdiom] Merge TBAA of adjacent stores when creating memset
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- [llvm] 955cff8 - reland: [AArch64] Add support for -march=native for Apple M1 CPU
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- [PATCH] D121510: [Support] Introduce the BLAKE3 hashing function implementation
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- [llvm] dcad676 - [CGSCC] Use make_early_inc_range. NFC
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- [PATCH] D122357: Decouple order file and callgraph ordering logic.
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- [compiler-rt] 0f6d950 - [NFCI] Fix set-but-unused warning in asan_fake_stack.cpp
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- [PATCH] D122207: [IROutliner][IRSim] Add all outlined region basic blocks to canonical numbering to add basic blocks to generated PHINode numbering generation.
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- [PATCH] D122226: [llmv-pdbutil] Move InputFile/FormatUtil/LinePrinter to the PDB library.
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- [PATCH] D117248: Get rid of global constructor in llvm/lib/Support/Signals.cpp in C++20 mode
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- [PATCH] D121736: Lower `@llvm.global_dtors` using `__cxa_atexit` on MachO
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- [llvm] 0396e22 - Revert "[gn build] Port 9c542a5a4e1b"
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- [PATCH] D122065: [BOLT] Align constant islands to 8 bytes
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- [llvm] 7abefc4 - [instcombine] Fold away memset/memmove from otherwise unused alloca
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- [PATCH] D115129: [GlobalISel] Add hasPostISelHook handling.
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- [llvm] 2c25c65 - [PowerPC] The BL8_NOTOC_RM instruction needs to produce a notoc relocation.
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- [PATCH] D122012: [PowerPC] The BL8_NOTOC_RM instruction needs to produce a notoc relocation.
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- [PATCH] D121510: [Support] Introduce the BLAKE3 hashing function implementation
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- [PATCH] D121655: [llvm-profgen] Read symbolized profiles for post-processing.
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- [PATCH] D120641: [RISCV] Add codegen for vp.fptosi.
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- [PATCH] D122200: [AMDGPU] Split waterfall loop exec manipulation
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- [PATCH] D122365: [LoongArch] Add LoongArch support to update_llc_test_checks
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- [PATCH] D122365: [LoongArch] Add LoongArch support to update_llc_test_checks
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- [llvm] 39aa202 - Recommit "[SLP] Fix lookahead operand reordering for splat loads." attempt 3, fixed assertion crash.
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- [PATCH] D121973: Recommit "[SLP] Fix lookahead operand reordering for splat loads."
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- [PATCH] D122366: [LoongArch] Construct codegen infra and generate first add instruction.
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- [llvm] 64902d3 - Reland "Lower `@llvm.global_dtors` using `__cxa_atexit` on MachO"
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- [llvm] 8a6b644 - [Inline asm] Fix mangle problem when variable used in inline asm.
Xiang1 Zhang via llvm-commits
- [llvm] 287dad1 - [InlineAsm] Fix mangle problem when global variable used in inline asm
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- [PATCH] D120886: [Inline asm][1/3] Fix mangle problem when variable used in inline asm (Revert 2 history bugfix patch)
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- [llvm] 9566405 - [Inline asm] Fix mangle problem when variable used in inline asm.
Xiang1 Zhang via llvm-commits
- [PATCH] D120887: The [2/3] Fix mangle problem when variable used in inline asm (Add modifier P for ARR[BaseReg+IndexReg+..])
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- [PATCH] D121785: The [3/3] Fix mangle problem when variable used in inline asm (Support ARR[BaseReg+IndexReg+..] in PIC model)
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- [PATCH] D121736: Lower `@llvm.global_dtors` using `__cxa_atexit` on MachO
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- [llvm] bf6f511 - [gn build] Port 64902d335c21
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- [PATCH] D122366: [LoongArch] Construct codegen infra and generate first add instruction.
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- [PATCH] D114342: ConvertUTF, new wrapper API
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- [llvm] d7afea9 - [AVR][MC] Emit some aliases for GPRs and IO registers
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- [PATCH] D119807: [AVR][MC] Emit some aliases for GPRs and IO registers
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- [PATCH] D121510: [Support] Introduce the BLAKE3 hashing function implementation
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- [PATCH] D121510: [Support] Introduce the BLAKE3 hashing function implementation
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- [PATCH] D122195: [polly] Remove last instances of -analyze
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- [PATCH] D122245: [Disassember][NFCI] Use strong type for instruction decoder
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- [PATCH] D122200: [AMDGPU] Split waterfall loop exec manipulation
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- [llvm] f319c24 - [AVR] Reject/Reserve R0~R15 on AVRTiny.
Ben Shi via llvm-commits
- [PATCH] D121672: [AVR] Reject/Reserve R0~R15 on AVRTiny
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- [PATCH] D122332: [AMDGPU] Improve v_cmpx usage on GFX10.3.
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- [PATCH] D122245: [Disassember][NFCI] Use strong type for instruction decoder
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- [PATCH] D122416: [llvm][NFC] Prefer using variadic isa<> over non-variadic isa<>s
Hirochika Matsumoto via Phabricator via llvm-commits
- [llvm] dc58c3b - [X86] Add additional 'add/sub single bit' patterns
Simon Pilgrim via llvm-commits
- [llvm] 8722c12 - [mlir][OpenMP][IRBuilder] Add support for nowait on single construct
Shraiysh Vaishay via llvm-commits
- [PATCH] D122371: [mlir][OpenMP][IRBuilder] Add support for nowait on single construct
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- [llvm] 9aa7019 - [Support] Introduce the BLAKE3 hashing function implementation
Argyrios Kyrtzidis via llvm-commits
- [PATCH] D121510: [Support] Introduce the BLAKE3 hashing function implementation
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- [llvm] 7f05aa2 - [Support/BLAKE3] LLVM-specific changes over the original BLAKE3 C implementation
Argyrios Kyrtzidis via llvm-commits
- [PATCH] D122377: [PowerPC][Linux] Support 16-byte lock free atomics on pwr8 and up
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122247: [OpenMP] Initial parsing/sema for the 'omp parallel loop' construct
Jake Egan via Phabricator via llvm-commits
- [PATCH] D122336: [InstrProfiling] No runtime hook for unused funcs
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- [PATCH] D121647: [runtimes] Detect changes to Tests.cmake
Joel E. Denny via Phabricator via llvm-commits
- [llvm] 597aefa - Fix unused variable warning by embedding inside assertion
Simon Pilgrim via llvm-commits
- [PATCH] D122337: [AMDGPU] Use GenericTable to classify DGEMM
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D122416: [llvm][NFC] Prefer using variadic isa<> over non-variadic isa<>s
Hirochika Matsumoto via Phabricator via llvm-commits
- [PATCH] D122367: [AMDGPU] [NFC] Introduce subtargets check for MI hardware.
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D121376: [RISCV][RVV] Introduce roundmode operand to PseudoVAADD instruction
ShihPo Hung via Phabricator via llvm-commits
- [PATCH] D121299: [NVPTX] Disable DWARF .file directory for PTX
Fangrui Song via Phabricator via llvm-commits
- [llvm] a7ea304 - [gn build] Manually port 0c86198b2
Arthur Eubanks via llvm-commits
- [PATCH] D122381: [NVPTX] Remove code duplication in LowerCall
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D121299: [NVPTX] Disable DWARF .file directory for PTX
Fangrui Song via Phabricator via llvm-commits
- [llvm] 33b214b - [X86] combineSub - fold SUB(X, ADC(Y, 0, W)) -> SBB(X, Y, W)
Simon Pilgrim via llvm-commits
- [PATCH] D121299: [NVPTX] Disable DWARF .file directory for PTX
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D122416: [llvm][NFC] Prefer using variadic isa<> over non-variadic isa<>s
Hirochika Matsumoto via Phabricator via llvm-commits
- [PATCH] D122420: [opt] Remove -analyze option
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D121299: [NVPTX] Disable DWARF .file directory for PTX
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122376: [IR] Support named struct result in intrinsic remangling
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D122065: [BOLT] Align constant islands to 8 bytes
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D122382: [SelectionDAG] Don't create illegally-typed nodes while constant folding
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122379: [BPF] Don't fetch alignment of llvm.preserve.union.access.index argument
Yonghong Song via Phabricator via llvm-commits
- [llvm] 418ecab - [Support/BLAKE3] Temporarily disable building the assembly files to get the builders back to green
Argyrios Kyrtzidis via llvm-commits
- [lld] d3e5b6f - [ELF] Implement --build-id={md5, sha1} with truncated BLAKE3
Fangrui Song via llvm-commits
- [PATCH] D121531: [ELF] Implement --build-id={md5, sha1} with truncated BLAKE3
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122420: [opt] Remove -analyze option
Alina Sbirlea via Phabricator via llvm-commits
- [llvm] a9b70a8 - [Support/BLAKE3] Temporarily disable building neon file to get builders back to green
Argyrios Kyrtzidis via llvm-commits
- [llvm] 65d4354 - [InstCombine] add more tests for nsw propagation; NFC
Sanjay Patel via llvm-commits
- [PATCH] D121510: [Support] Introduce the BLAKE3 hashing function implementation
Nico Weber via Phabricator via llvm-commits
- [PATCH] D121299: [NVPTX] Disable DWARF .file directory for PTX
Andrew Savonichev via Phabricator via llvm-commits
- [PATCH] D122044: [AMDGPU] New gfx940 mfma instructions
Konstantin Zhuravlyov via Phabricator via llvm-commits
- [llvm] 7aea3ea - [Intrinsics] Add `nocallback` to the default intrinsic attributes
Johannes Doerfert via llvm-commits
- [PATCH] D118680: [Intrinsics] Add `nocallback` to the default intrinsic attributes
Johannes Doerfert via Phabricator via llvm-commits
- [llvm] 0bfa1ab - [gn build] (manually) port 9aa701984d39 (BLAKE3)
Nico Weber via llvm-commits
- [llvm] 65d4354 - [InstCombine] add more tests for nsw propagation; NFC
Roman Lebedev via llvm-commits
- [PATCH] D121299: [NVPTX] Disable DWARF .file directory for PTX
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D121853: [scudo][NFC] Suppress warnings for missing-noreturn, conditional-uninitialized, zero-length-array
Vitaly Buka via Phabricator via llvm-commits
- [llvm] 973acc3 - [gn build] ugly hack to work around sync script for now
Nico Weber via llvm-commits
- [PATCH] D121848: [scudo] Remove unused header includes and fix declarations
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D122421: [z/OS] Clean up some z/OS testcases.
Neumann Hon via Phabricator via llvm-commits
- [llvm] c5f7890 - Revert "[Intrinsics] Add `nocallback` to the default intrinsic attributes"
Johannes Doerfert via llvm-commits
- [llvm] 8424d4f - [gn build] Manually port llvm/lib/Support/BLAKE3
Fangrui Song via llvm-commits
- [PATCH] D121851: [scudo][tests] Ensure test assertions have matching type
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D122336: [InstrProfiling] No runtime hook for unused funcs
Vedant Kumar via Phabricator via llvm-commits
- [PATCH] D121299: [NVPTX] Disable DWARF .file directory for PTX
Andrew Savonichev via Phabricator via llvm-commits
- [llvm] 1e3713f - [gn build] Port
LLVM GN Syncbot via llvm-commits
- [llvm] 27439a7 - [AMDGPU] New gfx940 mfma instructions
Stanislav Mekhanoshin via llvm-commits
- [PATCH] D122044: [AMDGPU] New gfx940 mfma instructions
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [llvm] 2e44b78 - [VectorCombine] Insert addrspacecast when crossing address space boundaries
Fraser Cormack via llvm-commits
- [PATCH] D121787: [VectorCombine] Insert addrspacecast when crossing address space boundaries
Fraser Cormack via Phabricator via llvm-commits
- [PATCH] D120990: [demangler] Add StringView conversion operator
Nathan Sidwell via Phabricator via llvm-commits
- [llvm] 8705708 - Revert "[gn build] Manually port llvm/lib/Support/BLAKE3"
Nico Weber via llvm-commits
- [PATCH] D121737: [PseudoProbe] Do not emit pseudo probes when module is not probed.
Hongtao Yu via Phabricator via llvm-commits
- [compiler-rt] dd67e69 - [ASan] Reland of D116182 to always link asan_static library.
Kirill Stoimenov via llvm-commits
- [PATCH] D112711: [fir] Add FIR CSE specific pass
Valentin Clement via Phabricator via llvm-commits
- [llvm] 6e3e14f - [AMDGPU] Support gfx940 smfmac instructions
Stanislav Mekhanoshin via llvm-commits
- [PATCH] D122191: [AMDGPU] Support gfx940 smfmac instructions
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D122427: [MIPS] Initial support for MIPS-I load delay slots
Spencer Alves via Phabricator via llvm-commits
- [PATCH] D122428: Make BLAKE3 a component library
Nico Weber via Phabricator via llvm-commits
- [PATCH] D121510: [Support] Introduce the BLAKE3 hashing function implementation
Nico Weber via Phabricator via llvm-commits
- [PATCH] D122428: Make BLAKE3 a component library
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D115907: [misexpect] Re-implement MisExpect Diagnostics
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D121852: [scudo] Use templated builtins to avoid assumptions on SCUDO_WORDSIZE
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D115907: [misexpect] Re-implement MisExpect Diagnostics
Paul Kirth via Phabricator via llvm-commits
- [llvm] cad9de7 - [AMDGPU] gfx940 MAI hazard recognizer
Stanislav Mekhanoshin via llvm-commits
- [PATCH] D122263: [AMDGPU] gfx940 MAI hazard recognizer
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D122428: Make BLAKE3 a component library
Nico Weber via Phabricator via llvm-commits
- [PATCH] D122428: Make BLAKE3 a component library
Nico Weber via Phabricator via llvm-commits
- [PATCH] D122065: [BOLT] Align constant islands to 8 bytes
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D122428: Make BLAKE3 a component library
Argyrios Kyrtzidis via Phabricator via llvm-commits
- [llvm] 64838ba - [AMDGPU] Use GenericTable to classify DGEMM
Stanislav Mekhanoshin via llvm-commits
- [PATCH] D122337: [AMDGPU] Use GenericTable to classify DGEMM
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D120905: [demangler] Add operator precedence
John McCall via Phabricator via llvm-commits
- [PATCH] D122431: Basic support for posix_memalign / __builtin_object_size interaction
serge via Phabricator via llvm-commits
- [PATCH] D122431: Basic support for posix_memalign / __builtin_object_size interaction
Dávid Bolvanský via Phabricator via llvm-commits
- [PATCH] D122433: [Support] Add OpauqeDataStore
Chris Bieneman via Phabricator via llvm-commits
- [PATCH] D122041: [llvm][utils] Fix llvm::Optional summary provider
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D122434: [Support] Add OpauqeDataStore
Chris Bieneman via Phabricator via llvm-commits
- [PATCH] D95026: [SimplifyCFG] Update FoldBranchToCommonDest to be poison-safe
Nick Desaulniers via Phabricator via llvm-commits
- [llvm] df0b893 - [opt] Remove -analyze option
Arthur Eubanks via llvm-commits
- [PATCH] D122420: [opt] Remove -analyze option
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D119376: [LoopAccessAnalysis] Simplify D119047
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D122268: Add PointerType analysis for DirectX backend
Chris Bieneman via Phabricator via llvm-commits
- [PATCH] D122433: [Support] Add OpauqeDataStore
Chris Bieneman via Phabricator via llvm-commits
- [PATCH] D122382: [SelectionDAG] Don't create illegally-typed nodes while constant folding
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122269: Modify DXILPrepare to emit no-op bitcasts
Chris Bieneman via Phabricator via llvm-commits
- [PATCH] D122270: Support converting pointers from opaque to typed
Chris Bieneman via Phabricator via llvm-commits
- [PATCH] D122436: Teach the AArch64 backend that vector reduction NEON instructions implicitly zero the high lanes of the result, meaning that we can eliminate explicit zeroing.
Owen Anderson via Phabricator via llvm-commits
- [PATCH] D122024: NFC. Refactor bitcode writer
Chris Bieneman via Phabricator via llvm-commits
- [PATCH] D122270: Support converting pointers from opaque to typed
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D122270: Support converting pointers from opaque to typed
Chris Bieneman via Phabricator via llvm-commits
- [PATCH] D122339: [AMDGPU] gfx940 VALU hazard recognizer
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D122270: Support converting pointers from opaque to typed
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D112711: [fir] Add FIR CSE specific pass
Mehdi AMINI via Phabricator via llvm-commits
- [llvm] df0b893 - [opt] Remove -analyze option
Philip Reames via llvm-commits
- [PATCH] D120958: [TableGen] Add support for variable length instruction in decoder generator
Sheng via Phabricator via llvm-commits
- [PATCH] D120958: [TableGen] Add support for variable length instruction in decoder generator
Sheng via Phabricator via llvm-commits
- [llvm] df0b893 - [opt] Remove -analyze option
Philip Reames via llvm-commits
- [PATCH] D120960: [M68k][Disassembler] Adopt the new variable length decoder
Sheng via Phabricator via llvm-commits
- [PATCH] D118680: [Intrinsics] Add `nocallback` to the default intrinsic attributes
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D122442: [CSSPGO] Turn on profi and ext-tsp when using probe-based profile.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D122442: [CSSPGO] Turn on profi and ext-tsp when using probe-based profile.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D122442: [CSSPGO] Turn on profi and ext-tsp when using probe-based profile.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D122442: [CSSPGO] Turn on profi and ext-tsp when using probe-based profile.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D122336: [InstrProfiling] No runtime hook for unused funcs
Gulfem Savrun Yeniceri via Phabricator via llvm-commits
- [PATCH] D122336: [InstrProfiling] No runtime hook for unused funcs
Vedant Kumar via Phabricator via llvm-commits
- [PATCH] D122336: [InstrProfiling] No runtime hook for unused funcs
Gulfem Savrun Yeniceri via Phabricator via llvm-commits
- [PATCH] D122367: [AMDGPU] [NFC] Introduce subtargets check for MI hardware.
Mahesha S via Phabricator via llvm-commits
- [PATCH] D122296: [NewPM] Add OptimizerEarly module extension point
Wenju He via Phabricator via llvm-commits
- [PATCH] D122405: [llvm] Initialize and move UseUpRegs outside of `union` MemOp struct.
Xiang Zhang via Phabricator via llvm-commits
- [PATCH] D122442: [CSSPGO] Turn on profi and ext-tsp when using probe-based profile.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D118680: [Intrinsics] Add `nocallback` to the default intrinsic attributes
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D122200: [AMDGPU] Split waterfall loop exec manipulation
Carl Ritson via Phabricator via llvm-commits
- [PATCH] D122200: [AMDGPU] Split waterfall loop exec manipulation
Carl Ritson via Phabricator via llvm-commits
- [PATCH] D122442: [CSSPGO] Turn on profi and ext-tsp when using probe-based profile.
Hongtao Yu via Phabricator via llvm-commits
- [llvm] c4eae8a - Make BLAKE3 a component library
Nico Weber via llvm-commits
- [PATCH] D122428: Make BLAKE3 a component library
Nico Weber via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122405: [llvm] Initialize and move UseUpRegs outside of `union` MemOp struct.
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122447: Prevent comparison with wider type in loop condition
Aakanksha Patil via Phabricator via llvm-commits
- [PATCH] D122448: Revert "[X86] Fix handling of maskmovdqu in X32"
Kan Shengchen via Phabricator via llvm-commits
- [llvm] b62ea9b - [AVR] Add more devices
Ben Shi via llvm-commits
- [PATCH] D122401: [AVR] Add more devices
Ben Shi via Phabricator via llvm-commits
- [PATCH] D122449: [X86][test] Add encoding/decoding tests for VEX instruction w/ address-size prefix
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D119880: [FuncSpec] Support function specialization across multiple arguments.
Chuanqi Xu via Phabricator via llvm-commits
- [PATCH] D90006: Exposes interface to free up caching data structure in DWARFDebugLine and DWARFUnit for memory management
Florin Papa via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122450: [ELF] Default to --no-fortran-common
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122204: [RISCV][NFC] Remove redundant check and rename functions in some IR tests
WangLian via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122220: [InlineAsm] Add support for address operands ("p").
Xiang Zhang via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D90006: Exposes interface to free up caching data structure in DWARFDebugLine and DWARFUnit for memory management
Florin Papa via Phabricator via llvm-commits
- [PATCH] D122220: [InlineAsm] Add support for address operands ("p").
Xiang Zhang via Phabricator via llvm-commits
- [PATCH] D121430: [PowerPC] Fix lowering of byval parameters for sizes greater than 8 bytes.
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D122405: [llvm] Initialize and move UseUpRegs outside of `union` MemOp struct.
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D122453: [test][AArch64] Add a test case for D121180 NFC
Allen zhong via Phabricator via llvm-commits
- [PATCH] D122454: [RISCV] (and (not (srl X, C)), 1) to (sltiu (andi X, 2 << C), 1) when Zbs extension disable
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D122455: Revert "[RISCV] Add policy operand for masked compare and vmsbf/vmsif/vmsof IR"
Zakk Chen via Phabricator via llvm-commits
- [PATCH] D122456: [RISCV] Use maskedoff to decide mask policy for masked compare and vmsbf/vmsif/vmsof.
Zakk Chen via Phabricator via llvm-commits
- [PATCH] D122454: [RISCV] (and (not (srl X, C)), 1) to (sltiu (andi X, 2 << C), 1) when Zbs extension disable
Craig Topper via Phabricator via llvm-commits
- [PATCH] D115130: [AMDGPU][GlobalISel] Handle hasPostISelHook for atomic inst without return.
Abinav Puthan Purayil via Phabricator via llvm-commits
- [PATCH] D115129: [GlobalISel] Add hasPostISelHook handling.
Abinav Puthan Purayil via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Craig Topper via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122457: [LSR] Canonicalize formula before inserting it.
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122259: [SelectOpti][2/5] Select-to-branch base transformation
David Li via Phabricator via llvm-commits
- [PATCH] D122458: [RISCV][WIP] Enable TargetLowering::hasBitTest for masks that fit in ANDI.
Craig Topper via Phabricator via llvm-commits
- [lld] 940bd4c - [ELF] addSectionSymbols: simplify isec->getOutputSection(). NFC
Fangrui Song via llvm-commits
- [PATCH] D122454: [RISCV] (and (not (srl X, C)), 1) to (sltiu (andi X, 2 << C), 1) when Zbs extension disable
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122459: [ELF] Fix relocations against .eh_frame
Ayrton Muñoz via Phabricator via llvm-commits
- [PATCH] D121737: [PseudoProbe] Do not emit pseudo probes when module is not probed.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D122405: [llvm] Initialize and move UseUpRegs outside of `union` MemOp struct.
Xiang Zhang via Phabricator via llvm-commits
- [PATCH] D121655: [llvm-profgen] Read sample profiles for post-processing.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D122462: [PowerPC] Add guard in LowerSELECT_CC for ppcf128
Ting Wang via Phabricator via llvm-commits
- [PATCH] D121951: [AMDGPU][OpenCL] Add "amdgpu-no-hostcall-ptr" in Clang codegen pre-COV_5
Scott Linder via Phabricator via llvm-commits
- [PATCH] D122462: [PowerPC] Add guard in LowerSELECT_CC for ppcf128
Kai Luo via Phabricator via llvm-commits
- [PATCH] D121651: [llvm-profdata] Convert nested profile to CS flat profile.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D121951: [AMDGPU][OpenCL] Add "amdgpu-no-hostcall-ptr" in Clang codegen pre-COV_5
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D122462: [PowerPC] Add guard in LowerSELECT_CC for ppcf128
Ting Wang via Phabricator via llvm-commits
- [PATCH] D122163: [StripDeadDebugInfo] Drop dead CUs
Mikhail Lychkov via Phabricator via llvm-commits
- [PATCH] D122463: [ELF] --emit-relocs: fix missing STT_SECTION when the first input section is synthetic
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122463: [ELF] --emit-relocs: fix missing STT_SECTION when the first input section is synthetic
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122463: [ELF] --emit-relocs: fix missing STT_SECTION when the first input section is synthetic
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122251: [lit] Use sharding for GoogleTest format
James Henderson via Phabricator via llvm-commits
- [PATCH] D122454: [RISCV] (and (not (srl X, C)), 1) to (sltiu (andi X, 2 << C), 1) when Zbs extension disable
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D122377: [PowerPC][Linux] Support 16-byte lock free atomics on pwr8 and up
Kai Luo via Phabricator via llvm-commits
- [PATCH] D112711: [fir] Add FIR CSE specific pass
Valentin Clement via Phabricator via llvm-commits
- [PATCH] D122377: [PowerPC][Linux] Support 16-byte lock free atomics on pwr8 and up
Kai Luo via Phabricator via llvm-commits
- [PATCH] D122332: [AMDGPU] Improve v_cmpx usage on GFX10.3.
Thomas Symalla via Phabricator via llvm-commits
- [llvm] 7511213 - [llvm-pdbutil] Move InputFile/FormatUtil/LinePrinter to PDB library.
Carlos Alberto Enciso via llvm-commits
- [PATCH] D122226: [llvm-pdbutil] Move InputFile/FormatUtil/LinePrinter to the PDB library.
Carlos Alberto Enciso via Phabricator via llvm-commits
- [llvm] 382797d - [gn build] Port 75112133b83e
LLVM GN Syncbot via llvm-commits
- [llvm] 3929f91 - Release Workflow: Remove cherry-pick-failed label when pull request is created
Tom Stellard via llvm-commits
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- [PATCH] D120958: [TableGen] Add support for variable length instruction in decoder generator
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- [llvm] c48b464 - [BPF] Don't fetch alignment of llvm.preserve.union.access.index argument
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- [PATCH] D122379: [BPF] Don't fetch alignment of llvm.preserve.union.access.index argument
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- [llvm] 5bf86d9 - [NVPTX] Remove code duplication in LowerCall
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- [PATCH] D122367: [AMDGPU] [NFC] Introduce subtargets check for MI hardware.
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- [llvm] a2c0c4a - [PowerPC] Add test for failing lowering llvm.ppc.cfence on i128. NFC.
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- [PATCH] D121137: [AArch64] Lower 3 and 4 sources buildvectors to TBL
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- [llvm] 3d8d60e - Revert "[AArch64] Lower 3 and 4 sources buildvectors to TBL"
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- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
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- [llvm] 19de2a5 - [X86] Add test showing failure to fold add(adc(x,0,carry),c) -> adc(x,c,carry)
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- [PATCH] D122367: [AMDGPU] [NFC] Introduce subtargets check for MI hardware.
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- [llvm] ae95f29 - [AsmPrinter] AIXException::endFunction - use cast<> instead of dyn_cast<> to avoid dereference of nullptr
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- [PATCH] D122470: [AMDGPU] Move VOP3 classes into VOPInstructions.td. NFC.
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- [llvm] 1a94392 - [Utils] stripDebugifyMetadata - use cast<> instead of dyn_cast_or_null<> to avoid dereference of nullptr
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- [llvm] e699b5d - [AArch64] isProfitableToHoist - remove nullptr test
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- [PATCH] D122471: [IR] Require intrinsic struct return type to be anonymous
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- [PATCH] D122472: [PowerPC][Atomics] Fix lowering of llvm.ppc.cfence on i128 if `-ppc-quadword-atomics` is not specified
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- [llvm] 718aec2 - [AMDGPU] Improve v_cmpx usage on GFX10.3.
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- [PATCH] D122332: [AMDGPU] Improve v_cmpx usage on GFX10.3.
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- [PATCH] D122471: [IR] Require intrinsic struct return type to be anonymous
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- [PATCH] D122473: Add new explanation for some shortcomings(WPD, CFI) for lexicon
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- [PATCH] D122071: [SDAG] enable binop identity constant folds for multiplies
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- [PATCH] D122071: [SDAG] enable binop identity constant folds for multiplies
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- [llvm] 3db858c - [X86] combineAdd - fold ADD(ADC(Y, 0, W), X) -> ADC(X, Y, W)
Simon Pilgrim via llvm-commits
- [PATCH] D122071: [SDAG] enable binop identity constant folds for multiplies
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- [PATCH] D122204: [RISCV][NFC] Remove redundant check and rename functions in some IR tests
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- [PATCH] D122391: [llvm] Fix string copy confusion
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- [PATCH] D122071: [SDAG] enable binop identity constant folds for multiplies
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- [llvm] e209190 - [SDAG] enable binop identity constant folds for multiplies
Simon Pilgrim via llvm-commits
- [PATCH] D122071: [SDAG] enable binop identity constant folds for multiplies
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- [PATCH] D122458: [RISCV][WIP] Enable TargetLowering::hasBitTest for masks that fit in ANDI.
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- [PATCH] D120905: [demangler] Add operator precedence
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- [PATCH] D122427: [MIPS] Initial support for MIPS-I load delay slots
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- [PATCH] D122382: [SelectionDAG] Don't create illegally-typed nodes while constant folding
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- [PATCH] D122071: [SDAG] enable binop identity constant folds for multiplies
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- [PATCH] D122382: [SelectionDAG] Don't create illegally-typed nodes while constant folding
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- [llvm] b0225ab - Prevent comparison with wider type in loop condition
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- [PATCH] D122447: Prevent comparison with wider type in loop condition
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- [PATCH] D122474: demangler] Parenthesize >> inside template args
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- [PATCH] D120960: [M68k][Disassembler] Adopt the new variable length decoder
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- [PATCH] D120960: [M68k][Disassembler] Adopt the new variable length decoder
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- [PATCH] D122475: [X86] Refactor X86ScalarSSEf16/32/64 with hasFP16/SSE1/SSE2. NFCI
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- [PATCH] D122475: [X86] Refactor X86ScalarSSEf16/32/64 with hasFP16/SSE1/SSE2. NFCI
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- [PATCH] D120169: [Debuginfo][LSR} Add support for salvaging variadic dbg.value intrinsics [2/2]
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- [llvm] 43a969d - [X86] combineADC - pull out repeated dyn_cast<ConstantSDNode> calls. NFC.
Simon Pilgrim via llvm-commits
- [PATCH] D109577: [LNT] Fixed incorrect orders behavior in case of miss formatted llvm_project_revision
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- [PATCH] D122477: [X86][tablgen] Consider the mnemonic when auto-generating memory folding table
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D121951: [AMDGPU][OpenCL] Add "amdgpu-no-hostcall-ptr" in Clang codegen pre-COV_5
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- [llvm] ead294b - [NFC][SimplifyCFG] Add test from https://github.com/llvm/llvm-project/issues/53861
Roman Lebedev via llvm-commits
- [llvm] f6b60b3 - [SimplifyCFG] `FoldBranchToCommonDest()`: allow branch-on-select
Roman Lebedev via llvm-commits
- [PATCH] D70401: [RISCV] Complete RV32E/ilp32e implementation
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- [PATCH] D117426: [AVR] Only push and clear R1 in interrupts when necessary
Ayke via Phabricator via llvm-commits
- [PATCH] D122478: [PowerPC] Add max/min intrinsics to Clang and PPC backend
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- [PATCH] D122477: [X86][tablgen] Consider the mnemonic when auto-generating memory folding table
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- [PATCH] D122478: [PowerPC] Add max/min intrinsics to Clang and PPC backend
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- [PATCH] D122039: [BOLT] Fix plt relocations symbol match
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- [PATCH] D122477: [X86][tablgen] Consider the mnemonic when auto-generating memory folding table
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- [llvm] f84b5c1 - [X86] Add test showing failure to fold multiple constant args in ADC
Simon Pilgrim via llvm-commits
- [llvm] be9acee - [AMDGPU] Move VOP3 classes into VOPInstructions.td. NFC.
Jay Foad via llvm-commits
- [PATCH] D122470: [AMDGPU] Move VOP3 classes into VOPInstructions.td. NFC.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D122482: [X86] combineADC - fold ADC(C1,C2,Carry) -> ADC(0,C1+C2,Carry)
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D115618: [AVR] Optimize int16 airthmetic right shift for shift amount 7/14/15
Ayke via Phabricator via llvm-commits
- [llvm] a81fff8 - Reapply "[Intrinsics] Add `nocallback` to the default intrinsic attributes"
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- [PATCH] D122458: [RISCV][WIP] Enable TargetLowering::hasBitTest for masks that fit in ANDI.
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D122475: [X86] Refactor X86ScalarSSEf16/32/64 with hasFP16/SSE1/SSE2. NFCI
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
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- [PATCH] D122416: [llvm][NFC] Prefer using variadic isa<> over non-variadic isa<>s
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- [PATCH] D118680: [Intrinsics] Add `nocallback` to the default intrinsic attributes
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- [PATCH] D122340: [InstCombine] SimplifyDemandedUseBits - remove ashr node if we only demand known sign bits
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D122065: [BOLT] Align constant islands to 8 bytes
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- [PATCH] D122069: [Clang] Add binary format for bundling offloading metadata
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D122065: [BOLT] Align constant islands to 8 bytes
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- [PATCH] D122473: Add new explanation for some shortcomings(WPD, CFI) for lexicon
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D122342: [lld][Mach-O][NFC] split parsing order file and processing its data.
Roger Kim via Phabricator via llvm-commits
- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
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- [PATCH] D122097: [BOLT] AArch64: Emit text objects
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- [llvm] 5975f1c - [AMDGPU][DOC][NFC] Added GFX1030 assembler syntax description
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- [PATCH] D122106: [BOLT] NFC: Fix dynamic relocation offset for constant islands
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- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
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- [PATCH] D122485: [SimplifyCFG] Fold mutil cases to And mask
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- [PATCH] D122485: [SimplifyCFG] Fold mutil cases to And mask
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- [llvm] 6a094a6 - [InstCombine] SimplifyDemandedUseBits - remove ashr node if we only demand known sign bits
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- [PATCH] D122340: [InstCombine] SimplifyDemandedUseBits - remove ashr node if we only demand known sign bits
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- [llvm] a121458 - [test, slp] Add another stacksave related dependence test
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- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
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- [PATCH] D119973: RegAllocGreedy: Fix last chance recolor assert in impossible case
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- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
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- [llvm] bb48c3a - [gn build] Port 39b80c8380c8
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- [PATCH] D117426: [AVR] Only push and clear R1 in interrupts when necessary
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- [llvm] 49b0b5f - [AVR][NFC] Fix incorrect register states in expanding pseudo instructions
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- [PATCH] D118354: [AVR][NFC] Fix incorrect register states in expanding pseudo instructions
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- [llvm] d9756fa - [slp] Factor out a lambda to avoid uplicating code a third time in upcoming patch [nfc]
Philip Reames via llvm-commits
- [PATCH] D122482: [X86] combineADC - fold ADC(C1,C2,Carry) -> ADC(0,C1+C2,Carry)
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- [PATCH] D122427: [MIPS] Initial support for MIPS-I load delay slots
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- [llvm] 7a316c0 - [CSSPGO] Turn on profi and ext-tsp when using probe-based profile.
Hongtao Yu via llvm-commits
- [PATCH] D122442: [CSSPGO] Turn on profi and ext-tsp when using probe-based profile.
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- [llvm] d6c6eb3 - [NFCI] Fix set-but-unused warning in AArch64AsmParser.cpp
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- [llvm] 39d348c - [NFCI] Fix set-but-unused warning in DenseMap.h in some configurations
Dávid Bolvanský via llvm-commits
- [PATCH] D68249: [llvm-objdump] Don't throw error for empty dynamic section
Khem Raj via Phabricator via llvm-commits
- [PATCH] D122482: [X86] combineADC - fold ADC(C1,C2,Carry) -> ADC(0,C1+C2,Carry)
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
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- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
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- [PATCH] D122377: [PowerPC][Linux] Support 16-byte lock free atomics on pwr8 and up
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- [PATCH] D121376: [RISCV][RVV] Introduce roundmode operand to PseudoVAADD instruction
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- [llvm] 61efe14 - [lldb] Add a fuzzer for target creation
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- [PATCH] D122461: [lldb] Add a fuzzer for target create
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- [PATCH] D122489: [AMDGPU] Fix adding modifiers when creating v_cmpx instructions.
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- [PATCH] D122206: [IROutliner] Ensure that phi values that are passed in as arguments are remapped as arguments
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- [PATCH] D122069: [Object] Add binary format for bundling offloading metadata
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- [PATCH] D122220: [InlineAsm] Add support for address operands ("p").
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- [PATCH] D122490: [RISCV] Generate EF_RISCV_RVC when .option rvc
luxufan via Phabricator via llvm-commits
- [PATCH] D122482: [X86] combineADC - fold ADC(C1,C2,Carry) -> ADC(0,C1+C2,Carry)
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- [PATCH] D122489: [AMDGPU] Fix adding modifiers when creating v_cmpx instructions.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D84120: [Debuginfo][SROA] (7/7) Support for DW_OP_implicit_pointer for named and unnamed variables (second strategy).
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- [llvm] e47d220 - [LV] Use getVectorLoopRegion to retrieve header. (NFC)
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- [llvm] b867f5c - [Support/BLAKE3] Do manual instrumentation of `llvm_blake3_hasher_finalize` for memory sanitizer
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- [PATCH] D84120: [Debuginfo][SROA] (7/7) Support for DW_OP_implicit_pointer for named and unnamed variables (second strategy).
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- [llvm] c7f91e2 - [InstrProfiling] No runtime hook for unused funcs
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- [PATCH] D122336: [InstrProfiling] No runtime hook for unused funcs
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- [llvm] a16308c - [SLP] Explicit track required stacksave/alloca dependency (try 3)
Philip Reames via llvm-commits
- [llvm] ec858f0 - [SLP] Optimize stacksave dependence handling [NFC]
Philip Reames via llvm-commits
- [PATCH] D122482: [X86] combineADC - fold ADC(C1,C2,Carry) -> ADC(0,C1+C2,Carry)
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D121376: [RISCV][RVV] Introduce roundmode operand to PseudoVAADD instruction
ShihPo Hung via Phabricator via llvm-commits
- [PATCH] D122336: [InstrProfiling] No runtime hook for unused funcs
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- [PATCH] D122405: [llvm] Initialize and move UseUpRegs outside of `union` MemOp struct.
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- [PATCH] D122336: [InstrProfiling] No runtime hook for unused funcs
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- [PATCH] D122268: Add PointerType analysis for DirectX backend
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- [llvm] 48cc928 - Reapply "[SLP] Schedule only sub-graph of vectorizable instructions"" (try 3)
Philip Reames via llvm-commits
- [PATCH] D122268: Add PointerType analysis for DirectX backend
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- [PATCH] D122482: [X86] combineADC - fold ADC(C1,C2,Carry) -> ADC(0,C1+C2,Carry)
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- [PATCH] D69798: Implement inlining of strictfp functions
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- [PATCH] D121951: [AMDGPU][OpenCL] Add "amdgpu-no-hostcall-ptr" in Clang codegen pre-COV_5
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- [PATCH] D122471: [IR] Require intrinsic struct return type to be anonymous
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- [llvm] 8530259 - [ConstraintElimination] Add test where offset additions overflow.
Florian Hahn via llvm-commits
- [llvm] 8c3281d - [ConstraintElimination] Use AddOverflow for offset summation.
Florian Hahn via llvm-commits
- [PATCH] D119965: [LICM][PhaseOrder] Don't speculate in LICM until after running loop rotate
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- [PATCH] D122163: [StripDeadDebugInfo] Drop dead CUs
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- [PATCH] D69798: Implement inlining of strictfp functions
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- [PATCH] D122493: [slp] Delete dead scalar instructions feeding vectorized instructions
Philip Reames via Phabricator via llvm-commits
- [PATCH] D119965: [LICM][PhaseOrder] Don't speculate in LICM until after running loop rotate
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- [PATCH] D119965: [LICM][PhaseOrder] Don't speculate in LICM until after running loop rotate
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- [PATCH] D120905: [demangler] Add operator precedence
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- [PATCH] D115907: [misexpect] Re-implement MisExpect Diagnostics
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- [PATCH] D118416: [Metadata] Use temporary MD nodes when appending module flags during module linking
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- [PATCH] D121415: [FunctionAttrs] Infer argmemonly .
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- [PATCH] D122336: [InstrProfiling] No runtime hook for unused funcs
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- [PATCH] D121763: [cmake] Provide CURRENT_TOOLS_DIR centrally, replacing CLANG_TOOLS_DIR
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- [llvm] a78bd83 - [gn build] Port cef52105bd4b
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- [PATCH] D116787: [llvm-readobj][MachO] Add option to sort the symbol table before dumping (MachO only, for now).
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- [llvm] f80aaa6 - [SLP] Simplify eraseInstruction [NFC]
Philip Reames via llvm-commits
- [PATCH] D116787: [llvm-readobj][MachO] Add option to sort the symbol table before dumping (MachO only, for now).
Vy Nguyen via Phabricator via llvm-commits
- [PATCH] D118538: [SLP] Schedule only sub-graph of vectorizable instructions
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- [PATCH] D119880: [FuncSpec] Support function specialization across multiple arguments.
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- [PATCH] D122498: [BOLT][test] Enable cross-target testing
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- [PATCH] D122498: [BOLT][test] Enable cross-target testing
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- [PATCH] D122498: [BOLT][test] Enable cross-target testing
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- [PATCH] D122489: [AMDGPU] Fix adding modifiers when creating v_cmpx instructions.
Thomas Symalla via Phabricator via llvm-commits
- [PATCH] D119965: [LICM][PhaseOrder] Don't speculate in LICM until after running loop rotate
Guozhi Wei via Phabricator via llvm-commits
- [llvm] 57ee624 - [cmake] Provide CURRENT_TOOLS_DIR centrally, replacing CLANG_TOOLS_DIR
Sam McCall via llvm-commits
- [PATCH] D121763: [cmake] Provide CURRENT_TOOLS_DIR centrally, replacing CLANG_TOOLS_DIR
Sam McCall via Phabricator via llvm-commits
- [lld] 57ee624 - [cmake] Provide CURRENT_TOOLS_DIR centrally, replacing CLANG_TOOLS_DIR
Sam McCall via llvm-commits
- [PATCH] D122501: [AMDGPU] Enable PreRARematerialize scheduling pass with multiple high RP regions
Vang Thao via Phabricator via llvm-commits
- [PATCH] D70401: [RISCV] Complete RV32E/ilp32e implementation
Wang Pengcheng via Phabricator via llvm-commits
- [llvm] 1f98e09 - Add missing include diagnosed in modules build. (NFC)
Adrian Prantl via llvm-commits
- [PATCH] D121737: [PseudoProbe] Do not emit pseudo probes when module is not probed.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D121737: [PseudoProbe] Do not emit pseudo probes when module is not probed.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D121737: [PseudoProbe] Do not emit pseudo probes when module is not probed.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D122082: Add DXIL Bitcode Writer and DXIL testing
Chris Bieneman via Phabricator via llvm-commits
- [PATCH] D122082: Add DXIL Bitcode Writer and DXIL testing
Chris Bieneman via Phabricator via llvm-commits
- [PATCH] D121951: [AMDGPU][OpenCL] Add "amdgpu-no-hostcall-ptr" in Clang codegen pre-COV_5
Yaxun Liu via Phabricator via llvm-commits
- [PATCH] D121655: [llvm-profgen] Read sample profiles for post-processing.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D122342: [lld][Mach-O][NFC] split parsing order file and processing its data.
Jez Ng via Phabricator via llvm-commits
- [llvm] e25f4e4 - [PseudoProbe] Do not emit pseudo probes when module is not probed.
Hongtao Yu via llvm-commits
- [PATCH] D121737: [PseudoProbe] Do not emit pseudo probes when module is not probed.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D122258: [MC][RFC] Omit DWARF unwind info if compact unwind is present for all archs
Jez Ng via Phabricator via llvm-commits
- [PATCH] D122489: [AMDGPU] Fix adding modifiers when creating v_cmpx instructions.
Thomas Symalla via Phabricator via llvm-commits
- [PATCH] D120990: [demangler] Add StringView conversion operator
David Blaikie via Phabricator via llvm-commits
- [PATCH] D122489: [AMDGPU] Fix adding modifiers when creating v_cmpx instructions.
Thomas Symalla via Phabricator via llvm-commits
- [PATCH] D90006: Exposes interface to free up caching data structure in DWARFDebugLine and DWARFUnit for memory management
David Blaikie via Phabricator via llvm-commits
- [PATCH] D116787: [llvm-readobj][MachO] Add option to sort the symbol table before dumping (MachO only, for now).
Vy Nguyen via Phabricator via llvm-commits
- [PATCH] D122505: [llvm-objdump] --private-headers: change errors to warnings for dynamic section dumping
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D121655: [llvm-profgen] Read sample profiles for post-processing.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D68249: [llvm-objdump] Don't throw error for empty dynamic section
Fangrui Song via Phabricator via llvm-commits
- [llvm] b9fd8f3 - [OpenMP][NFC] Add missing virtual destructor to silence warning
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- [llvm] 6c2be88 - Revert "[OpenMP][NFC] Add missing virtual destructor to silence warning"
Johannes Doerfert via llvm-commits
- [PATCH] D121655: [llvm-profgen] Read sample profiles for post-processing.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D69798: Implement inlining of strictfp functions
Andy Kaylor via Phabricator via llvm-commits
- [PATCH] D121655: [llvm-profgen] Read sample profiles for post-processing.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D121655: [llvm-profgen] Read sample profiles for post-processing.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D119965: [LICM][PhaseOrder] Don't speculate in LICM until after running loop rotate
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D115907: [misexpect] Re-implement MisExpect Diagnostics
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D122505: [llvm-objdump] --private-headers: change errors to warnings for dynamic section dumping
Khem Raj via Phabricator via llvm-commits
- [PATCH] D109577: [LNT] Fixed incorrect orders behavior in case of miss formatted llvm_project_revision
Chris Matthews via Phabricator via llvm-commits
- [PATCH] D122507: [AArch64] Allow .variant_pcs before binding directive
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122507: [AArch64] Allow .variant_pcs before binding directive
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D119973: RegAllocGreedy: Fix last chance recolor assert in impossible case
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D118416: [Metadata] Use temporary MD nodes when appending module flags during module linking
Duncan P. N. Exon Smith via Phabricator via llvm-commits
- [PATCH] D122259: [SelectOpti][2/5] Select-to-branch base transformation
Sotiris Apostolakis via Phabricator via llvm-commits
- [PATCH] D122259: [SelectOpti][2/5] Select-to-branch base transformation
Sotiris Apostolakis via Phabricator via llvm-commits
- [PATCH] D122512: [RISCV] Add lowering for vp.fptosi and vp.sitofp.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122259: [SelectOpti][2/5] Select-to-branch base transformation
David Li via Phabricator via llvm-commits
- [PATCH] D122512: [RISCV] Add lowering for vp.fptosi and vp.sitofp.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D121655: [llvm-profgen] Read sample profiles for post-processing.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D122512: [RISCV] Add lowering for vp.fptosi and vp.sitofp.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122372: [lld][COFF] Fix TypeServerSource lookup on GUID collisions
Reid Kleckner via Phabricator via llvm-commits
- [PATCH] D120781: [IRLinker] materialize Functions before moving any
Duncan P. N. Exon Smith via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122024: NFC. Refactor bitcode writer
Chris Bieneman via Phabricator via llvm-commits
- [PATCH] D122458: [RISCV][WIP] Enable TargetLowering::hasBitTest for masks that fit in ANDI.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122507: [AArch64] Allow .variant_pcs before binding directive
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122516: [MC] Make MCAsmInfo::isAcceptableChar reflect MCAsmInfo::doesAllowAtInName
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D122516: [MC] Make MCAsmInfo::isAcceptableChar reflect MCAsmInfo::doesAllowAtInName
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D121852: [scudo] Use templated builtins to avoid assumptions on SCUDO_WORDSIZE
Dominic Chen via Phabricator via llvm-commits
- [PATCH] D122471: [IR] Require intrinsic struct return type to be anonymous
Duncan P. N. Exon Smith via Phabricator via llvm-commits
- [PATCH] D122459: [ELF] Fix relocations against .eh_frame
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D121853: [scudo][NFC] Suppress warnings for missing-noreturn, conditional-uninitialized, zero-length-array
Dominic Chen via Phabricator via llvm-commits
- [PATCH] D121853: [scudo][NFC] Suppress warnings for missing-noreturn, conditional-uninitialized, zero-length-array
Dominic Chen via Phabricator via llvm-commits
- [PATCH] D122518: [scudo] Use template specialization on Quarantine to avoid zero-length array
Dominic Chen via Phabricator via llvm-commits
- [llvm] a5032b2 - DebugInfo: Don't allow type units to references types in the CU
David Blaikie via llvm-commits
- [PATCH] D121848: [scudo] Remove unused header includes and fix declarations
Dominic Chen via Phabricator via llvm-commits
- [PATCH] D121851: [scudo][tests] Ensure test assertions have matching type
Dominic Chen via Phabricator via llvm-commits
- [PATCH] D118426: [InstCombine] Remove side effect of replaced constrained intrinsics
Andy Kaylor via Phabricator via llvm-commits
- [llvm] ead8586 - [InstrProfiling] Add comments for no runtime hook
Gulfem Savrun Yeniceri via llvm-commits
- [PATCH] D122336: [InstrProfiling] No runtime hook for unused funcs
Gulfem Savrun Yeniceri via Phabricator via llvm-commits
- [PATCH] D115844: [ubsan] Using metadata instead of prologue data for function sanitizer
Yuanfang Chen via Phabricator via llvm-commits
- [PATCH] D119965: [LICM][PhaseOrder] Don't speculate in LICM until after running loop rotate
Guozhi Wei via Phabricator via llvm-commits
- [PATCH] D119973: RegAllocGreedy: Fix last chance recolor assert in impossible case
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D119973: RegAllocGreedy: Fix last chance recolor assert in impossible case
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D122427: [MIPS] Initial support for MIPS-I load delay slots
Simon Dardis via Phabricator via llvm-commits
- [PATCH] D122434: [Support] Add OpauqeDataStore
David Blaikie via Phabricator via llvm-commits
- [llvm] 4ae9745 - [Disassember][NFCI] Use strong type for instruction decoder
Maksim Panchenko via llvm-commits
- [PATCH] D122245: [Disassember][NFCI] Use strong type for instruction decoder
Maksim Panchenko via Phabricator via llvm-commits
- [llvm] e13faa4 - [X86][tablgen] Add interface getMnemonic to namespace X86Disassembler, NFCI
Shengchen Kan via llvm-commits
- [PATCH] D122477: [X86][tablgen] Consider the mnemonic when auto-generating memory folding table
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122477: [X86][tablgen] Consider the mnemonic when auto-generating memory folding table
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122520: [BOLT][test] Fix AArch64 cross-platform tests
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D122521: Value-number GVNHoist loads by result type as well as pointer address.
Chang Lin via Phabricator via llvm-commits
- [PATCH] D122477: [X86][tablgen] Consider the mnemonic when auto-generating memory folding table
Craig Topper via Phabricator via llvm-commits
- [PATCH] D114545: [CodeGen] Async unwind - add a pass to fix CFI information
Fangrui Song via Phabricator via llvm-commits
- [llvm] bf11ed2 - [X86][tablgen] Add class RecognizableInstrBase to simplify X86 code, NFCI
Shengchen Kan via llvm-commits
- [PATCH] D122474: demangler] Parenthesize >> inside template args
John McCall via Phabricator via llvm-commits
- [llvm] 88436af - [LoongArch] Fix several Clang warnings. NFC
Fangrui Song via llvm-commits
- [PATCH] D122477: [X86][tablgen] Consider the mnemonic when auto-generating memory folding table
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122477: [X86][tablgen] Consider the mnemonic when auto-generating memory folding table
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D114545: [CodeGen] Async unwind - add a pass to fix CFI information
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122477: [X86][tablgen] Consider the mnemonic when auto-generating memory folding table
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122477: [X86][tablgen] Consider the mnemonic when auto-generating memory folding table
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122477: [X86][tablgen] Consider the mnemonic when auto-generating memory folding table
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122477: [X86][tablgen] Consider the mnemonic when auto-generating memory folding table
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122477: [X86][tablgen] Consider the mnemonic when auto-generating memory folding table
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122477: [X86][tablgen] Consider the mnemonic when auto-generating memory folding table
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D114545: [CodeGen] Async unwind - add a pass to fix CFI information
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D114545: [CodeGen] Async unwind - add a pass to fix CFI information
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122523: [lldb] Fix building standalone LLDB on Windows.
مهدي شينون (Mehdi Chinoune) via Phabricator via llvm-commits
- [PATCH] D122434: [Support] Add OpauqeDataStore
Fangrui Song via Phabricator via llvm-commits
- [llvm] bce2e20 - [AVR] Optimize int16 airthmetic right shift for shift amount 7/14/15
Ben Shi via llvm-commits
- [PATCH] D115618: [AVR] Optimize int16 airthmetic right shift for shift amount 7/14/15
Ben Shi via Phabricator via llvm-commits
- [PATCH] D121848: [scudo] Remove unused header includes and fix declarations
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D122475: [X86] Refactor X86ScalarSSEf16/32/64 with hasFP16/SSE1/SSE2. NFCI
LuoYuanke via Phabricator via llvm-commits
- [llvm] c37accf - [Option] Avoid using the default argument for the 3-argument hasFlag. NFC
Fangrui Song via llvm-commits
- [lld] c37accf - [Option] Avoid using the default argument for the 3-argument hasFlag. NFC
Fangrui Song via llvm-commits
- [llvm] 522712e - [Option] Remove the error-prone default argument true from 3-argument hasFlag
Fangrui Song via llvm-commits
- [PATCH] D122518: [scudo] Use template specialization on Quarantine to avoid zero-length array
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D122518: [scudo] Use template specialization on Quarantine to avoid zero-length array
Vitaly Buka via Phabricator via llvm-commits
- [llvm] 02f20a0 - [Option] Remove the error-prone default argument true from 4-argument hasFlag
Fangrui Song via llvm-commits
- [PATCH] D121853: [scudo][NFC] Suppress warnings for missing-noreturn, conditional-uninitialized, zero-length-array
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D121852: [scudo] Use templated builtins to avoid assumptions on SCUDO_WORDSIZE
Vitaly Buka via Phabricator via llvm-commits
- [llvm] 7a94fa5 - [X86][tablgen] Move fields Name, Is64Bit, Is32Bit, Operands from RecognizableInstrBase to RecognizableInstr, NFCI
Shengchen Kan via llvm-commits
- [PATCH] D122471: [IR] Require intrinsic struct return type to be anonymous
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D122521: Value-number GVNHoist loads by result type as well as pointer address.
Nikita Popov via Phabricator via llvm-commits
- [llvm] 5f543cb - [X86][tablgen] Use initializer list for some fields of RecognizableInstr*. NFC
Shengchen Kan via llvm-commits
- [llvm] c8ea732 - [X86][tablgen] Set ShouldBeEmitted to false when isAsmParserOnly is true. NFCI
Shengchen Kan via llvm-commits
- [llvm] 758be63 - [test][AArch64] Add a test case for D121180 NFC
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- [PATCH] D122453: [test][AArch64] Add a test case for D121180 NFC
Allen zhong via Phabricator via llvm-commits
- [PATCH] D122475: [X86] Refactor X86ScalarSSEf16/32/64 with hasFP16/SSE1/SSE2. NFCI
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D122475: [X86] Refactor X86ScalarSSEf16/32/64 with hasFP16/SSE1/SSE2. NFCI
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D122520: [BOLT][test] Fix AArch64 cross-platform tests
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D122520: [BOLT][test] Fix AArch64 cross-platform tests
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D117426: [AVR] Only push and clear R1 in interrupts when necessary
Ben Shi via Phabricator via llvm-commits
- [PATCH] D117426: [AVR] Only push and clear R1 in interrupts when necessary
Ben Shi via Phabricator via llvm-commits
- [llvm] 271e8d2 - [X86][tablgen] Refine the class RecognizableInstr. NFCI
Shengchen Kan via llvm-commits
- [llvm] dc68ca3 - [X86][tablgen] Rename field hasREX_WPrefix to hasREX_W for X86Inst. NFC
Shengchen Kan via llvm-commits
- [llvm] a86cd3b - [X86][tablgen] Rename some fields for RecognizableInstrBase to align with fields in TD file. NFC
Shengchen Kan via llvm-commits
- [PATCH] D121430: [PowerPC] Fix lowering of byval parameters for sizes greater than 8 bytes.
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D122281: [AArch64][SelectionDAG] Refactor to support more scalable vector extending loads
Allen zhong via Phabricator via llvm-commits
- [PATCH] D112942: target ABI: improve call parameters extensions handling
Jonas Paulsson via Phabricator via llvm-commits
- [llvm] 3e41917 - [X86][tablgen] Remove useless check in X86FoldTablesEmitter.cpp. NFC
Shengchen Kan via llvm-commits
- [llvm] 139416c - [gn build] Port 555214cbcc79
LLVM GN Syncbot via llvm-commits
- [PATCH] D122530: [demangler] Support C23 _BitInt type
Senran Zhang via Phabricator via llvm-commits
- [PATCH] D122512: [RISCV] Add lowering for vp.fptosi and vp.sitofp.
ShihPo Hung via Phabricator via llvm-commits
- [PATCH] D122512: [RISCV] Add lowering for vp.fptosi and vp.sitofp.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122077: [InstCombine] Fold (ctpop(X) == 1) | (X == 0) into ctpop(X) < 2
Hirochika Matsumoto via Phabricator via llvm-commits
- [PATCH] D122077: [InstCombine] Fold (ctpop(X) == 1) | (X == 0) into ctpop(X) < 2
Hirochika Matsumoto via Phabricator via llvm-commits
- [PATCH] D122077: [InstCombine] Fold (ctpop(X) == 1) | (X == 0) into ctpop(X) < 2
Hirochika Matsumoto via Phabricator via llvm-commits
- [PATCH] D122512: [RISCV] Add lowering for vp.fptosi and vp.sitofp.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D94703: [Statepoint] Handle `undef` operands in statepoint.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D122533: [avr] Remove AVRRelaxMemOperations
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D114611: [AVR] Expand STDWSPQRr & STDSPQRr, approach #2
Patryk Wychowaniec via Phabricator via llvm-commits
- [llvm] 824a73b - [docs][ORC] Reword "How to Add Process and Library Symbols to the JITDylibs".
Lang Hames via llvm-commits
- [llvm] 34b547d - [docs][ORC] Simplify paragraph on hardcoding process addresses.
Lang Hames via llvm-commits
- [PATCH] D121017: [AArch64] Fallback to DWARF when trying to emit compact unwind info with multiple CFA offset adjustments
Tim Northover via Phabricator via llvm-commits
- [llvm] 693d3b7 - [AArch64] Lower 3 and 4 sources buildvectors to TBL
David Green via llvm-commits
- [PATCH] D122259: [SelectOpti][2/5] Select-to-branch base transformation
Sotiris Apostolakis via Phabricator via llvm-commits
- [PATCH] D122471: [IR] Require intrinsic struct return type to be anonymous
Duncan P. N. Exon Smith via Phabricator via llvm-commits
- [PATCH] D120231: [SelectOpti][3/5] Base Heuristics
Sotiris Apostolakis via Phabricator via llvm-commits
- [PATCH] D120232: [SelectOpti][4/5] Loop Heuristics
Sotiris Apostolakis via Phabricator via llvm-commits
- [PATCH] D120233: [SelectOpti][5/5] Optimize select-to-branch transformation
Sotiris Apostolakis via Phabricator via llvm-commits
- [PATCH] D120233: [SelectOpti][5/5] Optimize select-to-branch transformation
Sotiris Apostolakis via Phabricator via llvm-commits
- [PATCH] D122520: [BOLT][test] Fix AArch64 cross-platform tests
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D122520: [BOLT][test] Fix AArch64 cross-platform tests
Maksim Panchenko via Phabricator via llvm-commits
- [llvm] 460e1bd - [X86][tablgen] Remove PointerLikeRegClass from isRegisterOperand b/c getRegOperandSize crashes for it. NFCI
Shengchen Kan via llvm-commits
- [PATCH] D122065: [BOLT] Align constant islands to 8 bytes
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D122039: [BOLT] Fix plt relocations symbol match
Maksim Panchenko via Phabricator via llvm-commits
- [llvm] 321cbf7 - [Verifier] Verify parameter alignment.
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- [PATCH] D121898: [Verifier] Verify parameter alignment.
LuoYuanke via Phabricator via llvm-commits
- [llvm] 4a48742 - [X86][tablgen] Extract common functions in X86EVEX2VEXTablesEmitter.cpp and X86FoldTablesEmitter.cpp to avoid duplicated code. NFC
Shengchen Kan via llvm-commits
- [PATCH] D122482: [X86] combineADC - fold ADC(C1,C2,Carry) -> ADC(0,C1+C2,Carry)
Craig Topper via Phabricator via llvm-commits
- [llvm] 1fd118f - Verify parameter alignment attribute
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- [PATCH] D122130: Verify parameter alignment attribute
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Harald van Dijk via Phabricator via llvm-commits
- [PATCH] D114545: [CodeGen] Async unwind - add a pass to fix CFI information
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Harald van Dijk via Phabricator via llvm-commits
- [PATCH] D114545: [CodeGen] Async unwind - add a pass to fix CFI information
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122537: [X86] Support maskmovdqu,vmaskmovdqu in X32
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Harald van Dijk via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Harald van Dijk via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Harald van Dijk via Phabricator via llvm-commits
- [PATCH] D103427: [X86] Fix handling of maskmovdqu in X32
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
LiqinWeng via Phabricator via llvm-commits
- [PATCH] D122539: [SelectionDAG][DAGCombiner] Reuse exist node by reassociate
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D122427: [MIPS] Initial support for MIPS-I load delay slots
Spencer Alves via Phabricator via llvm-commits
- [PATCH] D122427: [MIPS] Initial support for MIPS-I load delay slots
Spencer Alves via Phabricator via llvm-commits
- [PATCH] D114545: [CodeGen] Async unwind - add a pass to fix CFI information
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122540: [X86] Fix handling of maskmovdqu in x32 differently
Harald van Dijk via Phabricator via llvm-commits
- [llvm] 674d52e - [X86] Refactor X86ScalarSSEf16/32/64 with hasFP16/SSE1/SSE2. NFCI
Phoebe Wang via llvm-commits
- [PATCH] D122475: [X86] Refactor X86ScalarSSEf16/32/64 with hasFP16/SSE1/SSE2. NFCI
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D122541: [X86] Set frame-setup/frame-destroy on prologue/epilogue CFI instructions
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122539: [SelectionDAG][DAGCombiner] Reuse exist node by reassociate
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D122539: [SelectionDAG][DAGCombiner] Reuse exist node by reassociate
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D122281: [AArch64][SelectionDAG] Refactor to support more scalable vector extending loads
Allen zhong via Phabricator via llvm-commits
- [PATCH] D122539: [SelectionDAG][DAGCombiner] Reuse exist node by reassociate
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Ben Shi via Phabricator via llvm-commits
- [PATCH] D121137: [AArch64] Lower 3 and 4 sources buildvectors to TBL
Dave Green via Phabricator via llvm-commits
- [PATCH] D122281: [AArch64][SelectionDAG] Refactor to support more scalable vector extending loads
Paul Walker via Phabricator via llvm-commits
- [PATCH] D121617: [LV] Move code to place induction increment to VPlan post-processing.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Ben Shi via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Ben Shi via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Ben Shi via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Ben Shi via Phabricator via llvm-commits
- [PATCH] D122530: [demangler] Support C23 _BitInt type
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Ben Shi via Phabricator via llvm-commits
- [PATCH] D121617: [LV] Move code to place induction increment to VPlan post-processing.
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Ben Shi via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Ben Shi via Phabricator via llvm-commits
- [PATCH] D122543: add ORC lazy jit support for riscv64
Alex Fan via Phabricator via llvm-commits
- [llvm] ebaa28e - [InstCombine] add baseline tests for fold of ctpop + icmp; NFC
Sanjay Patel via llvm-commits
- [PATCH] D122077: [InstCombine] Fold (ctpop(X) == 1) | (X == 0) into ctpop(X) < 2
Sanjay Patel via Phabricator via llvm-commits
- [llvm] c3fe025 - [AArch64][SelectionDAG] Refactor to support more scalable vector extending loads
via llvm-commits
- [PATCH] D122281: [AArch64][SelectionDAG] Refactor to support more scalable vector extending loads
Allen zhong via Phabricator via llvm-commits
- [llvm] 7cc4802 - [InstCombine] add baseline tests for logical and/or folds; NFC
Sanjay Patel via llvm-commits
- [PATCH] D122152: [InstCombine] Fold two select patterns into and-or
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D122152: [InstCombine] Fold two select patterns into and-or
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D122530: [demangler] Support C23 _BitInt type
Senran Zhang via Phabricator via llvm-commits
- [PATCH] D121621: [VPlan] Track current vector loop in VPTransformState (NFC).
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D122152: [InstCombine] Fold two select patterns into and-or
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D122152: [InstCombine] Fold two select patterns into and-or
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D122013: [InstCombine] Fold abs of known negative operand when source is sub
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D122512: [RISCV] Add lowering for vp.fptosi and vp.sitofp.
ShihPo Hung via Phabricator via llvm-commits
- [PATCH] D122545: Skip attemps to access /proc/self/fd on FreeBSD
Mateusz Guzik via Phabricator via llvm-commits
- [PATCH] D122545: Skip attemps to access /proc/self/fd on FreeBSD
Mateusz Guzik via Phabricator via llvm-commits
- [PATCH] D122545: Skip attemps to access /proc/self/fd on FreeBSD
Mateusz Guzik via Phabricator via llvm-commits
- [PATCH] D122456: [RISCV] Use maskedoff to decide mask policy for masked compare and vmsbf/vmsif/vmsof.
ShihPo Hung via Phabricator via llvm-commits
- [PATCH] D121623: [LV] Remove unneeded createHeaderBranch.(NFCI)
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D121621: [VPlan] Track current vector loop in VPTransformState (NFC).
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D114174: [ARM][CodeGen] Add support for complex addition and multiplication
Dave Green via Phabricator via llvm-commits
- [PATCH] D116464: [SPIRV 5/6] Add LegalizerInfo, InstructionSelector and utilities
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122482: [X86] combineADC - fold ADC(C1,C2,Carry) -> ADC(0,C1+C2,Carry)
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D116463: [SPIRV 4/6] Add target lowering, TargetMachine and AsmPrinter
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122545: Skip attempts to access /proc/self/fd on FreeBSD
Dimitry Andric via Phabricator via llvm-commits
- [llvm] 1a6d571 - [Support] Skip attempts to access /proc/self/fd on FreeBSD
Dimitry Andric via llvm-commits
- [PATCH] D121617: [LV] Move code to place induction increment to VPlan post-processing.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D122039: [BOLT] Fix plt relocations symbol match
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D122520: [BOLT][test] Fix AArch64 cross-platform tests
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D122039: [BOLT] Fix plt relocations symbol match
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D122065: [BOLT] Align constant islands to 8 bytes
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D122065: [BOLT] Align constant islands to 8 bytes
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D116462: [SPIRV 3/6] Add MC layer, object file support and InstPrinter
Ilia Diachkov via Phabricator via llvm-commits
- [PATCH] D122097: [BOLT] AArch64: Emit text objects
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D121617: [LV] Move code to place induction increment to VPlan post-processing.
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D116463: [SPIRV 4/6] Add target lowering, TargetMachine and AsmPrinter
Ilia Diachkov via Phabricator via llvm-commits
- [PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori
Craig Topper via Phabricator via llvm-commits
- [PATCH] D121415: [FunctionAttrs] Infer argmemonly .
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D122456: [RISCV] Use maskedoff to decide mask policy for masked compare and vmsbf/vmsif/vmsof.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D122549: [VFS] RedirectingFileSystem only replace path if not already mapped
Ben Barham via Phabricator via llvm-commits
- [PATCH] D122550: [NVPTX] Allow degenerated `nvvm.annotations`
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Ben Shi via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Ben Shi via Phabricator via llvm-commits
- [PATCH] D122220: [InlineAsm] Add support for address operands ("p").
Xiang Zhang via Phabricator via llvm-commits
- [PATCH] D122550: [NVPTX] Allow degenerated `nvvm.annotations`
Daniil Kovalev via Phabricator via llvm-commits
- [PATCH] D122456: [RISCV] Use maskedoff to decide mask policy for masked compare and vmsbf/vmsif/vmsof.
Zakk Chen via Phabricator via llvm-commits
- [PATCH] D122456: [RISCV] Use maskedoff to decide mask policy for masked compare and vmsbf/vmsif/vmsof.
Zakk Chen via Phabricator via llvm-commits
- [PATCH] D122551: [AArch64] Enhance last active true vector combine
Allen zhong via Phabricator via llvm-commits
- [PATCH] D122550: [NVPTX] Allow degenerated `nvvm.annotations`
Daniil Kovalev via Phabricator via llvm-commits
- [PATCH] D121381: [MemorySSA] Support lazy use optimization
Philip Reames via Phabricator via llvm-commits
- [PATCH] D116463: [SPIRV 4/6] Add target lowering, TargetMachine and AsmPrinter
Ilia Diachkov via Phabricator via llvm-commits
- [PATCH] D116463: [SPIRV 4/6] Add target lowering, TargetMachine and AsmPrinter
Ilia Diachkov via Phabricator via llvm-commits
- [PATCH] D122473: Add new explanation for some shortcomings(WPD, CFI) for lexicon
李拯先 via Phabricator via llvm-commits
- [PATCH] D116464: [SPIRV 5/6] Add LegalizerInfo, InstructionSelector and utilities
Ilia Diachkov via Phabricator via llvm-commits
- [PATCH] D116464: [SPIRV 5/6] Add LegalizerInfo, InstructionSelector and utilities
Ilia Diachkov via Phabricator via llvm-commits
- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D122550: [NVPTX] Allow degenerated `nvvm.annotations`
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D122478: [PowerPC] Add max/min intrinsics to Clang and PPC backend
Ting Wang via Phabricator via llvm-commits
- [PATCH] D122530: [demangler] Support C23 _BitInt type
Senran Zhang via Phabricator via llvm-commits
- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
Daniil Kovalev via Phabricator via llvm-commits
- [PATCH] D122473: Add new explanation for some shortcomings(WPD, CFI) for lexicon
李拯先 via Phabricator via llvm-commits
- [PATCH] D122473: Add new explanation for some shortcomings(WPD, CFI) for lexicon
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D122473: Add new explanation for some shortcomings(WPD, CFI) for lexicon
liushuai wang via Phabricator via llvm-commits
- [PATCH] D122457: [LSR] Canonicalize formula before inserting it.
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D122457: [LSR] Canonicalize formula before inserting it.
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D122457: [LSR] Canonicalize formula before inserting it.
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D122457: [LSR] Canonicalize formula before inserting it.
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D122473: Add new explanation for some shortcomings(WPD, CFI) for lexicon
李拯先 via Phabricator via llvm-commits
- [PATCH] D122473: Add new explanation for some shortcomings(WPD, CFI) for lexicon
李拯先 via Phabricator via llvm-commits
- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
Daniil Kovalev via Phabricator via llvm-commits
- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D122457: [LSR] Canonicalize formula before inserting it.
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D122457: [LSR] Canonicalize formula before inserting it.
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D120129: [NVPTX] Enhance vectorization of ld.param & st.param
Daniil Kovalev via Phabricator via llvm-commits
- [llvm] 23b3df5 - [docs][Lexicon] Add new explanation for some shortcomings(WPD, CFI) for lexicon
via llvm-commits
- [PATCH] D122473: Add new explanation for some shortcomings(WPD, CFI) for lexicon
Mingjie Xu via Phabricator via llvm-commits
- [PATCH] D119967: [InstCombineCalls] Optimize call of bitcast even w/ parameter attributes
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D122469: OpenMP 5.1 - Support 'seq_cst' clause on 'flush' directive
Johannes Doerfert via Phabricator via llvm-commits
- [llvm] 6212871 - [Target] Apply clang-tidy fixes for readability-redundant-member-init (NFC)
Kazu Hirata via llvm-commits
- [PATCH] D122200: [AMDGPU] Split waterfall loop exec manipulation
Ruiling, Song via Phabricator via llvm-commits
- [PATCH] D122533: [AVR] Remove AVRRelaxMemOperations
Patryk Wychowaniec via Phabricator via llvm-commits
- [PATCH] D122366: [LoongArch] Construct codegen infra and generate first add instruction.
Lu Weining via Phabricator via llvm-commits
- [PATCH] D122366: [LoongArch] Construct codegen infra and generate first add instruction.
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D122458: [RISCV][WIP] Enable TargetLowering::hasBitTest for masks that fit in ANDI.
Craig Topper via Phabricator via llvm-commits
- [llvm] ad57e10 - [RISCV][NFC] Moving RVV intrinsic type related util to llvm/Support
Kito Cheng via llvm-commits
- [PATCH] D121984: [RISCV][NFC] Moving RVV intrinsic type related util to llvm/Support
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D121624: [VPlan] Model pre-header explicitly.
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D122555: [RISCV][NFC] Remove unused header includes.
Adrian Kuegel via Phabricator via llvm-commits
- [llvm] f7e3174 - [gn build] Port ad57e10dbca2
LLVM GN Syncbot via llvm-commits
- [PATCH] D122555: [RISCV][NFC] Remove unused header includes.
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D122556: [RISCV] Add definitions for Xiangshan processors.
Zircon Liu via Phabricator via llvm-commits
Last message date:
Sun Mar 27 23:57:01 PDT 2022
Archived on: Sun Mar 27 23:57:02 PDT 2022
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