[llvm] 1a9b55b - [SelectionDAG] Don't create entries in ValueMap in ComputePHILiveOutRegInfo

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2022-03-22T23:24:53-07:00
New Revision: 1a9b55b63a6e18a4692eeb795697cb61ca1b002f

URL: https://github.com/llvm/llvm-project/commit/1a9b55b63a6e18a4692eeb795697cb61ca1b002f
DIFF: https://github.com/llvm/llvm-project/commit/1a9b55b63a6e18a4692eeb795697cb61ca1b002f.diff

LOG: [SelectionDAG] Don't create entries in ValueMap in ComputePHILiveOutRegInfo

Instead of using operator[], use DenseMap::find to prevent default
constructing an entry if it isn't already in the map.

Added: 
    

Modified: 
    llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
    llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h b/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
index 524730d536942..071242e145327 100644
--- a/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
+++ b/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
@@ -258,6 +258,7 @@ class FunctionLoweringInfo {
       return;
 
     Register Reg = It->second;
+    assert(Reg != 0);
     if (Reg == 0)
       return;
 

diff  --git a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
index b49455111a468..e39ad73cf20c9 100644
--- a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
@@ -445,9 +445,14 @@ void FunctionLoweringInfo::ComputePHILiveOutRegInfo(const PHINode *PN) {
   IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);
   unsigned BitWidth = IntVT.getSizeInBits();
 
-  Register DestReg = ValueMap[PN];
-  if (!Register::isVirtualRegister(DestReg))
+  auto It = ValueMap.find(PN);
+  if (It == ValueMap.end())
     return;
+
+  Register DestReg = It->second;
+  if (DestReg == 0)
+    return
+  assert(Register::isVirtualRegister(DestReg) && "Expected a virtual reg");
   LiveOutRegInfo.grow(DestReg);
   LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];