[PATCH] D121881: [RISCV][RVV] Select unmasked TU RVV pseudos in a DAG post-process

[ShihPo Hung via Phabricator via llvm-commits]

arcbbb added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:2261
+    if (N->getConstantOperandVal(*TailPolicyOpIdx) ==
+            RISCVII::TAIL_UNDISTURBED &&
+        !N->getOperand(0).isUndef())
----------------
I discover that the inserted vsetvli uses TA for TU pseudos with IMPLICIT_DEF tie operand, so I follow the logic in computeInfoForInstr at RISCVInsertVSETVLI.cpp to transform it into TA pseudo.
Does this make sense?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121881/new/

https://reviews.llvm.org/D121881