[PATCH] D121376: [RISCV][RVV] Introduce roundmode operand to PseudoVAADD instruction

[ShihPo Hung via Phabricator via llvm-commits]

arcbbb added a comment.

In D121376#3392981 <https://reviews.llvm.org/D121376#3392981>, @efriedma wrote:

> Having RISCVVXRMRegister work per-basic-block is fine for now, but you probably want the capability to hoist the operations out of loops at some point.

Yes, I think it is desirable. I will think how to do that after the global analysis is done.

> Do you have any plan for the vxsat bit?  You might want the intrinsics to take it as an explicit argument/return value.  Or maybe if you don't expect users of the intrinsics to use the bit, you could just preserve it; instead of saving/restoring vxrm, just save/restore all of vcsr.

Thanks, I think I can try returning an additional output for the vxsat bit like

  declare { <vscale x 1 x i8>, i64 } @llvm.riscv.vaadd.rm.nxv1i8.nxv1i8(
    <vscale x 1 x i8>,
    <vscale x 1 x i8>,
    <vscale x 1 x i8>,
    i64,
    i64);


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https://reviews.llvm.org/D121376