[PATCH] D122051: [RISCV] The immediate version of sgt/ugt lowering to slti/sltiu + xori

[Zakk Chen via Phabricator via llvm-commits]

khchen added inline comments.
Herald added a subscriber: StephenFan.


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Comment at: llvm/test/CodeGen/RISCV/float-fcmp-strict.ll:72
+; RV32I-NEXT:    slti a0, a0, 1
+; RV32I-NEXT:    xori a0, a0, 1
 ; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
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It seems no any benefits in this case, is it expected?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122051/new/

https://reviews.llvm.org/D122051