[PATCH] D121366: Allow ImproveChain to get past relaxed atomics

[Yoni Lavi via Phabricator via llvm-commits]

yoni-lavi updated this revision to Diff 417367.
yoni-lavi added a comment.

- rb to re-test


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121366/new/

https://reviews.llvm.org/D121366

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -24062,6 +24062,14 @@
               Optional<int64_t>(Size),
               LSN->getMemOperand()};
     }
+    if (const auto *AN = dyn_cast<AtomicSDNode>(N)) {
+      // PRE_INC / PRE_DEC allegedly not a relevant issue, can set this to zero
+      int64_t Offset = 0;
+      uint64_t Size =
+          MemoryLocation::getSizeOrUnknown(AN->getMemoryVT().getStoreSize());
+      return {AN->isVolatile(), AN->isAtomic(),          AN->getBasePtr(),
+              Offset,           Optional<int64_t>(Size), AN->getMemOperand()};
+    }
     if (const auto *LN = cast<LifetimeSDNode>(N))
       return {false /*isVolatile*/, /*isAtomic*/ false, LN->getOperand(1),
               (LN->hasOffset()) ? LN->getOffset() : 0,
@@ -24221,6 +24229,18 @@
       return false;
     }
     default:
+      if (auto *AC = dyn_cast<AtomicSDNode>(C.getNode())) {
+        if (AC->getMergedOrdering() == AtomicOrdering::Monotonic) {
+          bool IsOpLoad = AC->getOpcode() == ISD::ATOMIC_LOAD;
+          if ((IsLoad && IsOpLoad) || !mayAlias(N, AC)) {
+            LLVM_DEBUG(dbgs() << "ImproveChain of node went past a monotonic "
+                                 "Atomic operation.\n  Node: ";
+                       N->dump(); dbgs() << "  Atomic: "; AC->dump());
+            C = C.getOperand(0);
+            return true;
+          }
+        }
+      }
       return false;
     }
   };


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