[PATCH] D122539: [SelectionDAG][DAGCombiner] Reuse exist node by reassociate

Sun Mar 27 02:16:43 PDT 2022

bcl5980 added inline comments.

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Comment at: llvm/test/CodeGen/X86/masked-iv-safe.ll:269
 ; CHECK-NEXT:    addq $134217720, %rcx # imm = 0x7FFFFF8
-; CHECK-NEXT:    addq $2040, %rax # imm = 0x7F8
+; CHECK-NEXT:    testq %rax, %rax
 ; CHECK-NEXT:    jne .LBB5_1
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pengfei wrote:
> This seems regression. The same below.
Yeah, this change brings some regressions because of two reasons:
1. The case you comment, instruction sequence change causes extra compare instructions
2. [load/store (add (add x, y), constant)]. Many targets support ld/st with imm offset. If we reassociate instructions, it will miss the address mode pattern match.
But I think they should be fixed on every backend's isReassocProfitable. I prefer to fix these on individual changes.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122539/new/

https://reviews.llvm.org/D122539