[PATCH] D122219: [AMDGPU] [NFC]: Organize the code around reserving registers.
Mahesha S via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 22 03:07:34 PDT 2022
hsmhsm created this revision.
hsmhsm added reviewers: rampitec, arsenm, cdevadas, critson.
Herald added subscribers: foad, kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
Herald added a project: All.
hsmhsm requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.
First, add code to reserve all required special purpose registers,
followed by code to reserve SGPRs, followed by code to reserve
VGPRs/AGPRs.
This patch is prepared as a pre-requisite to fix an issue related to
GFX90A hardware.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D122219
Files:
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D122219.417230.patch
Type: text/x-patch
Size: 6020 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220322/aa1ad4b2/attachment.bin>
More information about the llvm-commits
mailing list