[llvm] f84b5c1 - [X86] Add test showing failure to fold multiple constant args in ADC

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-03-25T13:42:08Z
New Revision: f84b5c11ddd4429a0c67df9fc2299b215567ffaf

URL: https://github.com/llvm/llvm-project/commit/f84b5c11ddd4429a0c67df9fc2299b215567ffaf
DIFF: https://github.com/llvm/llvm-project/commit/f84b5c11ddd4429a0c67df9fc2299b215567ffaf.diff

LOG: [X86] Add test showing failure to fold multiple constant args in ADC

As noticed on Issue #35256

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/combine-adc.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/combine-adc.ll b/llvm/test/CodeGen/X86/combine-adc.ll
index 63021942fdeaa..3a6e26cbd8c49 100644
--- a/llvm/test/CodeGen/X86/combine-adc.ll
+++ b/llvm/test/CodeGen/X86/combine-adc.ll
@@ -67,4 +67,33 @@ define i32 @PR40483_add2(i32*, i32) nounwind {
   ret i32 %10
 }
 
+; FIXME: Fail to add (non-overflowing) constants together
+; FIXME: Fail to convert add+lshr+and to BT
+define i32 @adc_merge_constants(i32 %a0) nounwind {
+; X86-LABEL: adc_merge_constants:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    shrl $11, %eax
+; X86-NEXT:    andb $1, %al
+; X86-NEXT:    addb $-1, %al
+; X86-NEXT:    movl $55, %eax
+; X86-NEXT:    adcl $-1, %eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: adc_merge_constants:
+; X64:       # %bb.0:
+; X64-NEXT:    shrl $11, %edi
+; X64-NEXT:    andb $1, %dil
+; X64-NEXT:    addb $-1, %dil
+; X64-NEXT:    movl $55, %eax
+; X64-NEXT:    adcl $-1, %eax
+; X64-NEXT:    retq
+  %bit = lshr i32 %a0, 11
+  %mask = and i32 %bit, 1
+  %isz = trunc i32 %mask to i8
+  %adc = tail call { i8, i32 } @llvm.x86.addcarry.32(i8 %isz, i32 55, i32 -1)
+  %sum = extractvalue { i8, i32 } %adc, 1
+  ret i32 %sum
+}
+
 declare { i8, i32 } @llvm.x86.addcarry.32(i8, i32, i32)